6d36b9750c7ac2ab9f4a88e483af6275d26d9315
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "ac_shader_abi.h"
30
31 #include <llvm-c/Core.h>
32 #include <llvm-c/TargetMachine.h>
33
34 struct pipe_debug_callback;
35
36 #define RADEON_LLVM_MAX_INPUTS 32 * 4
37
38 /* Ideally pass the sample mask input to the PS epilog as v14, which
39 * is its usual location, so that the shader doesn't have to add v_mov.
40 */
41 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
42
43 struct si_shader_output_values {
44 LLVMValueRef values[4];
45 unsigned semantic_name;
46 unsigned semantic_index;
47 ubyte vertex_stream[4];
48 };
49
50 struct si_shader_context {
51 struct ac_llvm_context ac;
52 struct si_shader *shader;
53 struct si_screen *screen;
54
55 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
56
57 /* For clamping the non-constant index in resource indexing: */
58 unsigned num_const_buffers;
59 unsigned num_shader_buffers;
60 unsigned num_images;
61 unsigned num_samplers;
62
63 struct ac_shader_args args;
64 struct ac_shader_abi abi;
65
66 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
67
68 LLVMBasicBlockRef merged_wrap_if_entry_block;
69 int merged_wrap_if_label;
70
71 LLVMValueRef main_fn;
72 LLVMTypeRef return_type;
73
74 struct ac_arg const_and_shader_buffers;
75 struct ac_arg samplers_and_images;
76
77 /* For merged shaders, the per-stage descriptors for the stage other
78 * than the one we're processing, used to pass them through from the
79 * first stage to the second.
80 */
81 struct ac_arg other_const_and_shader_buffers;
82 struct ac_arg other_samplers_and_images;
83
84 struct ac_arg rw_buffers;
85 struct ac_arg bindless_samplers_and_images;
86 /* Common inputs for merged shaders. */
87 struct ac_arg merged_wave_info;
88 struct ac_arg merged_scratch_offset;
89 /* API VS */
90 struct ac_arg vertex_buffers;
91 struct ac_arg vb_descriptors[5];
92 struct ac_arg rel_auto_id;
93 struct ac_arg vs_prim_id;
94 struct ac_arg vertex_index0;
95 /* VS states and layout of LS outputs / TCS inputs at the end
96 * [0] = clamp vertex color
97 * [1] = indexed
98 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
99 * max = 32*32*4 + 32*4
100 * [24:31] = stride between vertices in DW = num_inputs * 4
101 * max = 32*4
102 */
103 struct ac_arg vs_state_bits;
104 struct ac_arg vs_blit_inputs;
105 /* HW VS */
106 struct ac_arg streamout_config;
107 struct ac_arg streamout_write_index;
108 struct ac_arg streamout_offset[4];
109
110 /* API TCS & TES */
111 /* Layout of TCS outputs in the offchip buffer
112 * # 6 bits
113 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
114 * # 6 bits
115 * [6:11] = the number of output vertices per patch, max = 32
116 * # 20 bits
117 * [12:31] = the offset of per patch attributes in the buffer in bytes.
118 * max = NUM_PATCHES*32*32*16
119 */
120 struct ac_arg tcs_offchip_layout;
121
122 /* API TCS */
123 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
124 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
125 * [16:31] = TCS output patch0 offset for per-patch / 16
126 * max = (NUM_PATCHES + 1) * 32*32
127 */
128 struct ac_arg tcs_out_lds_offsets;
129 /* Layout of TCS outputs / TES inputs:
130 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
131 * max = 32*32*4 + 32*4
132 * [13:18] = gl_PatchVerticesIn, max = 32
133 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
134 */
135 struct ac_arg tcs_out_lds_layout;
136 struct ac_arg tcs_offchip_offset;
137 struct ac_arg tcs_factor_offset;
138
139 /* API TES */
140 struct ac_arg tes_offchip_addr;
141 struct ac_arg tes_u;
142 struct ac_arg tes_v;
143 struct ac_arg tes_rel_patch_id;
144 /* HW ES */
145 struct ac_arg es2gs_offset;
146 /* HW GS */
147 /* On gfx10:
148 * - bits 0..11: ordered_wave_id
149 * - bits 12..20: number of vertices in group
150 * - bits 22..30: number of primitives in group
151 */
152 struct ac_arg gs_tg_info;
153 /* API GS */
154 struct ac_arg gs2vs_offset;
155 struct ac_arg gs_wave_id; /* GFX6 */
156 struct ac_arg gs_vtx_offset[6]; /* in dwords (GFX6) */
157 struct ac_arg gs_vtx01_offset; /* in dwords (GFX9) */
158 struct ac_arg gs_vtx23_offset; /* in dwords (GFX9) */
159 struct ac_arg gs_vtx45_offset; /* in dwords (GFX9) */
160 /* PS */
161 struct ac_arg pos_fixed_pt;
162 /* CS */
163 struct ac_arg block_size;
164 struct ac_arg cs_user_data;
165
166 struct ac_llvm_compiler *compiler;
167
168 /* Preloaded descriptors. */
169 LLVMValueRef esgs_ring;
170 LLVMValueRef gsvs_ring[4];
171 LLVMValueRef tess_offchip_ring;
172
173 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
174 LLVMValueRef gs_next_vertex[4];
175 LLVMValueRef gs_curprim_verts[4];
176 LLVMValueRef gs_generated_prims[4];
177 LLVMValueRef gs_ngg_emit;
178 LLVMValueRef gs_ngg_scratch;
179 LLVMValueRef postponed_kill;
180 LLVMValueRef return_value;
181
182 LLVMTypeRef voidt;
183 LLVMTypeRef i1;
184 LLVMTypeRef i8;
185 LLVMTypeRef i32;
186 LLVMTypeRef i64;
187 LLVMTypeRef i128;
188 LLVMTypeRef f32;
189 LLVMTypeRef v2i32;
190 LLVMTypeRef v4i32;
191 LLVMTypeRef v4f32;
192 LLVMTypeRef v8i32;
193
194 LLVMValueRef i32_0;
195 LLVMValueRef i32_1;
196 LLVMValueRef i1false;
197 LLVMValueRef i1true;
198 };
199
200 static inline struct si_shader_context *
201 si_shader_context_from_abi(struct ac_shader_abi *abi)
202 {
203 struct si_shader_context *ctx = NULL;
204 return container_of(abi, ctx, abi);
205 }
206
207 unsigned si_llvm_compile(LLVMModuleRef M, struct si_shader_binary *binary,
208 struct ac_llvm_compiler *compiler,
209 struct pipe_debug_callback *debug,
210 bool less_optimized, unsigned wave_size);
211
212 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
213 LLVMValueRef index,
214 unsigned num);
215
216 void si_llvm_context_init(struct si_shader_context *ctx,
217 struct si_screen *sscreen,
218 struct ac_llvm_compiler *compiler,
219 unsigned wave_size);
220 void si_llvm_context_set_ir(struct si_shader_context *ctx,
221 struct si_shader *shader);
222
223 void si_llvm_create_func(struct si_shader_context *ctx, const char *name,
224 LLVMTypeRef *return_types, unsigned num_return_elems,
225 unsigned max_workgroup_size);
226
227 void si_llvm_dispose(struct si_shader_context *ctx);
228
229 void si_llvm_optimize_module(struct si_shader_context *ctx);
230
231 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
232 LLVMTypeRef type,
233 LLVMValueRef vertex_index,
234 LLVMValueRef param_index,
235 unsigned const_index,
236 unsigned location,
237 unsigned driver_location,
238 unsigned component,
239 unsigned num_components,
240 bool is_patch,
241 bool is_compact,
242 bool load_input);
243 bool si_is_merged_shader(struct si_shader_context *ctx);
244 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
245 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
246 LLVMValueRef list, LLVMValueRef index,
247 enum ac_descriptor_type type);
248 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
249 LLVMValueRef list, LLVMValueRef index,
250 enum ac_descriptor_type desc_type,
251 bool uses_store, bool bindless);
252 LLVMValueRef si_buffer_load_const(struct si_shader_context *ctx,
253 LLVMValueRef resource, LLVMValueRef offset);
254 void si_llvm_build_ret(struct si_shader_context *ctx, LLVMValueRef ret);
255 LLVMValueRef si_prolog_get_rw_buffers(struct si_shader_context *ctx);
256 void si_declare_compute_memory(struct si_shader_context *ctx);
257 LLVMValueRef si_get_primitive_id(struct si_shader_context *ctx,
258 unsigned swizzle);
259 void si_llvm_export_vs(struct si_shader_context *ctx,
260 struct si_shader_output_values *outputs,
261 unsigned noutput);
262 void si_emit_streamout_output(struct si_shader_context *ctx,
263 LLVMValueRef const *so_buffers,
264 LLVMValueRef const *so_write_offsets,
265 struct pipe_stream_output *stream_out,
266 struct si_shader_output_values *shader_out);
267 void si_add_arg_checked(struct ac_shader_args *args,
268 enum ac_arg_regfile file,
269 unsigned registers, enum ac_arg_type type,
270 struct ac_arg *arg,
271 unsigned idx);
272
273 void si_llvm_load_input_vs(
274 struct si_shader_context *ctx,
275 unsigned input_index,
276 LLVMValueRef out[4]);
277
278 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
279
280 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
281 struct ac_arg param, unsigned rshift,
282 unsigned bitwidth);
283 LLVMValueRef si_is_es_thread(struct si_shader_context *ctx);
284 LLVMValueRef si_is_gs_thread(struct si_shader_context *ctx);
285 void si_build_wrapper_function(struct si_shader_context *ctx, LLVMValueRef *parts,
286 unsigned num_parts, unsigned main_part,
287 unsigned next_shader_first_part);
288 bool si_need_ps_prolog(const union si_shader_part_key *key);
289 void si_get_ps_prolog_key(struct si_shader *shader,
290 union si_shader_part_key *key,
291 bool separate_prolog);
292 void si_get_ps_epilog_key(struct si_shader *shader,
293 union si_shader_part_key *key);
294 LLVMValueRef si_insert_input_ret(struct si_shader_context *ctx, LLVMValueRef ret,
295 struct ac_arg param, unsigned return_index);
296 LLVMValueRef si_insert_input_ret_float(struct si_shader_context *ctx, LLVMValueRef ret,
297 struct ac_arg param, unsigned return_index);
298 LLVMValueRef si_insert_input_ptr(struct si_shader_context *ctx, LLVMValueRef ret,
299 struct ac_arg param, unsigned return_index);
300
301 void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
302 unsigned max_outputs,
303 LLVMValueRef *addrs);
304 void gfx10_ngg_gs_emit_vertex(struct si_shader_context *ctx,
305 unsigned stream,
306 LLVMValueRef *addrs);
307 void gfx10_ngg_gs_emit_prologue(struct si_shader_context *ctx);
308 void gfx10_ngg_gs_emit_epilogue(struct si_shader_context *ctx);
309 void gfx10_ngg_calculate_subgroup_info(struct si_shader *shader);
310
311 /* si_shader_llvm_ps.c */
312 void si_llvm_build_ps_prolog(struct si_shader_context *ctx,
313 union si_shader_part_key *key);
314 void si_llvm_build_ps_epilog(struct si_shader_context *ctx,
315 union si_shader_part_key *key);
316 void si_llvm_build_monolithic_ps(struct si_shader_context *ctx,
317 struct si_shader *shader);
318 void si_llvm_init_ps_callbacks(struct si_shader_context *ctx);
319
320 #endif