radeonsi: deduplicate ES and GS thread enablement code
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_init.h"
31 #include "gallivm/lp_bld_tgsi.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "ac_shader_abi.h"
34
35 #include <llvm-c/Core.h>
36 #include <llvm-c/TargetMachine.h>
37
38 struct pipe_debug_callback;
39
40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
43
44 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
45 #define RADEON_LLVM_MAX_ADDRS 16
46
47 struct si_shader_output_values {
48 LLVMValueRef values[4];
49 unsigned semantic_name;
50 unsigned semantic_index;
51 ubyte vertex_stream[4];
52 };
53
54 struct si_shader_context {
55 struct lp_build_tgsi_context bld_base;
56 struct gallivm_state gallivm;
57 struct ac_llvm_context ac;
58 struct si_shader *shader;
59 struct si_screen *screen;
60
61 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
62
63 /* For clamping the non-constant index in resource indexing: */
64 unsigned num_const_buffers;
65 unsigned num_shader_buffers;
66 unsigned num_images;
67 unsigned num_samplers;
68
69 struct ac_shader_args args;
70 struct ac_shader_abi abi;
71
72 /** This function is responsible for initilizing the inputs array and will be
73 * called once for each input declared in the TGSI shader.
74 */
75 void (*load_input)(struct si_shader_context *,
76 unsigned input_index,
77 const struct tgsi_full_declaration *decl,
78 LLVMValueRef out[4]);
79
80 /** This array contains the input values for the shader. Typically these
81 * values will be in the form of a target intrinsic that will inform the
82 * backend how to load the actual inputs to the shader.
83 */
84 struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
85 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
86 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
87 LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
88
89 /** This pointer is used to contain the temporary values.
90 * The amount of temporary used in tgsi can't be bound to a max value and
91 * thus we must allocate this array at runtime.
92 */
93 LLVMValueRef *temps;
94 unsigned temps_count;
95 LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
96
97 LLVMValueRef *imms;
98 unsigned imms_num;
99
100 LLVMBasicBlockRef merged_wrap_if_entry_block;
101 int merged_wrap_if_label;
102
103 struct tgsi_array_info *temp_arrays;
104 LLVMValueRef *temp_array_allocas;
105
106 LLVMValueRef undef_alloca;
107
108 LLVMValueRef main_fn;
109 LLVMTypeRef return_type;
110
111 struct ac_arg const_and_shader_buffers;
112 struct ac_arg samplers_and_images;
113
114 /* For merged shaders, the per-stage descriptors for the stage other
115 * than the one we're processing, used to pass them through from the
116 * first stage to the second.
117 */
118 struct ac_arg other_const_and_shader_buffers;
119 struct ac_arg other_samplers_and_images;
120
121 struct ac_arg rw_buffers;
122 struct ac_arg bindless_samplers_and_images;
123 /* Common inputs for merged shaders. */
124 struct ac_arg merged_wave_info;
125 struct ac_arg merged_scratch_offset;
126 /* API VS */
127 struct ac_arg vertex_buffers;
128 struct ac_arg rel_auto_id;
129 struct ac_arg vs_prim_id;
130 struct ac_arg vertex_index0;
131 /* VS states and layout of LS outputs / TCS inputs at the end
132 * [0] = clamp vertex color
133 * [1] = indexed
134 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
135 * max = 32*32*4 + 32*4
136 * [24:31] = stride between vertices in DW = num_inputs * 4
137 * max = 32*4
138 */
139 struct ac_arg vs_state_bits;
140 struct ac_arg vs_blit_inputs;
141 /* HW VS */
142 struct ac_arg streamout_config;
143 struct ac_arg streamout_write_index;
144 struct ac_arg streamout_offset[4];
145
146 /* API TCS & TES */
147 /* Layout of TCS outputs in the offchip buffer
148 * # 6 bits
149 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
150 * # 6 bits
151 * [6:11] = the number of output vertices per patch, max = 32
152 * # 20 bits
153 * [12:31] = the offset of per patch attributes in the buffer in bytes.
154 * max = NUM_PATCHES*32*32*16
155 */
156 struct ac_arg tcs_offchip_layout;
157
158 /* API TCS */
159 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
160 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
161 * [16:31] = TCS output patch0 offset for per-patch / 16
162 * max = (NUM_PATCHES + 1) * 32*32
163 */
164 struct ac_arg tcs_out_lds_offsets;
165 /* Layout of TCS outputs / TES inputs:
166 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
167 * max = 32*32*4 + 32*4
168 * [13:18] = gl_PatchVerticesIn, max = 32
169 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
170 */
171 struct ac_arg tcs_out_lds_layout;
172 struct ac_arg tcs_offchip_offset;
173 struct ac_arg tcs_factor_offset;
174
175 /* API TES */
176 struct ac_arg tes_offchip_addr;
177 struct ac_arg tes_u;
178 struct ac_arg tes_v;
179 struct ac_arg tes_rel_patch_id;
180 /* HW ES */
181 struct ac_arg es2gs_offset;
182 /* HW GS */
183 /* On gfx10:
184 * - bits 0..10: ordered_wave_id
185 * - bits 12..20: number of vertices in group
186 * - bits 22..30: number of primitives in group
187 */
188 struct ac_arg gs_tg_info;
189 /* API GS */
190 struct ac_arg gs2vs_offset;
191 struct ac_arg gs_wave_id; /* GFX6 */
192 struct ac_arg gs_vtx_offset[6]; /* in dwords (GFX6) */
193 struct ac_arg gs_vtx01_offset; /* in dwords (GFX9) */
194 struct ac_arg gs_vtx23_offset; /* in dwords (GFX9) */
195 struct ac_arg gs_vtx45_offset; /* in dwords (GFX9) */
196 /* PS */
197 struct ac_arg pos_fixed_pt;
198 /* CS */
199 struct ac_arg block_size;
200 struct ac_arg cs_user_data;
201
202 struct ac_llvm_compiler *compiler;
203
204 /* Preloaded descriptors. */
205 LLVMValueRef esgs_ring;
206 LLVMValueRef gsvs_ring[4];
207 LLVMValueRef tess_offchip_ring;
208
209 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
210 LLVMValueRef gs_next_vertex[4];
211 LLVMValueRef gs_curprim_verts[4];
212 LLVMValueRef gs_generated_prims[4];
213 LLVMValueRef gs_ngg_emit;
214 LLVMValueRef gs_ngg_scratch;
215 LLVMValueRef postponed_kill;
216 LLVMValueRef return_value;
217
218 LLVMTypeRef voidt;
219 LLVMTypeRef i1;
220 LLVMTypeRef i8;
221 LLVMTypeRef i32;
222 LLVMTypeRef i64;
223 LLVMTypeRef i128;
224 LLVMTypeRef f32;
225 LLVMTypeRef v2i32;
226 LLVMTypeRef v4i32;
227 LLVMTypeRef v4f32;
228 LLVMTypeRef v8i32;
229
230 LLVMValueRef i32_0;
231 LLVMValueRef i32_1;
232 LLVMValueRef i1false;
233 LLVMValueRef i1true;
234 };
235
236 static inline struct si_shader_context *
237 si_shader_context(struct lp_build_tgsi_context *bld_base)
238 {
239 return (struct si_shader_context*)bld_base;
240 }
241
242 static inline struct si_shader_context *
243 si_shader_context_from_abi(struct ac_shader_abi *abi)
244 {
245 struct si_shader_context *ctx = NULL;
246 return container_of(abi, ctx, abi);
247 }
248
249 void si_create_function(struct si_shader_context *ctx,
250 const char *name,
251 LLVMTypeRef *returns, unsigned num_returns,
252 unsigned max_workgroup_size);
253 unsigned si_llvm_compile(LLVMModuleRef M, struct si_shader_binary *binary,
254 struct ac_llvm_compiler *compiler,
255 struct pipe_debug_callback *debug,
256 bool less_optimized, unsigned wave_size);
257
258 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
259 enum tgsi_opcode_type type);
260
261 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
262 enum tgsi_opcode_type type, LLVMValueRef value);
263
264 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
265 LLVMValueRef index,
266 unsigned num);
267
268 void si_llvm_context_init(struct si_shader_context *ctx,
269 struct si_screen *sscreen,
270 struct ac_llvm_compiler *compiler,
271 unsigned wave_size,
272 unsigned ballot_mask_bits);
273 void si_llvm_context_set_ir(struct si_shader_context *ctx,
274 struct si_shader *shader,
275 struct nir_shader *nir);
276
277 void si_llvm_create_func(struct si_shader_context *ctx,
278 const char *name,
279 LLVMTypeRef *return_types, unsigned num_return_elems);
280
281 void si_llvm_dispose(struct si_shader_context *ctx);
282
283 void si_llvm_optimize_module(struct si_shader_context *ctx);
284
285 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
286 LLVMTypeRef type,
287 LLVMValueRef ptr,
288 LLVMValueRef ptr2);
289
290 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
291 const struct tgsi_full_src_register *reg,
292 enum tgsi_opcode_type type,
293 unsigned swizzle);
294
295 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
296
297 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
298 LLVMTypeRef type,
299 LLVMValueRef vertex_index,
300 LLVMValueRef param_index,
301 unsigned const_index,
302 unsigned location,
303 unsigned driver_location,
304 unsigned component,
305 unsigned num_components,
306 bool is_patch,
307 bool is_compact,
308 bool load_input);
309
310 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
311 unsigned input_index,
312 unsigned vtx_offset_param,
313 LLVMTypeRef type,
314 unsigned swizzle);
315
316 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
317 enum glsl_interp_mode interp,
318 unsigned location);
319
320 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
321 const struct tgsi_full_instruction *inst,
322 const struct tgsi_opcode_info *info,
323 unsigned index,
324 LLVMValueRef dst[4]);
325
326 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
327 const struct tgsi_ind_register *ind,
328 unsigned addr_mul, int rel_index);
329 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
330 const struct tgsi_ind_register *ind,
331 int rel_index, unsigned num);
332 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
333
334 void si_shader_context_init_alu(struct si_shader_context *ctx);
335 void si_shader_context_init_mem(struct si_shader_context *ctx);
336
337 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
338 LLVMValueRef list, LLVMValueRef index,
339 enum ac_descriptor_type type);
340 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
341 LLVMValueRef list, LLVMValueRef index,
342 enum ac_descriptor_type desc_type,
343 bool uses_store, bool bindless);
344 LLVMValueRef si_nir_emit_fbfetch(struct ac_shader_abi *abi);
345
346 void si_load_system_value(struct si_shader_context *ctx,
347 unsigned index,
348 const struct tgsi_full_declaration *decl);
349 void si_declare_compute_memory(struct si_shader_context *ctx);
350 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
351 const struct tgsi_full_declaration *decl);
352
353 LLVMValueRef si_get_primitive_id(struct si_shader_context *ctx,
354 unsigned swizzle);
355 void si_llvm_export_vs(struct si_shader_context *ctx,
356 struct si_shader_output_values *outputs,
357 unsigned noutput);
358 void si_emit_streamout_output(struct si_shader_context *ctx,
359 LLVMValueRef const *so_buffers,
360 LLVMValueRef const *so_write_offsets,
361 struct pipe_stream_output *stream_out,
362 struct si_shader_output_values *shader_out);
363
364 void si_llvm_load_input_vs(
365 struct si_shader_context *ctx,
366 unsigned input_index,
367 LLVMValueRef out[4]);
368 void si_llvm_load_input_fs(
369 struct si_shader_context *ctx,
370 unsigned input_index,
371 LLVMValueRef out[4]);
372
373 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
374
375 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
376 struct ac_arg param, unsigned rshift,
377 unsigned bitwidth);
378 LLVMValueRef si_is_es_thread(struct si_shader_context *ctx);
379 LLVMValueRef si_is_gs_thread(struct si_shader_context *ctx);
380
381 void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
382 unsigned max_outputs,
383 LLVMValueRef *addrs);
384 void gfx10_ngg_gs_emit_vertex(struct si_shader_context *ctx,
385 unsigned stream,
386 LLVMValueRef *addrs);
387 void gfx10_ngg_gs_emit_prologue(struct si_shader_context *ctx);
388 void gfx10_ngg_gs_emit_epilogue(struct si_shader_context *ctx);
389 void gfx10_ngg_calculate_subgroup_info(struct si_shader *shader);
390
391 #endif