src/gallium/drivers/radeonsi/si_shader_internal.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #ifndef SI_SHADER_PRIVATE_H
  25 #define SI_SHADER_PRIVATE_H
  26
  27 #include "si_shader.h"
  28 #include "gallivm/lp_bld_flow.h"
  29 #include "gallivm/lp_bld_init.h"
  30 #include "gallivm/lp_bld_tgsi.h"
  31 #include "tgsi/tgsi_parse.h"
  32 #include "ac_shader_abi.h"
  33 #include "ac_llvm_util.h"
  34 #include "ac_llvm_build.h"
  35
  36 #include <llvm-c/Core.h>
  37 #include <llvm-c/TargetMachine.h>
  38
  39 struct pipe_debug_callback;
  40 struct ac_shader_binary;
  41
  42 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
  43 #define RADEON_LLVM_MAX_INPUTS 32 * 4
  44 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
  45
  46 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
  47
  48 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
  49 #define RADEON_LLVM_MAX_ADDRS 16
  50
  51 struct si_llvm_flow;
  52
  53 struct si_shader_context {
  54         struct lp_build_tgsi_context bld_base;
  55         struct gallivm_state gallivm;
  56         struct ac_llvm_context ac;
  57         struct si_shader *shader;
  58         struct si_screen *screen;
  59
  60         unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
  61
  62         /* For clamping the non-constant index in resource indexing: */
  63         unsigned num_const_buffers;
  64         unsigned num_shader_buffers;
  65         unsigned num_images;
  66         unsigned num_samplers;
  67
  68         /* Whether the prolog will be compiled separately. */
  69         bool separate_prolog;
  70
  71         struct ac_shader_abi abi;
  72
  73         /** This function is responsible for initilizing the inputs array and will be
  74           * called once for each input declared in the TGSI shader.
  75           */
  76         void (*load_input)(struct si_shader_context *,
  77                            unsigned input_index,
  78                            const struct tgsi_full_declaration *decl,
  79                            LLVMValueRef out[4]);
  80
  81         /** This array contains the input values for the shader.  Typically these
  82           * values will be in the form of a target intrinsic that will inform the
  83           * backend how to load the actual inputs to the shader.
  84           */
  85         struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
  86         LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
  87         LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
  88         LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
  89
  90         /** This pointer is used to contain the temporary values.
  91           * The amount of temporary used in tgsi can't be bound to a max value and
  92           * thus we must allocate this array at runtime.
  93           */
  94         LLVMValueRef *temps;
  95         unsigned temps_count;
  96         LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
  97
  98         LLVMValueRef *imms;
  99         unsigned imms_num;
 100
 101         struct si_llvm_flow *flow;
 102         unsigned flow_depth;
 103         unsigned flow_depth_max;
 104
 105         struct lp_build_if_state merged_wrap_if_state;
 106
 107         struct tgsi_array_info *temp_arrays;
 108         LLVMValueRef *temp_array_allocas;
 109
 110         LLVMValueRef undef_alloca;
 111
 112         LLVMValueRef main_fn;
 113         LLVMTypeRef return_type;
 114
 115         /* Parameter indices for LLVMGetParam. */
 116         int param_rw_buffers;
 117         int param_const_and_shader_buffers;
 118         int param_samplers_and_images;
 119         int param_bindless_samplers_and_images;
 120         /* Common inputs for merged shaders. */
 121         int param_merged_wave_info;
 122         int param_merged_scratch_offset;
 123         /* API VS */
 124         int param_vertex_buffers;
 125         int param_rel_auto_id;
 126         int param_vs_prim_id;
 127         int param_vertex_index0;
 128         /* VS states and layout of LS outputs / TCS inputs at the end
 129          *   [0] = clamp vertex color
 130          *   [1] = indexed
 131          *   [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
 132          *            max = 32*32*4 + 32*4
 133          *   [24:31] = stride between vertices in DW = num_inputs * 4
 134          *             max = 32*4
 135          */
 136         int param_vs_state_bits;
 137         int param_vs_blit_inputs;
 138         /* HW VS */
 139         int param_streamout_config;
 140         int param_streamout_write_index;
 141         int param_streamout_offset[4];
 142
 143         /* API TCS & TES */
 144         /* Layout of TCS outputs in the offchip buffer
 145          * # 6 bits
 146          *   [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
 147          * # 6 bits
 148          *   [6:11] = the number of output vertices per patch, max = 32
 149          * # 20 bits
 150          *   [12:31] = the offset of per patch attributes in the buffer in bytes.
 151          *             max = NUM_PATCHES*32*32*16
 152          */
 153         int param_tcs_offchip_layout;
 154
 155         /* API TCS */
 156         /* Offsets where TCS outputs and TCS patch outputs live in LDS:
 157          *   [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
 158          *   [16:31] = TCS output patch0 offset for per-patch / 16
 159          *             max = (NUM_PATCHES + 1) * 32*32
 160          */
 161         int param_tcs_out_lds_offsets;
 162         /* Layout of TCS outputs / TES inputs:
 163          *   [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
 164          *            max = 32*32*4 + 32*4
 165          *   [26:31] = gl_PatchVerticesIn, max = 32
 166          */
 167         int param_tcs_out_lds_layout;
 168         int param_tcs_offchip_addr_base64k;
 169         int param_tcs_factor_addr_base64k;
 170         int param_tcs_offchip_offset;
 171         int param_tcs_factor_offset;
 172
 173         /* API TES */
 174         int param_tes_u;
 175         int param_tes_v;
 176         int param_tes_rel_patch_id;
 177         /* HW ES */
 178         int param_es2gs_offset;
 179         /* API GS */
 180         int param_gs2vs_offset;
 181         int param_gs_wave_id; /* GFX6 */
 182         LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
 183         int param_gs_vtx01_offset; /* in dwords (GFX9) */
 184         int param_gs_vtx23_offset; /* in dwords (GFX9) */
 185         int param_gs_vtx45_offset; /* in dwords (GFX9) */
 186         /* CS */
 187         int param_grid_size;
 188         int param_block_size;
 189         int param_block_id[3];
 190         int param_thread_id;
 191
 192         LLVMTargetMachineRef tm;
 193
 194         unsigned range_md_kind;
 195         unsigned fpmath_md_kind;
 196         LLVMValueRef fpmath_md_2p5_ulp;
 197
 198         /* Preloaded descriptors. */
 199         LLVMValueRef esgs_ring;
 200         LLVMValueRef gsvs_ring[4];
 201
 202         LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
 203         LLVMValueRef gs_next_vertex[4];
 204         LLVMValueRef postponed_kill;
 205         LLVMValueRef return_value;
 206
 207         LLVMTypeRef voidt;
 208         LLVMTypeRef i1;
 209         LLVMTypeRef i8;
 210         LLVMTypeRef i32;
 211         LLVMTypeRef i64;
 212         LLVMTypeRef i128;
 213         LLVMTypeRef f32;
 214         LLVMTypeRef v2i32;
 215         LLVMTypeRef v4i32;
 216         LLVMTypeRef v4f32;
 217         LLVMTypeRef v8i32;
 218
 219         LLVMValueRef i32_0;
 220         LLVMValueRef i32_1;
 221 };
 222
 223 static inline struct si_shader_context *
 224 si_shader_context(struct lp_build_tgsi_context *bld_base)
 225 {
 226         return (struct si_shader_context*)bld_base;
 227 }
 228
 229 static inline struct si_shader_context *
 230 si_shader_context_from_abi(struct ac_shader_abi *abi)
 231 {
 232         struct si_shader_context *ctx = NULL;
 233         return container_of(abi, ctx, abi);
 234 }
 235
 236 void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value);
 237
 238 unsigned si_llvm_compile(LLVMModuleRef M, struct ac_shader_binary *binary,
 239                          LLVMTargetMachineRef tm,
 240                          struct pipe_debug_callback *debug);
 241
 242 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
 243                           enum tgsi_opcode_type type);
 244
 245 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
 246                      enum tgsi_opcode_type type, LLVMValueRef value);
 247
 248 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
 249                                  LLVMValueRef index,
 250                                  unsigned num);
 251
 252 void si_llvm_context_init(struct si_shader_context *ctx,
 253                           struct si_screen *sscreen,
 254                           LLVMTargetMachineRef tm);
 255 void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
 256                               struct si_shader *shader);
 257
 258 void si_llvm_create_func(struct si_shader_context *ctx,
 259                          const char *name,
 260                          LLVMTypeRef *return_types, unsigned num_return_elems,
 261                          LLVMTypeRef *ParamTypes, unsigned ParamCount);
 262
 263 void si_llvm_dispose(struct si_shader_context *ctx);
 264
 265 void si_llvm_optimize_module(struct si_shader_context *ctx);
 266
 267 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
 268                                       LLVMTypeRef type,
 269                                       LLVMValueRef ptr,
 270                                       LLVMValueRef ptr2);
 271
 272 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 273                                 const struct tgsi_full_src_register *reg,
 274                                 enum tgsi_opcode_type type,
 275                                 unsigned swizzle);
 276
 277 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
 278                                    LLVMValueRef vertex_index,
 279                                    LLVMValueRef param_index,
 280                                    unsigned const_index,
 281                                    unsigned location,
 282                                    unsigned driver_location,
 283                                    unsigned component,
 284                                    unsigned num_components,
 285                                    bool is_patch,
 286                                    bool is_compact,
 287                                    bool load_input);
 288
 289 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
 290                                    unsigned input_index,
 291                                    unsigned vtx_offset_param,
 292                                    LLVMTypeRef type,
 293                                    unsigned swizzle);
 294
 295 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
 296                                         enum glsl_interp_mode interp,
 297                                         unsigned location);
 298
 299 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 300                         const struct tgsi_full_instruction *inst,
 301                         const struct tgsi_opcode_info *info,
 302                         unsigned index,
 303                         LLVMValueRef dst[4]);
 304
 305 /* Combine these with & instead of |. */
 306 #define NOOP_WAITCNT 0xf7f
 307 #define LGKM_CNT 0x07f
 308 #define VM_CNT 0xf70
 309
 310 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
 311                                    const struct tgsi_ind_register *ind,
 312                                    unsigned addr_mul, int rel_index);
 313 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 314                                            const struct tgsi_ind_register *ind,
 315                                            int rel_index, unsigned num);
 316
 317 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 318 void si_shader_context_init_mem(struct si_shader_context *ctx);
 319
 320 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
 321                                   LLVMValueRef list, LLVMValueRef index,
 322                                   enum ac_descriptor_type type);
 323 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
 324                                 LLVMValueRef list, LLVMValueRef index,
 325                                 enum ac_descriptor_type desc_type, bool dcc_off);
 326
 327 void si_load_system_value(struct si_shader_context *ctx,
 328                           unsigned index,
 329                           const struct tgsi_full_declaration *decl);
 330 void si_declare_compute_memory(struct si_shader_context *ctx,
 331                                const struct tgsi_full_declaration *decl);
 332
 333 void si_llvm_load_input_vs(
 334         struct si_shader_context *ctx,
 335         unsigned input_index,
 336         LLVMValueRef out[4]);
 337 void si_llvm_load_input_fs(
 338         struct si_shader_context *ctx,
 339         unsigned input_index,
 340         LLVMValueRef out[4]);
 341
 342 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
 343
 344 LLVMValueRef si_nir_load_input_gs(struct ac_shader_abi *abi,
 345                                   unsigned location,
 346                                   unsigned driver_location,
 347                                   unsigned component,
 348                                   unsigned num_components,
 349                                   unsigned vertex_index,
 350                                   unsigned const_index,
 351                                   LLVMTypeRef type);
 352
 353 #endif