2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #ifndef SI_SHADER_PRIVATE_H
25 #define SI_SHADER_PRIVATE_H
27 #include "si_shader.h"
28 #include "gallivm/lp_bld_init.h"
29 #include "gallivm/lp_bld_tgsi.h"
30 #include "tgsi/tgsi_parse.h"
31 #include "ac_llvm_util.h"
32 #include "ac_llvm_build.h"
34 #include <llvm-c/Core.h>
35 #include <llvm-c/TargetMachine.h>
37 struct pipe_debug_callback
;
38 struct ac_shader_binary
;
40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
44 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
46 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
47 #define RADEON_LLVM_MAX_ADDRS 16
51 struct si_shader_context
{
52 struct lp_build_tgsi_context bld_base
;
53 struct gallivm_state gallivm
;
54 struct ac_llvm_context ac
;
55 struct si_shader
*shader
;
56 struct si_screen
*screen
;
58 unsigned type
; /* PIPE_SHADER_* specifies the type of shader. */
60 /* For clamping the non-constant index in resource indexing: */
61 unsigned num_const_buffers
;
62 unsigned num_shader_buffers
;
64 unsigned num_samplers
;
66 /* Whether the prolog will be compiled separately. */
69 /** This function is responsible for initilizing the inputs array and will be
70 * called once for each input declared in the TGSI shader.
72 void (*load_input
)(struct si_shader_context
*,
74 const struct tgsi_full_declaration
*decl
,
77 void (*load_system_value
)(struct si_shader_context
*,
79 const struct tgsi_full_declaration
*decl
);
81 void (*declare_memory_region
)(struct si_shader_context
*,
82 const struct tgsi_full_declaration
*decl
);
84 /** This array contains the input values for the shader. Typically these
85 * values will be in the form of a target intrinsic that will inform the
86 * backend how to load the actual inputs to the shader.
88 struct tgsi_full_declaration input_decls
[RADEON_LLVM_MAX_INPUT_SLOTS
];
89 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
];
90 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
][TGSI_NUM_CHANNELS
];
91 LLVMValueRef addrs
[RADEON_LLVM_MAX_ADDRS
][TGSI_NUM_CHANNELS
];
93 /** This pointer is used to contain the temporary values.
94 * The amount of temporary used in tgsi can't be bound to a max value and
95 * thus we must allocate this array at runtime.
99 LLVMValueRef system_values
[RADEON_LLVM_MAX_SYSTEM_VALUES
];
104 struct si_llvm_flow
*flow
;
106 unsigned flow_depth_max
;
108 struct tgsi_array_info
*temp_arrays
;
109 LLVMValueRef
*temp_array_allocas
;
111 LLVMValueRef undef_alloca
;
113 LLVMValueRef main_fn
;
114 LLVMTypeRef return_type
;
116 /* Parameter indices for LLVMGetParam. */
117 int param_rw_buffers
;
118 int param_const_and_shader_buffers
;
119 int param_samplers_and_images
;
120 /* Common inputs for merged shaders. */
121 int param_merged_wave_info
;
122 int param_merged_scratch_offset
;
124 int param_vertex_buffers
;
125 int param_base_vertex
;
126 int param_start_instance
;
129 int param_rel_auto_id
;
130 int param_vs_prim_id
;
131 int param_instance_id
;
132 int param_vertex_index0
;
133 /* VS states and layout of LS outputs / TCS inputs at the end
134 * [0] = clamp vertex color
136 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
137 * max = 32*32*4 + 32*4
138 * [24:31] = stride between vertices in DW = num_inputs * 4
141 int param_vs_state_bits
;
143 int param_streamout_config
;
144 int param_streamout_write_index
;
145 int param_streamout_offset
[4];
148 /* Layout of TCS outputs in the offchip buffer
150 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
152 * [6:11] = the number of output vertices per patch, max = 32
154 * [12:31] = the offset of per patch attributes in the buffer in bytes.
155 * max = NUM_PATCHES*32*32*16
157 int param_tcs_offchip_layout
;
160 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
161 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
162 * [16:31] = TCS output patch0 offset for per-patch / 16
163 * max = (NUM_PATCHES + 1) * 32*32
165 int param_tcs_out_lds_offsets
;
166 /* Layout of TCS outputs / TES inputs:
167 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
168 * max = 32*32*4 + 32*4
169 * [13:20] = stride between output vertices in DW = num_inputs * 4
171 * [26:31] = gl_PatchVerticesIn, max = 32
173 int param_tcs_out_lds_layout
;
174 int param_tcs_offchip_addr_base64k
;
175 int param_tcs_factor_addr_base64k
;
176 int param_tcs_offchip_offset
;
177 int param_tcs_factor_offset
;
178 int param_tcs_patch_id
;
179 int param_tcs_rel_ids
;
184 int param_tes_rel_patch_id
;
185 int param_tes_patch_id
;
187 int param_es2gs_offset
;
189 int param_gs2vs_offset
;
190 int param_gs_wave_id
; /* GFX6 */
191 int param_gs_vtx0_offset
; /* in dwords (GFX6) */
192 int param_gs_vtx1_offset
; /* in dwords (GFX6) */
193 int param_gs_prim_id
;
194 int param_gs_vtx2_offset
; /* in dwords (GFX6) */
195 int param_gs_vtx3_offset
; /* in dwords (GFX6) */
196 int param_gs_vtx4_offset
; /* in dwords (GFX6) */
197 int param_gs_vtx5_offset
; /* in dwords (GFX6) */
198 int param_gs_instance_id
;
199 int param_gs_vtx01_offset
; /* in dwords (GFX9) */
200 int param_gs_vtx23_offset
; /* in dwords (GFX9) */
201 int param_gs_vtx45_offset
; /* in dwords (GFX9) */
204 int param_block_size
;
205 int param_block_id
[3];
208 LLVMTargetMachineRef tm
;
210 unsigned range_md_kind
;
211 unsigned fpmath_md_kind
;
212 LLVMValueRef fpmath_md_2p5_ulp
;
214 /* Preloaded descriptors. */
215 LLVMValueRef esgs_ring
;
216 LLVMValueRef gsvs_ring
[4];
219 LLVMValueRef gs_next_vertex
[4];
220 LLVMValueRef postponed_kill
;
221 LLVMValueRef return_value
;
238 LLVMValueRef shared_memory
;
241 static inline struct si_shader_context
*
242 si_shader_context(struct lp_build_tgsi_context
*bld_base
)
244 return (struct si_shader_context
*)bld_base
;
247 void si_llvm_add_attribute(LLVMValueRef F
, const char *name
, int value
);
249 unsigned si_llvm_compile(LLVMModuleRef M
, struct ac_shader_binary
*binary
,
250 LLVMTargetMachineRef tm
,
251 struct pipe_debug_callback
*debug
);
253 LLVMTypeRef
tgsi2llvmtype(struct lp_build_tgsi_context
*bld_base
,
254 enum tgsi_opcode_type type
);
256 LLVMValueRef
bitcast(struct lp_build_tgsi_context
*bld_base
,
257 enum tgsi_opcode_type type
, LLVMValueRef value
);
259 LLVMValueRef
si_llvm_bound_index(struct si_shader_context
*ctx
,
263 void si_llvm_context_init(struct si_shader_context
*ctx
,
264 struct si_screen
*sscreen
,
265 LLVMTargetMachineRef tm
);
266 void si_llvm_context_set_tgsi(struct si_shader_context
*ctx
,
267 struct si_shader
*shader
);
269 void si_llvm_create_func(struct si_shader_context
*ctx
,
271 LLVMTypeRef
*return_types
, unsigned num_return_elems
,
272 LLVMTypeRef
*ParamTypes
, unsigned ParamCount
);
274 void si_llvm_dispose(struct si_shader_context
*ctx
);
276 void si_llvm_optimize_module(struct si_shader_context
*ctx
);
278 LLVMValueRef
si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context
*bld_base
,
279 enum tgsi_opcode_type type
,
283 LLVMValueRef
si_llvm_emit_fetch(struct lp_build_tgsi_context
*bld_base
,
284 const struct tgsi_full_src_register
*reg
,
285 enum tgsi_opcode_type type
,
288 void si_llvm_emit_store(struct lp_build_tgsi_context
*bld_base
,
289 const struct tgsi_full_instruction
*inst
,
290 const struct tgsi_opcode_info
*info
,
291 LLVMValueRef dst
[4]);
293 /* Combine these with & instead of |. */
294 #define NOOP_WAITCNT 0xf7f
295 #define LGKM_CNT 0x07f
298 void si_emit_waitcnt(struct si_shader_context
*ctx
, unsigned simm16
);
300 LLVMValueRef
si_get_bounded_indirect_index(struct si_shader_context
*ctx
,
301 const struct tgsi_ind_register
*ind
,
302 int rel_index
, unsigned num
);
304 LLVMTypeRef
si_const_array(LLVMTypeRef elem_type
, int num_elements
);
306 void si_shader_context_init_alu(struct lp_build_tgsi_context
*bld_base
);
307 void si_shader_context_init_mem(struct si_shader_context
*ctx
);