2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #ifndef SI_SHADER_PRIVATE_H
25 #define SI_SHADER_PRIVATE_H
27 #include "si_shader.h"
28 #include "gallivm/lp_bld_init.h"
29 #include "gallivm/lp_bld_tgsi.h"
30 #include "tgsi/tgsi_parse.h"
31 #include "ac_llvm_util.h"
32 #include "ac_llvm_build.h"
34 #include <llvm-c/Core.h>
35 #include <llvm-c/TargetMachine.h>
37 struct pipe_debug_callback
;
38 struct ac_shader_binary
;
40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
44 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
46 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
47 #define RADEON_LLVM_MAX_ADDRS 16
51 struct si_shader_context
{
52 struct lp_build_tgsi_context bld_base
;
53 struct gallivm_state gallivm
;
54 struct ac_llvm_context ac
;
55 struct si_shader
*shader
;
56 struct si_screen
*screen
;
58 unsigned type
; /* PIPE_SHADER_* specifies the type of shader. */
60 /* Whether the prolog will be compiled separately. */
63 /** This function is responsible for initilizing the inputs array and will be
64 * called once for each input declared in the TGSI shader.
66 void (*load_input
)(struct si_shader_context
*,
68 const struct tgsi_full_declaration
*decl
,
71 void (*load_system_value
)(struct si_shader_context
*,
73 const struct tgsi_full_declaration
*decl
);
75 void (*declare_memory_region
)(struct si_shader_context
*,
76 const struct tgsi_full_declaration
*decl
);
78 /** This array contains the input values for the shader. Typically these
79 * values will be in the form of a target intrinsic that will inform the
80 * backend how to load the actual inputs to the shader.
82 struct tgsi_full_declaration input_decls
[RADEON_LLVM_MAX_INPUT_SLOTS
];
83 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
];
84 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
][TGSI_NUM_CHANNELS
];
85 LLVMValueRef addrs
[RADEON_LLVM_MAX_ADDRS
][TGSI_NUM_CHANNELS
];
87 /** This pointer is used to contain the temporary values.
88 * The amount of temporary used in tgsi can't be bound to a max value and
89 * thus we must allocate this array at runtime.
93 LLVMValueRef system_values
[RADEON_LLVM_MAX_SYSTEM_VALUES
];
98 struct si_llvm_flow
*flow
;
100 unsigned flow_depth_max
;
102 struct tgsi_array_info
*temp_arrays
;
103 LLVMValueRef
*temp_array_allocas
;
105 LLVMValueRef undef_alloca
;
107 LLVMValueRef main_fn
;
108 LLVMTypeRef return_type
;
110 /* Parameter indices for LLVMGetParam. */
111 int param_rw_buffers
;
112 int param_const_buffers
;
115 int param_shader_buffers
;
116 /* Common inputs for merged shaders. */
117 int param_merged_wave_info
;
118 int param_merged_scratch_offset
;
120 int param_vertex_buffers
;
121 int param_base_vertex
;
122 int param_start_instance
;
125 int param_rel_auto_id
;
126 int param_vs_prim_id
;
127 int param_instance_id
;
128 int param_vertex_index0
;
129 /* VS states and layout of LS outputs / TCS inputs at the end
130 * [0] = clamp vertex color
132 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
134 * [24:31] = stride between vertices in DW = num_inputs * 4
137 int param_vs_state_bits
;
139 int param_streamout_config
;
140 int param_streamout_write_index
;
141 int param_streamout_offset
[4];
144 /* Layout of TCS outputs in the offchip buffer
145 * [0:8] = the number of patches per threadgroup.
146 * [9:15] = the number of output vertices per patch.
147 * [16:31] = the offset of per patch attributes in the buffer in bytes. */
148 int param_tcs_offchip_layout
;
151 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
152 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
153 * [16:31] = TCS output patch0 offset for per-patch / 16
154 * max = NUM_PATCHES*32*32* + 32*32
156 int param_tcs_out_lds_offsets
;
157 /* Layout of TCS outputs / TES inputs:
158 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
160 * [13:20] = stride between output vertices in DW = num_inputs * 4
162 * [26:31] = gl_PatchVerticesIn, max = 32
164 int param_tcs_out_lds_layout
;
165 int param_tcs_offchip_addr_base64k
;
166 int param_tcs_factor_addr_base64k
;
167 int param_tcs_offchip_offset
;
168 int param_tcs_factor_offset
;
169 int param_tcs_patch_id
;
170 int param_tcs_rel_ids
;
175 int param_tes_rel_patch_id
;
176 int param_tes_patch_id
;
178 int param_es2gs_offset
;
180 int param_gs2vs_offset
;
181 int param_gs_wave_id
; /* GFX6 */
182 int param_gs_vtx0_offset
; /* in dwords (GFX6) */
183 int param_gs_vtx1_offset
; /* in dwords (GFX6) */
184 int param_gs_prim_id
;
185 int param_gs_vtx2_offset
; /* in dwords (GFX6) */
186 int param_gs_vtx3_offset
; /* in dwords (GFX6) */
187 int param_gs_vtx4_offset
; /* in dwords (GFX6) */
188 int param_gs_vtx5_offset
; /* in dwords (GFX6) */
189 int param_gs_instance_id
;
190 int param_gs_vtx01_offset
; /* in dwords (GFX9) */
191 int param_gs_vtx23_offset
; /* in dwords (GFX9) */
192 int param_gs_vtx45_offset
; /* in dwords (GFX9) */
194 LLVMTargetMachineRef tm
;
196 unsigned range_md_kind
;
197 unsigned fpmath_md_kind
;
198 LLVMValueRef fpmath_md_2p5_ulp
;
200 /* Preloaded descriptors. */
201 LLVMValueRef esgs_ring
;
202 LLVMValueRef gsvs_ring
[4];
205 LLVMValueRef gs_next_vertex
[4];
206 LLVMValueRef return_value
;
224 LLVMValueRef shared_memory
;
227 static inline struct si_shader_context
*
228 si_shader_context(struct lp_build_tgsi_context
*bld_base
)
230 return (struct si_shader_context
*)bld_base
;
233 void si_llvm_add_attribute(LLVMValueRef F
, const char *name
, int value
);
234 void si_llvm_shader_type(LLVMValueRef F
, unsigned type
);
236 LLVMTargetRef
si_llvm_get_amdgpu_target(const char *triple
);
238 unsigned si_llvm_compile(LLVMModuleRef M
, struct ac_shader_binary
*binary
,
239 LLVMTargetMachineRef tm
,
240 struct pipe_debug_callback
*debug
);
242 LLVMTypeRef
tgsi2llvmtype(struct lp_build_tgsi_context
*bld_base
,
243 enum tgsi_opcode_type type
);
245 LLVMValueRef
bitcast(struct lp_build_tgsi_context
*bld_base
,
246 enum tgsi_opcode_type type
, LLVMValueRef value
);
248 LLVMValueRef
si_llvm_bound_index(struct si_shader_context
*ctx
,
252 void si_llvm_context_init(struct si_shader_context
*ctx
,
253 struct si_screen
*sscreen
,
254 LLVMTargetMachineRef tm
);
255 void si_llvm_context_set_tgsi(struct si_shader_context
*ctx
,
256 struct si_shader
*shader
);
258 void si_llvm_create_func(struct si_shader_context
*ctx
,
260 LLVMTypeRef
*return_types
, unsigned num_return_elems
,
261 LLVMTypeRef
*ParamTypes
, unsigned ParamCount
);
263 void si_llvm_dispose(struct si_shader_context
*ctx
);
265 void si_llvm_finalize_module(struct si_shader_context
*ctx
,
268 LLVMValueRef
si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context
*bld_base
,
269 enum tgsi_opcode_type type
,
273 LLVMValueRef
si_llvm_emit_fetch(struct lp_build_tgsi_context
*bld_base
,
274 const struct tgsi_full_src_register
*reg
,
275 enum tgsi_opcode_type type
,
278 void si_llvm_emit_store(struct lp_build_tgsi_context
*bld_base
,
279 const struct tgsi_full_instruction
*inst
,
280 const struct tgsi_opcode_info
*info
,
281 LLVMValueRef dst
[4]);
283 void si_shader_context_init_alu(struct lp_build_tgsi_context
*bld_base
);