radeonsi/gfx10: generate VS and TES as NGG merged ESGS shaders
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_init.h"
31 #include "gallivm/lp_bld_tgsi.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "ac_shader_abi.h"
34
35 #include <llvm-c/Core.h>
36 #include <llvm-c/TargetMachine.h>
37
38 struct pipe_debug_callback;
39
40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
43
44 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
45 #define RADEON_LLVM_MAX_ADDRS 16
46
47 enum si_arg_regfile {
48 ARG_SGPR,
49 ARG_VGPR
50 };
51
52 /**
53 * Used to collect types and other info about arguments of the LLVM function
54 * before the function is created.
55 */
56 struct si_function_info {
57 LLVMTypeRef types[100];
58 LLVMValueRef *assign[100];
59 unsigned num_sgpr_params;
60 unsigned num_params;
61 };
62
63 struct si_shader_output_values {
64 LLVMValueRef values[4];
65 unsigned semantic_name;
66 unsigned semantic_index;
67 ubyte vertex_stream[4];
68 };
69
70 struct si_shader_context {
71 struct lp_build_tgsi_context bld_base;
72 struct gallivm_state gallivm;
73 struct ac_llvm_context ac;
74 struct si_shader *shader;
75 struct si_screen *screen;
76
77 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
78
79 /* For clamping the non-constant index in resource indexing: */
80 unsigned num_const_buffers;
81 unsigned num_shader_buffers;
82 unsigned num_images;
83 unsigned num_samplers;
84
85 struct ac_shader_abi abi;
86
87 /** This function is responsible for initilizing the inputs array and will be
88 * called once for each input declared in the TGSI shader.
89 */
90 void (*load_input)(struct si_shader_context *,
91 unsigned input_index,
92 const struct tgsi_full_declaration *decl,
93 LLVMValueRef out[4]);
94
95 /** This array contains the input values for the shader. Typically these
96 * values will be in the form of a target intrinsic that will inform the
97 * backend how to load the actual inputs to the shader.
98 */
99 struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
100 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
101 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
102 LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
103
104 /** This pointer is used to contain the temporary values.
105 * The amount of temporary used in tgsi can't be bound to a max value and
106 * thus we must allocate this array at runtime.
107 */
108 LLVMValueRef *temps;
109 unsigned temps_count;
110 LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
111
112 LLVMValueRef *imms;
113 unsigned imms_num;
114
115 struct lp_build_if_state merged_wrap_if_state;
116
117 struct tgsi_array_info *temp_arrays;
118 LLVMValueRef *temp_array_allocas;
119
120 LLVMValueRef undef_alloca;
121
122 LLVMValueRef main_fn;
123 LLVMTypeRef return_type;
124
125 /* Parameter indices for LLVMGetParam. */
126 int param_rw_buffers;
127 int param_const_and_shader_buffers;
128 int param_samplers_and_images;
129 int param_bindless_samplers_and_images;
130 /* Common inputs for merged shaders. */
131 int param_merged_wave_info;
132 int param_merged_scratch_offset;
133 /* API VS */
134 int param_vertex_buffers;
135 int param_rel_auto_id;
136 int param_vs_prim_id;
137 int param_vertex_index0;
138 /* VS states and layout of LS outputs / TCS inputs at the end
139 * [0] = clamp vertex color
140 * [1] = indexed
141 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
142 * max = 32*32*4 + 32*4
143 * [24:31] = stride between vertices in DW = num_inputs * 4
144 * max = 32*4
145 */
146 int param_vs_state_bits;
147 int param_vs_blit_inputs;
148 /* HW VS */
149 int param_streamout_config;
150 int param_streamout_write_index;
151 int param_streamout_offset[4];
152
153 /* API TCS & TES */
154 /* Layout of TCS outputs in the offchip buffer
155 * # 6 bits
156 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
157 * # 6 bits
158 * [6:11] = the number of output vertices per patch, max = 32
159 * # 20 bits
160 * [12:31] = the offset of per patch attributes in the buffer in bytes.
161 * max = NUM_PATCHES*32*32*16
162 */
163 int param_tcs_offchip_layout;
164
165 /* API TCS */
166 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
167 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
168 * [16:31] = TCS output patch0 offset for per-patch / 16
169 * max = (NUM_PATCHES + 1) * 32*32
170 */
171 int param_tcs_out_lds_offsets;
172 /* Layout of TCS outputs / TES inputs:
173 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
174 * max = 32*32*4 + 32*4
175 * [13:18] = gl_PatchVerticesIn, max = 32
176 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
177 */
178 int param_tcs_out_lds_layout;
179 int param_tcs_offchip_offset;
180 int param_tcs_factor_offset;
181
182 /* API TES */
183 int param_tes_offchip_addr;
184 int param_tes_u;
185 int param_tes_v;
186 int param_tes_rel_patch_id;
187 /* HW ES */
188 int param_es2gs_offset;
189 /* HW GS */
190 /* On gfx10:
191 * - bits 0..10: ordered_wave_id
192 * - bits 12..20: number of vertices in group
193 * - bits 22..30: number of primitives in group
194 */
195 LLVMValueRef gs_tg_info;
196 /* API GS */
197 int param_gs2vs_offset;
198 int param_gs_wave_id; /* GFX6 */
199 LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
200 int param_gs_vtx01_offset; /* in dwords (GFX9) */
201 int param_gs_vtx23_offset; /* in dwords (GFX9) */
202 int param_gs_vtx45_offset; /* in dwords (GFX9) */
203 /* CS */
204 int param_block_size;
205 int param_cs_user_data;
206
207 struct ac_llvm_compiler *compiler;
208
209 /* Preloaded descriptors. */
210 LLVMValueRef esgs_ring;
211 LLVMValueRef gsvs_ring[4];
212 LLVMValueRef tess_offchip_ring;
213
214 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
215 LLVMValueRef gs_next_vertex[4];
216 LLVMValueRef postponed_kill;
217 LLVMValueRef return_value;
218
219 LLVMTypeRef voidt;
220 LLVMTypeRef i1;
221 LLVMTypeRef i8;
222 LLVMTypeRef i32;
223 LLVMTypeRef i64;
224 LLVMTypeRef i128;
225 LLVMTypeRef f32;
226 LLVMTypeRef v2i32;
227 LLVMTypeRef v4i32;
228 LLVMTypeRef v4f32;
229 LLVMTypeRef v8i32;
230
231 LLVMValueRef i32_0;
232 LLVMValueRef i32_1;
233 LLVMValueRef i1false;
234 LLVMValueRef i1true;
235 };
236
237 static inline struct si_shader_context *
238 si_shader_context(struct lp_build_tgsi_context *bld_base)
239 {
240 return (struct si_shader_context*)bld_base;
241 }
242
243 static inline struct si_shader_context *
244 si_shader_context_from_abi(struct ac_shader_abi *abi)
245 {
246 struct si_shader_context *ctx = NULL;
247 return container_of(abi, ctx, abi);
248 }
249
250 void si_init_function_info(struct si_function_info *fninfo);
251 unsigned add_arg_assign(struct si_function_info *fninfo,
252 enum si_arg_regfile regfile, LLVMTypeRef type,
253 LLVMValueRef *assign);
254 void si_create_function(struct si_shader_context *ctx,
255 const char *name,
256 LLVMTypeRef *returns, unsigned num_returns,
257 struct si_function_info *fninfo,
258 unsigned max_workgroup_size);
259 unsigned si_llvm_compile(LLVMModuleRef M, struct si_shader_binary *binary,
260 struct ac_llvm_compiler *compiler,
261 struct pipe_debug_callback *debug,
262 bool less_optimized);
263
264 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
265 enum tgsi_opcode_type type);
266
267 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
268 enum tgsi_opcode_type type, LLVMValueRef value);
269
270 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
271 LLVMValueRef index,
272 unsigned num);
273
274 void si_llvm_context_init(struct si_shader_context *ctx,
275 struct si_screen *sscreen,
276 struct ac_llvm_compiler *compiler);
277 void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
278 struct si_shader *shader);
279
280 void si_llvm_create_func(struct si_shader_context *ctx,
281 const char *name,
282 LLVMTypeRef *return_types, unsigned num_return_elems,
283 LLVMTypeRef *ParamTypes, unsigned ParamCount);
284
285 void si_llvm_dispose(struct si_shader_context *ctx);
286
287 void si_llvm_optimize_module(struct si_shader_context *ctx);
288
289 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
290 LLVMTypeRef type,
291 LLVMValueRef ptr,
292 LLVMValueRef ptr2);
293
294 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
295 const struct tgsi_full_src_register *reg,
296 enum tgsi_opcode_type type,
297 unsigned swizzle);
298
299 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
300
301 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
302 LLVMTypeRef type,
303 LLVMValueRef vertex_index,
304 LLVMValueRef param_index,
305 unsigned const_index,
306 unsigned location,
307 unsigned driver_location,
308 unsigned component,
309 unsigned num_components,
310 bool is_patch,
311 bool is_compact,
312 bool load_input);
313
314 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
315 unsigned input_index,
316 unsigned vtx_offset_param,
317 LLVMTypeRef type,
318 unsigned swizzle);
319
320 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
321 enum glsl_interp_mode interp,
322 unsigned location);
323
324 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
325 const struct tgsi_full_instruction *inst,
326 const struct tgsi_opcode_info *info,
327 unsigned index,
328 LLVMValueRef dst[4]);
329
330 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
331 const struct tgsi_ind_register *ind,
332 unsigned addr_mul, int rel_index);
333 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
334 const struct tgsi_ind_register *ind,
335 int rel_index, unsigned num);
336 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
337
338 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
339 void si_shader_context_init_mem(struct si_shader_context *ctx);
340
341 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
342 LLVMValueRef list, LLVMValueRef index,
343 enum ac_descriptor_type type);
344 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
345 LLVMValueRef list, LLVMValueRef index,
346 enum ac_descriptor_type desc_type, bool dcc_off,
347 bool bindless);
348
349 void si_load_system_value(struct si_shader_context *ctx,
350 unsigned index,
351 const struct tgsi_full_declaration *decl);
352 void si_declare_compute_memory(struct si_shader_context *ctx);
353 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
354 const struct tgsi_full_declaration *decl);
355
356 LLVMValueRef si_get_primitive_id(struct si_shader_context *ctx,
357 unsigned swizzle);
358 void si_llvm_export_vs(struct si_shader_context *ctx,
359 struct si_shader_output_values *outputs,
360 unsigned noutput);
361 void si_emit_streamout_output(struct si_shader_context *ctx,
362 LLVMValueRef const *so_buffers,
363 LLVMValueRef const *so_write_offsets,
364 struct pipe_stream_output *stream_out,
365 struct si_shader_output_values *shader_out);
366
367 void si_llvm_load_input_vs(
368 struct si_shader_context *ctx,
369 unsigned input_index,
370 LLVMValueRef out[4]);
371 void si_llvm_load_input_fs(
372 struct si_shader_context *ctx,
373 unsigned input_index,
374 LLVMValueRef out[4]);
375
376 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
377
378 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
379 unsigned param, unsigned rshift,
380 unsigned bitwidth);
381
382 void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
383 unsigned max_outputs,
384 LLVMValueRef *addrs);
385
386 #endif