radeonsi: add struct si_compiler containing LLVMTargetMachineRef
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_init.h"
31 #include "gallivm/lp_bld_tgsi.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "ac_shader_abi.h"
34 #include "ac_llvm_util.h"
35 #include "ac_llvm_build.h"
36
37 #include <llvm-c/Core.h>
38 #include <llvm-c/TargetMachine.h>
39
40 struct pipe_debug_callback;
41 struct ac_shader_binary;
42
43 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
44 #define RADEON_LLVM_MAX_INPUTS 32 * 4
45 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
46
47 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
48 #define RADEON_LLVM_MAX_ADDRS 16
49
50 struct si_shader_context {
51 struct lp_build_tgsi_context bld_base;
52 struct gallivm_state gallivm;
53 struct ac_llvm_context ac;
54 struct si_shader *shader;
55 struct si_screen *screen;
56
57 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
58
59 /* For clamping the non-constant index in resource indexing: */
60 unsigned num_const_buffers;
61 unsigned num_shader_buffers;
62 unsigned num_images;
63 unsigned num_samplers;
64
65 /* Whether the prolog will be compiled separately. */
66 bool separate_prolog;
67
68 struct ac_shader_abi abi;
69
70 /** This function is responsible for initilizing the inputs array and will be
71 * called once for each input declared in the TGSI shader.
72 */
73 void (*load_input)(struct si_shader_context *,
74 unsigned input_index,
75 const struct tgsi_full_declaration *decl,
76 LLVMValueRef out[4]);
77
78 /** This array contains the input values for the shader. Typically these
79 * values will be in the form of a target intrinsic that will inform the
80 * backend how to load the actual inputs to the shader.
81 */
82 struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
83 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
84 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
85 LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
86
87 /** This pointer is used to contain the temporary values.
88 * The amount of temporary used in tgsi can't be bound to a max value and
89 * thus we must allocate this array at runtime.
90 */
91 LLVMValueRef *temps;
92 unsigned temps_count;
93 LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
94
95 LLVMValueRef *imms;
96 unsigned imms_num;
97
98 struct lp_build_if_state merged_wrap_if_state;
99
100 struct tgsi_array_info *temp_arrays;
101 LLVMValueRef *temp_array_allocas;
102
103 LLVMValueRef undef_alloca;
104
105 LLVMValueRef main_fn;
106 LLVMTypeRef return_type;
107
108 /* Parameter indices for LLVMGetParam. */
109 int param_rw_buffers;
110 int param_const_and_shader_buffers;
111 int param_samplers_and_images;
112 int param_bindless_samplers_and_images;
113 /* Common inputs for merged shaders. */
114 int param_merged_wave_info;
115 int param_merged_scratch_offset;
116 /* API VS */
117 int param_vertex_buffers;
118 int param_rel_auto_id;
119 int param_vs_prim_id;
120 int param_vertex_index0;
121 /* VS states and layout of LS outputs / TCS inputs at the end
122 * [0] = clamp vertex color
123 * [1] = indexed
124 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
125 * max = 32*32*4 + 32*4
126 * [24:31] = stride between vertices in DW = num_inputs * 4
127 * max = 32*4
128 */
129 int param_vs_state_bits;
130 int param_vs_blit_inputs;
131 /* HW VS */
132 int param_streamout_config;
133 int param_streamout_write_index;
134 int param_streamout_offset[4];
135
136 /* API TCS & TES */
137 /* Layout of TCS outputs in the offchip buffer
138 * # 6 bits
139 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
140 * # 6 bits
141 * [6:11] = the number of output vertices per patch, max = 32
142 * # 20 bits
143 * [12:31] = the offset of per patch attributes in the buffer in bytes.
144 * max = NUM_PATCHES*32*32*16
145 */
146 int param_tcs_offchip_layout;
147
148 /* API TCS */
149 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
150 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
151 * [16:31] = TCS output patch0 offset for per-patch / 16
152 * max = (NUM_PATCHES + 1) * 32*32
153 */
154 int param_tcs_out_lds_offsets;
155 /* Layout of TCS outputs / TES inputs:
156 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
157 * max = 32*32*4 + 32*4
158 * [13:18] = gl_PatchVerticesIn, max = 32
159 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
160 */
161 int param_tcs_out_lds_layout;
162 int param_tcs_offchip_offset;
163 int param_tcs_factor_offset;
164
165 /* API TES */
166 int param_tes_offchip_addr;
167 int param_tes_u;
168 int param_tes_v;
169 int param_tes_rel_patch_id;
170 /* HW ES */
171 int param_es2gs_offset;
172 /* API GS */
173 int param_gs2vs_offset;
174 int param_gs_wave_id; /* GFX6 */
175 LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
176 int param_gs_vtx01_offset; /* in dwords (GFX9) */
177 int param_gs_vtx23_offset; /* in dwords (GFX9) */
178 int param_gs_vtx45_offset; /* in dwords (GFX9) */
179 /* CS */
180 int param_block_size;
181
182 struct si_compiler *compiler;
183
184 /* Preloaded descriptors. */
185 LLVMValueRef esgs_ring;
186 LLVMValueRef gsvs_ring[4];
187 LLVMValueRef tess_offchip_ring;
188
189 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
190 LLVMValueRef gs_next_vertex[4];
191 LLVMValueRef postponed_kill;
192 LLVMValueRef return_value;
193
194 LLVMTypeRef voidt;
195 LLVMTypeRef i1;
196 LLVMTypeRef i8;
197 LLVMTypeRef i32;
198 LLVMTypeRef i64;
199 LLVMTypeRef i128;
200 LLVMTypeRef f32;
201 LLVMTypeRef v2i32;
202 LLVMTypeRef v4i32;
203 LLVMTypeRef v4f32;
204 LLVMTypeRef v8i32;
205
206 LLVMValueRef i32_0;
207 LLVMValueRef i32_1;
208 };
209
210 static inline struct si_shader_context *
211 si_shader_context(struct lp_build_tgsi_context *bld_base)
212 {
213 return (struct si_shader_context*)bld_base;
214 }
215
216 static inline struct si_shader_context *
217 si_shader_context_from_abi(struct ac_shader_abi *abi)
218 {
219 struct si_shader_context *ctx = NULL;
220 return container_of(abi, ctx, abi);
221 }
222
223 unsigned si_llvm_compile(LLVMModuleRef M, struct ac_shader_binary *binary,
224 struct si_compiler *compiler,
225 struct pipe_debug_callback *debug);
226
227 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
228 enum tgsi_opcode_type type);
229
230 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
231 enum tgsi_opcode_type type, LLVMValueRef value);
232
233 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
234 LLVMValueRef index,
235 unsigned num);
236
237 void si_llvm_context_init(struct si_shader_context *ctx,
238 struct si_screen *sscreen,
239 struct si_compiler *compiler);
240 void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
241 struct si_shader *shader);
242
243 void si_llvm_create_func(struct si_shader_context *ctx,
244 const char *name,
245 LLVMTypeRef *return_types, unsigned num_return_elems,
246 LLVMTypeRef *ParamTypes, unsigned ParamCount);
247
248 void si_llvm_dispose(struct si_shader_context *ctx);
249
250 void si_llvm_optimize_module(struct si_shader_context *ctx);
251
252 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
253 LLVMTypeRef type,
254 LLVMValueRef ptr,
255 LLVMValueRef ptr2);
256
257 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
258 const struct tgsi_full_src_register *reg,
259 enum tgsi_opcode_type type,
260 unsigned swizzle);
261
262 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
263
264 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
265 LLVMTypeRef type,
266 LLVMValueRef vertex_index,
267 LLVMValueRef param_index,
268 unsigned const_index,
269 unsigned location,
270 unsigned driver_location,
271 unsigned component,
272 unsigned num_components,
273 bool is_patch,
274 bool is_compact,
275 bool load_input);
276
277 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
278 unsigned input_index,
279 unsigned vtx_offset_param,
280 LLVMTypeRef type,
281 unsigned swizzle);
282
283 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
284 enum glsl_interp_mode interp,
285 unsigned location);
286
287 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
288 const struct tgsi_full_instruction *inst,
289 const struct tgsi_opcode_info *info,
290 unsigned index,
291 LLVMValueRef dst[4]);
292
293 /* Combine these with & instead of |. */
294 #define NOOP_WAITCNT 0xf7f
295 #define LGKM_CNT 0x07f
296 #define VM_CNT 0xf70
297
298 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
299 const struct tgsi_ind_register *ind,
300 unsigned addr_mul, int rel_index);
301 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
302 const struct tgsi_ind_register *ind,
303 int rel_index, unsigned num);
304 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
305
306 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
307 void si_shader_context_init_mem(struct si_shader_context *ctx);
308
309 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
310 LLVMValueRef list, LLVMValueRef index,
311 enum ac_descriptor_type type);
312 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
313 LLVMValueRef list, LLVMValueRef index,
314 enum ac_descriptor_type desc_type, bool dcc_off);
315
316 void si_load_system_value(struct si_shader_context *ctx,
317 unsigned index,
318 const struct tgsi_full_declaration *decl);
319 void si_declare_compute_memory(struct si_shader_context *ctx);
320 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
321 const struct tgsi_full_declaration *decl);
322
323 void si_llvm_load_input_vs(
324 struct si_shader_context *ctx,
325 unsigned input_index,
326 LLVMValueRef out[4]);
327 void si_llvm_load_input_fs(
328 struct si_shader_context *ctx,
329 unsigned input_index,
330 LLVMValueRef out[4]);
331
332 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
333
334 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
335 unsigned param, unsigned rshift,
336 unsigned bitwidth);
337
338 #endif