radeonsi/gfx10: implement NGG culling for 4x wave32 subgroups
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "ac_shader_abi.h"
30
31 struct pipe_debug_callback;
32
33 #define RADEON_LLVM_MAX_INPUTS 32 * 4
34
35 /* Ideally pass the sample mask input to the PS epilog as v14, which
36 * is its usual location, so that the shader doesn't have to add v_mov.
37 */
38 #define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
39
40 struct si_shader_output_values {
41 LLVMValueRef values[4];
42 unsigned semantic_name;
43 unsigned semantic_index;
44 ubyte vertex_stream[4];
45 };
46
47 struct si_shader_context {
48 struct ac_llvm_context ac;
49 struct si_shader *shader;
50 struct si_screen *screen;
51
52 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
53
54 /* For clamping the non-constant index in resource indexing: */
55 unsigned num_const_buffers;
56 unsigned num_shader_buffers;
57 unsigned num_images;
58 unsigned num_samplers;
59
60 struct ac_shader_args args;
61 struct ac_shader_abi abi;
62
63 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
64
65 LLVMBasicBlockRef merged_wrap_if_entry_block;
66 int merged_wrap_if_label;
67
68 LLVMValueRef main_fn;
69 LLVMTypeRef return_type;
70
71 struct ac_arg const_and_shader_buffers;
72 struct ac_arg samplers_and_images;
73
74 /* For merged shaders, the per-stage descriptors for the stage other
75 * than the one we're processing, used to pass them through from the
76 * first stage to the second.
77 */
78 struct ac_arg other_const_and_shader_buffers;
79 struct ac_arg other_samplers_and_images;
80
81 struct ac_arg rw_buffers;
82 struct ac_arg bindless_samplers_and_images;
83 /* Common inputs for merged shaders. */
84 struct ac_arg merged_wave_info;
85 struct ac_arg merged_scratch_offset;
86 struct ac_arg small_prim_cull_info;
87 /* API VS */
88 struct ac_arg vertex_buffers;
89 struct ac_arg vb_descriptors[5];
90 struct ac_arg rel_auto_id;
91 struct ac_arg vs_prim_id;
92 struct ac_arg vertex_index0;
93 /* VS states and layout of LS outputs / TCS inputs at the end
94 * [0] = clamp vertex color
95 * [1] = indexed
96 * [2:3] = NGG: output primitive type
97 * [4:5] = NGG: provoking vertex index
98 * [6] = NGG: streamout queries enabled
99 * [7:10] = NGG: small prim filter precision = num_samples / quant_mode,
100 * but in reality it's: 1/2^n, from 1/16 to 1/4096 = 1/2^4 to 1/2^12
101 * Only the first 4 bits of the exponent are stored.
102 * Set it like this: (fui(num_samples / quant_mode) >> 23)
103 * Expand to FP32 like this: ((0x70 | value) << 23);
104 * With 0x70 = 112, we get 2^(112 + value - 127) = 2^(value - 15)
105 * = 1/2^(15 - value) in FP32
106 * [11:23] = stride between patches in DW = num_inputs * num_vertices * 4
107 * max = 32*32*4 + 32*4
108 * [24:31] = stride between vertices in DW = num_inputs * 4
109 * max = 32*4
110 */
111 struct ac_arg vs_state_bits;
112 struct ac_arg vs_blit_inputs;
113 struct ac_arg ngg_old_thread_id; /* generated by the NGG cull shader */
114 /* HW VS */
115 struct ac_arg streamout_config;
116 struct ac_arg streamout_write_index;
117 struct ac_arg streamout_offset[4];
118
119 /* API TCS & TES */
120 /* Layout of TCS outputs in the offchip buffer
121 * # 6 bits
122 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
123 * # 6 bits
124 * [6:11] = the number of output vertices per patch, max = 32
125 * # 20 bits
126 * [12:31] = the offset of per patch attributes in the buffer in bytes.
127 * max = NUM_PATCHES*32*32*16
128 */
129 struct ac_arg tcs_offchip_layout;
130
131 /* API TCS */
132 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
133 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
134 * [16:31] = TCS output patch0 offset for per-patch / 16
135 * max = (NUM_PATCHES + 1) * 32*32
136 */
137 struct ac_arg tcs_out_lds_offsets;
138 /* Layout of TCS outputs / TES inputs:
139 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
140 * max = 32*32*4 + 32*4
141 * [13:18] = gl_PatchVerticesIn, max = 32
142 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
143 */
144 struct ac_arg tcs_out_lds_layout;
145 struct ac_arg tcs_offchip_offset;
146 struct ac_arg tcs_factor_offset;
147
148 /* API TES */
149 struct ac_arg tes_offchip_addr;
150 struct ac_arg tes_u;
151 struct ac_arg tes_v;
152 struct ac_arg tes_rel_patch_id;
153 /* HW ES */
154 struct ac_arg es2gs_offset;
155 /* HW GS */
156 /* On gfx10:
157 * - bits 0..11: ordered_wave_id
158 * - bits 12..20: number of vertices in group
159 * - bits 22..30: number of primitives in group
160 */
161 struct ac_arg gs_tg_info;
162 /* API GS */
163 struct ac_arg gs2vs_offset;
164 struct ac_arg gs_wave_id; /* GFX6 */
165 struct ac_arg gs_vtx_offset[6]; /* in dwords (GFX6) */
166 struct ac_arg gs_vtx01_offset; /* in dwords (GFX9) */
167 struct ac_arg gs_vtx23_offset; /* in dwords (GFX9) */
168 struct ac_arg gs_vtx45_offset; /* in dwords (GFX9) */
169 /* PS */
170 struct ac_arg pos_fixed_pt;
171 /* CS */
172 struct ac_arg block_size;
173 struct ac_arg cs_user_data;
174
175 struct ac_llvm_compiler *compiler;
176
177 /* Preloaded descriptors. */
178 LLVMValueRef esgs_ring;
179 LLVMValueRef gsvs_ring[4];
180 LLVMValueRef tess_offchip_ring;
181
182 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
183 LLVMValueRef gs_next_vertex[4];
184 LLVMValueRef gs_curprim_verts[4];
185 LLVMValueRef gs_generated_prims[4];
186 LLVMValueRef gs_ngg_emit;
187 LLVMValueRef gs_ngg_scratch;
188 LLVMValueRef postponed_kill;
189 LLVMValueRef return_value;
190
191 LLVMTypeRef voidt;
192 LLVMTypeRef i1;
193 LLVMTypeRef i8;
194 LLVMTypeRef i32;
195 LLVMTypeRef i64;
196 LLVMTypeRef i128;
197 LLVMTypeRef f32;
198 LLVMTypeRef v2i32;
199 LLVMTypeRef v4i32;
200 LLVMTypeRef v4f32;
201 LLVMTypeRef v8i32;
202
203 LLVMValueRef i32_0;
204 LLVMValueRef i32_1;
205 LLVMValueRef i1false;
206 LLVMValueRef i1true;
207 };
208
209 static inline struct si_shader_context *
210 si_shader_context_from_abi(struct ac_shader_abi *abi)
211 {
212 struct si_shader_context *ctx = NULL;
213 return container_of(abi, ctx, abi);
214 }
215
216 void si_llvm_context_init(struct si_shader_context *ctx,
217 struct si_screen *sscreen,
218 struct ac_llvm_compiler *compiler,
219 unsigned wave_size);
220 void si_llvm_context_set_ir(struct si_shader_context *ctx,
221 struct si_shader *shader);
222
223 void si_llvm_create_func(struct si_shader_context *ctx, const char *name,
224 LLVMTypeRef *return_types, unsigned num_return_elems,
225 unsigned max_workgroup_size);
226
227 void si_llvm_dispose(struct si_shader_context *ctx);
228
229 void si_llvm_optimize_module(struct si_shader_context *ctx);
230
231 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
232 LLVMTypeRef type,
233 LLVMValueRef vertex_index,
234 LLVMValueRef param_index,
235 unsigned const_index,
236 unsigned location,
237 unsigned driver_location,
238 unsigned component,
239 unsigned num_components,
240 bool is_patch,
241 bool is_compact,
242 bool load_input);
243 bool si_is_merged_shader(struct si_shader_context *ctx);
244 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
245 LLVMValueRef si_buffer_load_const(struct si_shader_context *ctx,
246 LLVMValueRef resource, LLVMValueRef offset);
247 void si_llvm_build_ret(struct si_shader_context *ctx, LLVMValueRef ret);
248 LLVMValueRef si_prolog_get_rw_buffers(struct si_shader_context *ctx);
249 LLVMValueRef si_build_gather_64bit(struct si_shader_context *ctx,
250 LLVMTypeRef type, LLVMValueRef val1,
251 LLVMValueRef val2);
252 void si_llvm_emit_barrier(struct si_shader_context *ctx);
253 void si_llvm_declare_esgs_ring(struct si_shader_context *ctx);
254 void si_declare_compute_memory(struct si_shader_context *ctx);
255 LLVMValueRef si_get_primitive_id(struct si_shader_context *ctx,
256 unsigned swizzle);
257 void si_llvm_export_vs(struct si_shader_context *ctx,
258 struct si_shader_output_values *outputs,
259 unsigned noutput);
260 void si_emit_streamout_output(struct si_shader_context *ctx,
261 LLVMValueRef const *so_buffers,
262 LLVMValueRef const *so_write_offsets,
263 struct pipe_stream_output *stream_out,
264 struct si_shader_output_values *shader_out);
265 void si_add_arg_checked(struct ac_shader_args *args,
266 enum ac_arg_regfile file,
267 unsigned registers, enum ac_arg_type type,
268 struct ac_arg *arg,
269 unsigned idx);
270
271 void si_llvm_load_input_vs(
272 struct si_shader_context *ctx,
273 unsigned input_index,
274 LLVMValueRef out[4]);
275
276 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
277
278 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
279 struct ac_arg param, unsigned rshift,
280 unsigned bitwidth);
281 void si_build_wrapper_function(struct si_shader_context *ctx, LLVMValueRef *parts,
282 unsigned num_parts, unsigned main_part,
283 unsigned next_shader_first_part);
284 bool si_need_ps_prolog(const union si_shader_part_key *key);
285 void si_get_ps_prolog_key(struct si_shader *shader,
286 union si_shader_part_key *key,
287 bool separate_prolog);
288 void si_get_ps_epilog_key(struct si_shader *shader,
289 union si_shader_part_key *key);
290 LLVMValueRef si_insert_input_ret(struct si_shader_context *ctx, LLVMValueRef ret,
291 struct ac_arg param, unsigned return_index);
292 LLVMValueRef si_insert_input_ret_float(struct si_shader_context *ctx, LLVMValueRef ret,
293 struct ac_arg param, unsigned return_index);
294 LLVMValueRef si_insert_input_ptr(struct si_shader_context *ctx, LLVMValueRef ret,
295 struct ac_arg param, unsigned return_index);
296 int si_compile_llvm(struct si_screen *sscreen,
297 struct si_shader_binary *binary,
298 struct ac_shader_config *conf,
299 struct ac_llvm_compiler *compiler,
300 struct ac_llvm_context *ac,
301 struct pipe_debug_callback *debug,
302 enum pipe_shader_type shader_type,
303 const char *name,
304 bool less_optimized);
305 void si_fix_resource_usage(struct si_screen *sscreen, struct si_shader *shader);
306 void si_llvm_emit_streamout(struct si_shader_context *ctx,
307 struct si_shader_output_values *outputs,
308 unsigned noutput, unsigned stream);
309 void si_create_function(struct si_shader_context *ctx, bool ngg_cull_shader);
310
311 bool gfx10_ngg_export_prim_early(struct si_shader *shader);
312 void gfx10_ngg_build_sendmsg_gs_alloc_req(struct si_shader_context *ctx);
313 void gfx10_ngg_build_export_prim(struct si_shader_context *ctx,
314 LLVMValueRef user_edgeflags[3],
315 LLVMValueRef prim_passthrough);
316 void gfx10_emit_ngg_culling_epilogue_4x_wave32(struct ac_shader_abi *abi,
317 unsigned max_outputs,
318 LLVMValueRef *addrs);
319 void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
320 unsigned max_outputs,
321 LLVMValueRef *addrs);
322 void gfx10_ngg_gs_emit_vertex(struct si_shader_context *ctx,
323 unsigned stream,
324 LLVMValueRef *addrs);
325 void gfx10_ngg_gs_emit_prologue(struct si_shader_context *ctx);
326 void gfx10_ngg_gs_emit_epilogue(struct si_shader_context *ctx);
327 void gfx10_ngg_calculate_subgroup_info(struct si_shader *shader);
328
329 /* si_shader_llvm_gs.c */
330 LLVMValueRef si_is_es_thread(struct si_shader_context *ctx);
331 LLVMValueRef si_is_gs_thread(struct si_shader_context *ctx);
332 void si_llvm_emit_es_epilogue(struct ac_shader_abi *abi, unsigned max_outputs,
333 LLVMValueRef *addrs);
334 void si_preload_esgs_ring(struct si_shader_context *ctx);
335 void si_preload_gs_rings(struct si_shader_context *ctx);
336 void si_llvm_build_gs_prolog(struct si_shader_context *ctx,
337 union si_shader_part_key *key);
338 void si_llvm_init_gs_callbacks(struct si_shader_context *ctx);
339
340 /* si_shader_llvm_tess.c */
341 void si_llvm_preload_tes_rings(struct si_shader_context *ctx);
342 void si_llvm_emit_ls_epilogue(struct ac_shader_abi *abi, unsigned max_outputs,
343 LLVMValueRef *addrs);
344 void si_llvm_build_tcs_epilog(struct si_shader_context *ctx,
345 union si_shader_part_key *key);
346 void si_llvm_init_tcs_callbacks(struct si_shader_context *ctx);
347 void si_llvm_init_tes_callbacks(struct si_shader_context *ctx);
348
349 /* si_shader_llvm_ps.c */
350 void si_llvm_build_ps_prolog(struct si_shader_context *ctx,
351 union si_shader_part_key *key);
352 void si_llvm_build_ps_epilog(struct si_shader_context *ctx,
353 union si_shader_part_key *key);
354 void si_llvm_build_monolithic_ps(struct si_shader_context *ctx,
355 struct si_shader *shader);
356 void si_llvm_init_ps_callbacks(struct si_shader_context *ctx);
357
358 /* si_shader_llvm_resources.c */
359 void si_llvm_init_resource_callbacks(struct si_shader_context *ctx);
360
361 #endif