radeonsi: use the new run-time linker for shaders
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #ifndef SI_SHADER_PRIVATE_H
26 #define SI_SHADER_PRIVATE_H
27
28 #include "si_shader.h"
29 #include "gallivm/lp_bld_flow.h"
30 #include "gallivm/lp_bld_init.h"
31 #include "gallivm/lp_bld_tgsi.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "ac_shader_abi.h"
34
35 #include <llvm-c/Core.h>
36 #include <llvm-c/TargetMachine.h>
37
38 struct pipe_debug_callback;
39
40 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
41 #define RADEON_LLVM_MAX_INPUTS 32 * 4
42 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
43
44 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
45 #define RADEON_LLVM_MAX_ADDRS 16
46
47 enum si_arg_regfile {
48 ARG_SGPR,
49 ARG_VGPR
50 };
51
52 /**
53 * Used to collect types and other info about arguments of the LLVM function
54 * before the function is created.
55 */
56 struct si_function_info {
57 LLVMTypeRef types[100];
58 LLVMValueRef *assign[100];
59 unsigned num_sgpr_params;
60 unsigned num_params;
61 };
62
63 struct si_shader_context {
64 struct lp_build_tgsi_context bld_base;
65 struct gallivm_state gallivm;
66 struct ac_llvm_context ac;
67 struct si_shader *shader;
68 struct si_screen *screen;
69
70 unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
71
72 /* For clamping the non-constant index in resource indexing: */
73 unsigned num_const_buffers;
74 unsigned num_shader_buffers;
75 unsigned num_images;
76 unsigned num_samplers;
77
78 struct ac_shader_abi abi;
79
80 /** This function is responsible for initilizing the inputs array and will be
81 * called once for each input declared in the TGSI shader.
82 */
83 void (*load_input)(struct si_shader_context *,
84 unsigned input_index,
85 const struct tgsi_full_declaration *decl,
86 LLVMValueRef out[4]);
87
88 /** This array contains the input values for the shader. Typically these
89 * values will be in the form of a target intrinsic that will inform the
90 * backend how to load the actual inputs to the shader.
91 */
92 struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
93 LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
94 LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
95 LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
96
97 /** This pointer is used to contain the temporary values.
98 * The amount of temporary used in tgsi can't be bound to a max value and
99 * thus we must allocate this array at runtime.
100 */
101 LLVMValueRef *temps;
102 unsigned temps_count;
103 LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
104
105 LLVMValueRef *imms;
106 unsigned imms_num;
107
108 struct lp_build_if_state merged_wrap_if_state;
109
110 struct tgsi_array_info *temp_arrays;
111 LLVMValueRef *temp_array_allocas;
112
113 LLVMValueRef undef_alloca;
114
115 LLVMValueRef main_fn;
116 LLVMTypeRef return_type;
117
118 /* Parameter indices for LLVMGetParam. */
119 int param_rw_buffers;
120 int param_const_and_shader_buffers;
121 int param_samplers_and_images;
122 int param_bindless_samplers_and_images;
123 /* Common inputs for merged shaders. */
124 int param_merged_wave_info;
125 int param_merged_scratch_offset;
126 /* API VS */
127 int param_vertex_buffers;
128 int param_rel_auto_id;
129 int param_vs_prim_id;
130 int param_vertex_index0;
131 /* VS states and layout of LS outputs / TCS inputs at the end
132 * [0] = clamp vertex color
133 * [1] = indexed
134 * [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
135 * max = 32*32*4 + 32*4
136 * [24:31] = stride between vertices in DW = num_inputs * 4
137 * max = 32*4
138 */
139 int param_vs_state_bits;
140 int param_vs_blit_inputs;
141 /* HW VS */
142 int param_streamout_config;
143 int param_streamout_write_index;
144 int param_streamout_offset[4];
145
146 /* API TCS & TES */
147 /* Layout of TCS outputs in the offchip buffer
148 * # 6 bits
149 * [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
150 * # 6 bits
151 * [6:11] = the number of output vertices per patch, max = 32
152 * # 20 bits
153 * [12:31] = the offset of per patch attributes in the buffer in bytes.
154 * max = NUM_PATCHES*32*32*16
155 */
156 int param_tcs_offchip_layout;
157
158 /* API TCS */
159 /* Offsets where TCS outputs and TCS patch outputs live in LDS:
160 * [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
161 * [16:31] = TCS output patch0 offset for per-patch / 16
162 * max = (NUM_PATCHES + 1) * 32*32
163 */
164 int param_tcs_out_lds_offsets;
165 /* Layout of TCS outputs / TES inputs:
166 * [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
167 * max = 32*32*4 + 32*4
168 * [13:18] = gl_PatchVerticesIn, max = 32
169 * [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
170 */
171 int param_tcs_out_lds_layout;
172 int param_tcs_offchip_offset;
173 int param_tcs_factor_offset;
174
175 /* API TES */
176 int param_tes_offchip_addr;
177 int param_tes_u;
178 int param_tes_v;
179 int param_tes_rel_patch_id;
180 /* HW ES */
181 int param_es2gs_offset;
182 /* API GS */
183 int param_gs2vs_offset;
184 int param_gs_wave_id; /* GFX6 */
185 LLVMValueRef gs_vtx_offset[6]; /* in dwords (GFX6) */
186 int param_gs_vtx01_offset; /* in dwords (GFX9) */
187 int param_gs_vtx23_offset; /* in dwords (GFX9) */
188 int param_gs_vtx45_offset; /* in dwords (GFX9) */
189 /* CS */
190 int param_block_size;
191 int param_cs_user_data;
192
193 struct ac_llvm_compiler *compiler;
194
195 /* Preloaded descriptors. */
196 LLVMValueRef esgs_ring;
197 LLVMValueRef gsvs_ring[4];
198 LLVMValueRef tess_offchip_ring;
199
200 LLVMValueRef invoc0_tess_factors[6]; /* outer[4], inner[2] */
201 LLVMValueRef gs_next_vertex[4];
202 LLVMValueRef postponed_kill;
203 LLVMValueRef return_value;
204
205 LLVMTypeRef voidt;
206 LLVMTypeRef i1;
207 LLVMTypeRef i8;
208 LLVMTypeRef i32;
209 LLVMTypeRef i64;
210 LLVMTypeRef i128;
211 LLVMTypeRef f32;
212 LLVMTypeRef v2i32;
213 LLVMTypeRef v4i32;
214 LLVMTypeRef v4f32;
215 LLVMTypeRef v8i32;
216
217 LLVMValueRef i32_0;
218 LLVMValueRef i32_1;
219 LLVMValueRef i1false;
220 LLVMValueRef i1true;
221 };
222
223 static inline struct si_shader_context *
224 si_shader_context(struct lp_build_tgsi_context *bld_base)
225 {
226 return (struct si_shader_context*)bld_base;
227 }
228
229 static inline struct si_shader_context *
230 si_shader_context_from_abi(struct ac_shader_abi *abi)
231 {
232 struct si_shader_context *ctx = NULL;
233 return container_of(abi, ctx, abi);
234 }
235
236 void si_init_function_info(struct si_function_info *fninfo);
237 unsigned add_arg_assign(struct si_function_info *fninfo,
238 enum si_arg_regfile regfile, LLVMTypeRef type,
239 LLVMValueRef *assign);
240 void si_create_function(struct si_shader_context *ctx,
241 const char *name,
242 LLVMTypeRef *returns, unsigned num_returns,
243 struct si_function_info *fninfo,
244 unsigned max_workgroup_size);
245 unsigned si_llvm_compile(LLVMModuleRef M, struct si_shader_binary *binary,
246 struct ac_llvm_compiler *compiler,
247 struct pipe_debug_callback *debug,
248 bool less_optimized);
249
250 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
251 enum tgsi_opcode_type type);
252
253 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
254 enum tgsi_opcode_type type, LLVMValueRef value);
255
256 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
257 LLVMValueRef index,
258 unsigned num);
259
260 void si_llvm_context_init(struct si_shader_context *ctx,
261 struct si_screen *sscreen,
262 struct ac_llvm_compiler *compiler);
263 void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
264 struct si_shader *shader);
265
266 void si_llvm_create_func(struct si_shader_context *ctx,
267 const char *name,
268 LLVMTypeRef *return_types, unsigned num_return_elems,
269 LLVMTypeRef *ParamTypes, unsigned ParamCount);
270
271 void si_llvm_dispose(struct si_shader_context *ctx);
272
273 void si_llvm_optimize_module(struct si_shader_context *ctx);
274
275 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
276 LLVMTypeRef type,
277 LLVMValueRef ptr,
278 LLVMValueRef ptr2);
279
280 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
281 const struct tgsi_full_src_register *reg,
282 enum tgsi_opcode_type type,
283 unsigned swizzle);
284
285 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible);
286
287 LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
288 LLVMTypeRef type,
289 LLVMValueRef vertex_index,
290 LLVMValueRef param_index,
291 unsigned const_index,
292 unsigned location,
293 unsigned driver_location,
294 unsigned component,
295 unsigned num_components,
296 bool is_patch,
297 bool is_compact,
298 bool load_input);
299
300 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
301 unsigned input_index,
302 unsigned vtx_offset_param,
303 LLVMTypeRef type,
304 unsigned swizzle);
305
306 LLVMValueRef si_nir_lookup_interp_param(struct ac_shader_abi *abi,
307 enum glsl_interp_mode interp,
308 unsigned location);
309
310 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
311 const struct tgsi_full_instruction *inst,
312 const struct tgsi_opcode_info *info,
313 unsigned index,
314 LLVMValueRef dst[4]);
315
316 LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
317 const struct tgsi_ind_register *ind,
318 unsigned addr_mul, int rel_index);
319 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
320 const struct tgsi_ind_register *ind,
321 int rel_index, unsigned num);
322 LLVMValueRef si_get_sample_id(struct si_shader_context *ctx);
323
324 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
325 void si_shader_context_init_mem(struct si_shader_context *ctx);
326
327 LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
328 LLVMValueRef list, LLVMValueRef index,
329 enum ac_descriptor_type type);
330 LLVMValueRef si_load_image_desc(struct si_shader_context *ctx,
331 LLVMValueRef list, LLVMValueRef index,
332 enum ac_descriptor_type desc_type, bool dcc_off,
333 bool bindless);
334
335 void si_load_system_value(struct si_shader_context *ctx,
336 unsigned index,
337 const struct tgsi_full_declaration *decl);
338 void si_declare_compute_memory(struct si_shader_context *ctx);
339 void si_tgsi_declare_compute_memory(struct si_shader_context *ctx,
340 const struct tgsi_full_declaration *decl);
341
342 void si_llvm_load_input_vs(
343 struct si_shader_context *ctx,
344 unsigned input_index,
345 LLVMValueRef out[4]);
346 void si_llvm_load_input_fs(
347 struct si_shader_context *ctx,
348 unsigned input_index,
349 LLVMValueRef out[4]);
350
351 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
352
353 LLVMValueRef si_unpack_param(struct si_shader_context *ctx,
354 unsigned param, unsigned rshift,
355 unsigned bitwidth);
356
357 #endif