radeonsi: kill point size VS output if it's not used by the rasterizer
[mesa.git] / src / gallium / drivers / radeonsi / si_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
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14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
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19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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26 **************************************************************************/
27
28 #include "radeon/radeon_uvd.h"
29 #include "radeon/radeon_uvd_enc.h"
30 #include "radeon/radeon_vce.h"
31 #include "radeon/radeon_vcn_dec.h"
32 #include "radeon/radeon_vcn_enc.h"
33 #include "radeon/radeon_video.h"
34 #include "si_pipe.h"
35 #include "util/u_video.h"
36
37 /**
38 * creates an video buffer with an UVD compatible memory layout
39 */
40 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
41 const struct pipe_video_buffer *tmpl)
42 {
43 struct pipe_video_buffer vidbuf = *tmpl;
44 /* TODO: get tiling working */
45 vidbuf.bind |= PIPE_BIND_LINEAR;
46
47 return vl_video_buffer_create_as_resource(pipe, &vidbuf);
48 }
49
50 /* set the decoding target buffer offsets */
51 static struct pb_buffer *si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
52 {
53 struct si_screen *sscreen = (struct si_screen *)buf->base.context->screen;
54 struct si_texture *luma = (struct si_texture *)buf->resources[0];
55 struct si_texture *chroma = (struct si_texture *)buf->resources[1];
56 enum ruvd_surface_type type =
57 (sscreen->info.chip_class >= GFX9) ? RUVD_SURFACE_TYPE_GFX9 : RUVD_SURFACE_TYPE_LEGACY;
58
59 msg->body.decode.dt_field_mode = buf->base.interlaced;
60
61 si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
62
63 return luma->buffer.buf;
64 }
65
66 /* get the radeon resources for VCE */
67 static void si_vce_get_buffer(struct pipe_resource *resource, struct pb_buffer **handle,
68 struct radeon_surf **surface)
69 {
70 struct si_texture *res = (struct si_texture *)resource;
71
72 if (handle)
73 *handle = res->buffer.buf;
74
75 if (surface)
76 *surface = &res->surface;
77 }
78
79 /**
80 * creates an UVD compatible decoder
81 */
82 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
83 const struct pipe_video_codec *templ)
84 {
85 struct si_context *ctx = (struct si_context *)context;
86 bool vcn = ctx->family >= CHIP_RAVEN;
87
88 if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
89 if (vcn) {
90 return radeon_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
91 } else {
92 if (u_reduce_video_profile(templ->profile) == PIPE_VIDEO_FORMAT_HEVC)
93 return radeon_uvd_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
94 else
95 return si_vce_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
96 }
97 }
98
99 return (vcn) ? radeon_create_decoder(context, templ)
100 : si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
101 }