Merge branch 'mesa_7_7_branch'
[mesa.git] / src / gallium / drivers / softpipe / sp_tex_tile_cache.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /**
29 * Texture tile caching.
30 *
31 * Author:
32 * Brian Paul
33 */
34
35 #include "pipe/p_inlines.h"
36 #include "util/u_memory.h"
37 #include "util/u_tile.h"
38 #include "util/u_math.h"
39 #include "sp_context.h"
40 #include "sp_texture.h"
41 #include "sp_tex_tile_cache.h"
42
43
44
45 struct softpipe_tex_tile_cache *
46 sp_create_tex_tile_cache( struct pipe_screen *screen )
47 {
48 struct softpipe_tex_tile_cache *tc;
49 uint pos;
50
51 tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
52 if (tc) {
53 tc->screen = screen;
54 for (pos = 0; pos < NUM_ENTRIES; pos++) {
55 tc->entries[pos].addr.bits.invalid = 1;
56 }
57 tc->last_tile = &tc->entries[0]; /* any tile */
58 }
59 return tc;
60 }
61
62
63 void
64 sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
65 {
66 struct pipe_screen *screen;
67 uint pos;
68
69 for (pos = 0; pos < NUM_ENTRIES; pos++) {
70 /*assert(tc->entries[pos].x < 0);*/
71 }
72 if (tc->transfer) {
73 screen = tc->transfer->texture->screen;
74 screen->tex_transfer_destroy(tc->transfer);
75 }
76 if (tc->tex_trans) {
77 screen = tc->tex_trans->texture->screen;
78 screen->tex_transfer_destroy(tc->tex_trans);
79 }
80
81 FREE( tc );
82 }
83
84
85
86
87 void
88 sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc)
89 {
90 if (tc->tex_trans && !tc->tex_trans_map)
91 tc->tex_trans_map = tc->screen->transfer_map(tc->screen, tc->tex_trans);
92 }
93
94
95 void
96 sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc)
97 {
98 if (tc->tex_trans_map) {
99 tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
100 tc->tex_trans_map = NULL;
101 }
102 }
103
104 /**
105 * Invalidate all cached tiles for the cached texture.
106 * Should be called when the texture is modified.
107 */
108 void
109 sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc)
110 {
111 unsigned i;
112
113 assert(tc);
114 assert(tc->texture);
115
116 for (i = 0; i < NUM_ENTRIES; i++) {
117 tc->entries[i].addr.bits.invalid = 1;
118 }
119 }
120
121 /**
122 * Specify the texture to cache.
123 */
124 void
125 sp_tex_tile_cache_set_texture(struct softpipe_tex_tile_cache *tc,
126 struct pipe_texture *texture)
127 {
128 uint i;
129
130 assert(!tc->transfer);
131
132 if (tc->texture != texture) {
133 pipe_texture_reference(&tc->texture, texture);
134
135 if (tc->tex_trans) {
136 struct pipe_screen *screen = tc->tex_trans->texture->screen;
137
138 if (tc->tex_trans_map) {
139 screen->transfer_unmap(screen, tc->tex_trans);
140 tc->tex_trans_map = NULL;
141 }
142
143 screen->tex_transfer_destroy(tc->tex_trans);
144 tc->tex_trans = NULL;
145 }
146
147 /* mark as entries as invalid/empty */
148 /* XXX we should try to avoid this when the teximage hasn't changed */
149 for (i = 0; i < NUM_ENTRIES; i++) {
150 tc->entries[i].addr.bits.invalid = 1;
151 }
152
153 tc->tex_face = -1; /* any invalid value here */
154 }
155 }
156
157
158
159
160 /**
161 * Flush the tile cache: write all dirty tiles back to the transfer.
162 * any tiles "flagged" as cleared will be "really" cleared.
163 */
164 void
165 sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
166 {
167 int pos;
168
169 if (tc->texture) {
170 /* caching a texture, mark all entries as empty */
171 for (pos = 0; pos < NUM_ENTRIES; pos++) {
172 tc->entries[pos].addr.bits.invalid = 1;
173 }
174 tc->tex_face = -1;
175 }
176
177 }
178
179
180 /**
181 * Given the texture face, level, zslice, x and y values, compute
182 * the cache entry position/index where we'd hope to find the
183 * cached texture tile.
184 * This is basically a direct-map cache.
185 * XXX There's probably lots of ways in which we can improve this.
186 */
187 static INLINE uint
188 tex_cache_pos( union tex_tile_address addr )
189 {
190 uint entry = (addr.bits.x +
191 addr.bits.y * 9 +
192 addr.bits.z * 3 +
193 addr.bits.face +
194 addr.bits.level * 7);
195
196 return entry % NUM_ENTRIES;
197 }
198
199 /**
200 * Similar to sp_get_cached_tile() but for textures.
201 * Tiles are read-only and indexed with more params.
202 */
203 const struct softpipe_tex_cached_tile *
204 sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
205 union tex_tile_address addr )
206 {
207 struct pipe_screen *screen = tc->screen;
208 struct softpipe_tex_cached_tile *tile;
209
210 tile = tc->entries + tex_cache_pos( addr );
211
212 if (addr.value != tile->addr.value) {
213
214 /* cache miss. Most misses are because we've invaldiated the
215 * texture cache previously -- most commonly on binding a new
216 * texture. Currently we effectively flush the cache on texture
217 * bind.
218 */
219 #if 0
220 _debug_printf("miss at %u: x=%d y=%d z=%d face=%d level=%d\n"
221 " tile %u: x=%d y=%d z=%d face=%d level=%d\n",
222 pos, x/TILE_SIZE, y/TILE_SIZE, z, face, level,
223 pos, tile->addr.bits.x, tile->addr.bits.y, tile->z, tile->face, tile->level);
224 #endif
225
226 /* check if we need to get a new transfer */
227 if (!tc->tex_trans ||
228 tc->tex_face != addr.bits.face ||
229 tc->tex_level != addr.bits.level ||
230 tc->tex_z != addr.bits.z) {
231 /* get new transfer (view into texture) */
232
233 if (tc->tex_trans) {
234 if (tc->tex_trans_map) {
235 tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
236 tc->tex_trans_map = NULL;
237 }
238
239 screen->tex_transfer_destroy(tc->tex_trans);
240 tc->tex_trans = NULL;
241 }
242
243 tc->tex_trans =
244 screen->get_tex_transfer(screen, tc->texture,
245 addr.bits.face,
246 addr.bits.level,
247 addr.bits.z,
248 PIPE_TRANSFER_READ, 0, 0,
249 u_minify(tc->texture->width0, addr.bits.level),
250 u_minify(tc->texture->height0, addr.bits.level));
251
252 tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans);
253
254 tc->tex_face = addr.bits.face;
255 tc->tex_level = addr.bits.level;
256 tc->tex_z = addr.bits.z;
257 }
258
259 /* get tile from the transfer (view into texture) */
260 pipe_get_tile_rgba(tc->tex_trans,
261 addr.bits.x * TILE_SIZE,
262 addr.bits.y * TILE_SIZE,
263 TILE_SIZE, TILE_SIZE,
264 (float *) tile->data.color);
265 tile->addr = addr;
266 }
267
268 tc->last_tile = tile;
269 return tile;
270 }
271
272
273