Merge branch '7.8'
[mesa.git] / src / gallium / drivers / softpipe / sp_tile_cache.h
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef SP_TILE_CACHE_H
29 #define SP_TILE_CACHE_H
30
31 #define TILE_CLEAR_OPTIMIZATION 1
32
33
34 #include "pipe/p_compiler.h"
35
36
37 struct softpipe_tile_cache;
38
39
40 /**
41 * Cache tile size (width and height). This needs to be a power of two.
42 */
43 #define TILE_SIZE 64
44
45
46 /* If we need to support > 4096, just expand this to be a 64 bit
47 * union, or consider tiling in Z as well.
48 */
49 union tile_address {
50 struct {
51 unsigned x:6; /* 4096 / TILE_SIZE */
52 unsigned y:6; /* 4096 / TILE_SIZE */
53 unsigned invalid:1;
54 unsigned pad:19;
55 } bits;
56 unsigned value;
57 };
58
59
60 struct softpipe_cached_tile
61 {
62 union tile_address addr;
63 union {
64 float color[TILE_SIZE][TILE_SIZE][4];
65 uint color32[TILE_SIZE][TILE_SIZE];
66 uint depth32[TILE_SIZE][TILE_SIZE];
67 ushort depth16[TILE_SIZE][TILE_SIZE];
68 ubyte stencil8[TILE_SIZE][TILE_SIZE];
69 ubyte any[1];
70 } data;
71 };
72
73 #define NUM_ENTRIES 50
74
75
76 /** XXX move these */
77 #define MAX_WIDTH 4096
78 #define MAX_HEIGHT 4096
79
80
81 struct softpipe_tile_cache
82 {
83 struct pipe_context *pipe;
84 struct pipe_surface *surface; /**< the surface we're caching */
85 struct pipe_transfer *transfer;
86 void *transfer_map;
87
88 struct softpipe_cached_tile entries[NUM_ENTRIES];
89 uint clear_flags[(MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32];
90 float clear_color[4]; /**< for color bufs */
91 uint clear_val; /**< for z+stencil, or packed color clear value */
92 boolean depth_stencil; /**< Is the surface a depth/stencil format? */
93
94 struct softpipe_cached_tile tile; /**< scratch tile for clears */
95
96 struct softpipe_cached_tile *last_tile; /**< most recently retrieved tile */
97 };
98
99
100 extern struct softpipe_tile_cache *
101 sp_create_tile_cache( struct pipe_context *pipe );
102
103 extern void
104 sp_destroy_tile_cache(struct softpipe_tile_cache *tc);
105
106 extern void
107 sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
108 struct pipe_surface *sps);
109
110 extern struct pipe_surface *
111 sp_tile_cache_get_surface(struct softpipe_tile_cache *tc);
112
113 extern void
114 sp_tile_cache_map_transfers(struct softpipe_tile_cache *tc);
115
116 extern void
117 sp_tile_cache_unmap_transfers(struct softpipe_tile_cache *tc);
118
119 extern void
120 sp_flush_tile_cache(struct softpipe_tile_cache *tc);
121
122 extern void
123 sp_tile_cache_clear(struct softpipe_tile_cache *tc, const float *rgba,
124 uint clearValue);
125
126 extern struct softpipe_cached_tile *
127 sp_find_cached_tile(struct softpipe_tile_cache *tc,
128 union tile_address addr );
129
130
131 static INLINE union tile_address
132 tile_address( unsigned x,
133 unsigned y )
134 {
135 union tile_address addr;
136
137 addr.value = 0;
138 addr.bits.x = x / TILE_SIZE;
139 addr.bits.y = y / TILE_SIZE;
140
141 return addr;
142 }
143
144 /* Quickly retrieve tile if it matches last lookup.
145 */
146 static INLINE struct softpipe_cached_tile *
147 sp_get_cached_tile(struct softpipe_tile_cache *tc,
148 int x, int y )
149 {
150 union tile_address addr = tile_address( x, y );
151
152 if (tc->last_tile->addr.value == addr.value)
153 return tc->last_tile;
154
155 return sp_find_cached_tile( tc, addr );
156 }
157
158
159
160
161 #endif /* SP_TILE_CACHE_H */
162