src/gallium/drivers/svga/svga_resource_buffer_upload.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26
  27 #include "os/os_thread.h"
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_math.h"
  32 #include "util/u_memory.h"
  33
  34 #include "svga_cmd.h"
  35 #include "svga_context.h"
  36 #include "svga_debug.h"
  37 #include "svga_resource_buffer.h"
  38 #include "svga_resource_buffer_upload.h"
  39 #include "svga_screen.h"
  40 #include "svga_winsys.h"
  41
  42 /**
  43  * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
  44  *
  45  */
  46 struct svga_3d_update_gb_image {
  47    SVGA3dCmdHeader header;
  48    SVGA3dCmdUpdateGBImage body;
  49 };
  50
  51 struct svga_3d_invalidate_gb_image {
  52    SVGA3dCmdHeader header;
  53    SVGA3dCmdInvalidateGBImage body;
  54 };
  55
  56
  57 /**
  58  * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
  59  *
  60  * It will flush and retry in case the first attempt to create a DMA buffer
  61  * fails, so it should not be called from any function involved in flushing
  62  * to avoid recursion.
  63  */
  64 struct svga_winsys_buffer *
  65 svga_winsys_buffer_create( struct svga_context *svga,
  66                            unsigned alignment,
  67                            unsigned usage,
  68                            unsigned size )
  69 {
  70    struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
  71    struct svga_winsys_screen *sws = svgascreen->sws;
  72    struct svga_winsys_buffer *buf;
  73
  74    /* Just try */
  75    buf = sws->buffer_create(sws, alignment, usage, size);
  76    if (!buf) {
  77       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
  78                size);
  79
  80       /* Try flushing all pending DMAs */
  81       svga_context_flush(svga, NULL);
  82       buf = sws->buffer_create(sws, alignment, usage, size);
  83    }
  84
  85    return buf;
  86 }
  87
  88
  89 /**
  90  * Destroy HW storage if separate from the host surface.
  91  * In the GB case, the HW storage is associated with the host surface
  92  * and is therefore a No-op.
  93  */
  94 void
  95 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
  96 {
  97    struct svga_winsys_screen *sws = ss->sws;
  98
  99    assert(!sbuf->map.count);
 100    assert(sbuf->hwbuf);
 101    if (sbuf->hwbuf) {
 102       sws->buffer_destroy(sws, sbuf->hwbuf);
 103       sbuf->hwbuf = NULL;
 104    }
 105 }
 106
 107
 108
 109 /**
 110  * Allocate DMA'ble or Updatable storage for the buffer.
 111  *
 112  * Called before mapping a buffer.
 113  */
 114 enum pipe_error
 115 svga_buffer_create_hw_storage(struct svga_screen *ss,
 116                               struct svga_buffer *sbuf)
 117 {
 118    assert(!sbuf->user);
 119
 120    if (ss->sws->have_gb_objects) {
 121       assert(sbuf->handle || !sbuf->dma.pending);
 122       return svga_buffer_create_host_surface(ss, sbuf);
 123    }
 124    if (!sbuf->hwbuf) {
 125       struct svga_winsys_screen *sws = ss->sws;
 126       unsigned alignment = 16;
 127       unsigned usage = 0;
 128       unsigned size = sbuf->b.b.width0;
 129
 130       sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
 131       if (!sbuf->hwbuf)
 132          return PIPE_ERROR_OUT_OF_MEMORY;
 133
 134       assert(!sbuf->dma.pending);
 135    }
 136
 137    return PIPE_OK;
 138 }
 139
 140
 141
 142 enum pipe_error
 143 svga_buffer_create_host_surface(struct svga_screen *ss,
 144                                 struct svga_buffer *sbuf)
 145 {
 146    assert(!sbuf->user);
 147
 148    if (!sbuf->handle) {
 149       sbuf->key.flags = 0;
 150
 151       sbuf->key.format = SVGA3D_BUFFER;
 152       if (sbuf->bind_flags & PIPE_BIND_VERTEX_BUFFER) {
 153          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
 154          sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
 155       }
 156       if (sbuf->bind_flags & PIPE_BIND_INDEX_BUFFER) {
 157          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
 158          sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
 159       }
 160       if (sbuf->bind_flags & PIPE_BIND_CONSTANT_BUFFER)
 161          sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
 162
 163       if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT)
 164          sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
 165
 166       if (sbuf->bind_flags & PIPE_BIND_SAMPLER_VIEW)
 167          sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 168
 169       sbuf->key.size.width = sbuf->b.b.width0;
 170       sbuf->key.size.height = 1;
 171       sbuf->key.size.depth = 1;
 172
 173       sbuf->key.numFaces = 1;
 174       sbuf->key.numMipLevels = 1;
 175       sbuf->key.cachable = 1;
 176       sbuf->key.arraySize = 1;
 177
 178       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
 179
 180       sbuf->handle = svga_screen_surface_create(ss, sbuf->b.b.bind,
 181                                                 sbuf->b.b.usage, &sbuf->key);
 182       if (!sbuf->handle)
 183          return PIPE_ERROR_OUT_OF_MEMORY;
 184
 185       /* Always set the discard flag on the first time the buffer is written
 186        * as svga_screen_surface_create might have passed a recycled host
 187        * buffer.
 188        */
 189       sbuf->dma.flags.discard = TRUE;
 190
 191       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
 192    }
 193
 194    return PIPE_OK;
 195 }
 196
 197
 198 void
 199 svga_buffer_destroy_host_surface(struct svga_screen *ss,
 200                                  struct svga_buffer *sbuf)
 201 {
 202    if (sbuf->handle) {
 203       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
 204       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 205    }
 206 }
 207
 208
 209 /**
 210  * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
 211  * command buffer, equal to the current number of mapped ranges.
 212  * The UPDATE_GB_IMAGE commands will be patched with the
 213  * actual ranges just before flush.
 214  */
 215 static enum pipe_error
 216 svga_buffer_upload_gb_command(struct svga_context *svga,
 217                               struct svga_buffer *sbuf)
 218 {
 219    struct svga_winsys_context *swc = svga->swc;
 220    SVGA3dCmdUpdateGBImage *update_cmd;
 221    struct svga_3d_update_gb_image *whole_update_cmd = NULL;
 222    uint32 numBoxes = sbuf->map.num_ranges;
 223    struct pipe_resource *dummy;
 224    unsigned int i;
 225
 226    assert(numBoxes);
 227    assert(sbuf->dma.updates == NULL);
 228
 229    if (sbuf->dma.flags.discard) {
 230       struct svga_3d_invalidate_gb_image *cicmd = NULL;
 231       SVGA3dCmdInvalidateGBImage *invalidate_cmd;
 232       const unsigned total_commands_size =
 233          sizeof(*invalidate_cmd) + numBoxes * sizeof(*whole_update_cmd);
 234
 235       /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
 236        * 'numBoxes' UPDATE_GB_IMAGE commands.  Allocate all at once rather
 237        * than with separate commands because we need to properly deal with
 238        * filling the command buffer.
 239        */
 240       invalidate_cmd = SVGA3D_FIFOReserve(swc,
 241                                           SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
 242                                           total_commands_size, 1 + numBoxes);
 243       if (!invalidate_cmd)
 244          return PIPE_ERROR_OUT_OF_MEMORY;
 245
 246       cicmd = container_of(invalidate_cmd, cicmd, body);
 247       cicmd->header.size = sizeof(*invalidate_cmd);
 248       swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL, sbuf->handle,
 249                               (SVGA_RELOC_WRITE |
 250                                SVGA_RELOC_INTERNAL |
 251                                SVGA_RELOC_DMA));
 252       invalidate_cmd->image.face = 0;
 253       invalidate_cmd->image.mipmap = 0;
 254
 255       /* The whole_update_command is a SVGA3dCmdHeader plus the
 256        * SVGA3dCmdUpdateGBImage command.
 257        */
 258       whole_update_cmd = (struct svga_3d_update_gb_image *) &invalidate_cmd[1];
 259       /* initialize the first UPDATE_GB_IMAGE command */
 260       whole_update_cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
 261       update_cmd = &whole_update_cmd->body;
 262
 263    } else {
 264       /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
 265       const unsigned total_commands_size =
 266          sizeof(*update_cmd) + (numBoxes - 1) * sizeof(*whole_update_cmd);
 267
 268       update_cmd = SVGA3D_FIFOReserve(swc,
 269                                       SVGA_3D_CMD_UPDATE_GB_IMAGE,
 270                                       total_commands_size, numBoxes);
 271       if (!update_cmd)
 272          return PIPE_ERROR_OUT_OF_MEMORY;
 273
 274       /* The whole_update_command is a SVGA3dCmdHeader plus the
 275        * SVGA3dCmdUpdateGBImage command.
 276        */
 277       whole_update_cmd = container_of(update_cmd, whole_update_cmd, body);
 278    }
 279
 280    /* Init the first UPDATE_GB_IMAGE command */
 281    whole_update_cmd->header.size = sizeof(*update_cmd);
 282    swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
 283                            SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 284    update_cmd->image.face = 0;
 285    update_cmd->image.mipmap = 0;
 286
 287    /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
 288     * fill in the box info below.
 289     */
 290    sbuf->dma.updates = whole_update_cmd;
 291
 292    /*
 293     * Copy the face, mipmap, etc. info to all subsequent commands.
 294     * Also do the surface relocation for each subsequent command.
 295     */
 296    for (i = 1; i < numBoxes; ++i) {
 297       whole_update_cmd++;
 298       memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd));
 299
 300       swc->surface_relocation(swc, &whole_update_cmd->body.image.sid, NULL,
 301                               sbuf->handle,
 302                               SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 303    }
 304
 305    /* Increment reference count */
 306    sbuf->dma.svga = svga;
 307    dummy = NULL;
 308    pipe_resource_reference(&dummy, &sbuf->b.b);
 309    SVGA_FIFOCommitAll(swc);
 310
 311    sbuf->dma.flags.discard = FALSE;
 312
 313    return PIPE_OK;
 314 }
 315
 316
 317 /**
 318  * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
 319  */
 320 static enum pipe_error
 321 svga_buffer_upload_command(struct svga_context *svga,
 322                            struct svga_buffer *sbuf)
 323 {
 324    struct svga_winsys_context *swc = svga->swc;
 325    struct svga_winsys_buffer *guest = sbuf->hwbuf;
 326    struct svga_winsys_surface *host = sbuf->handle;
 327    SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 328    SVGA3dCmdSurfaceDMA *cmd;
 329    uint32 numBoxes = sbuf->map.num_ranges;
 330    SVGA3dCopyBox *boxes;
 331    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 332    unsigned region_flags;
 333    unsigned surface_flags;
 334    struct pipe_resource *dummy;
 335
 336    if (svga_have_gb_objects(svga))
 337       return svga_buffer_upload_gb_command(svga, sbuf);
 338
 339    if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 340       region_flags = SVGA_RELOC_READ;
 341       surface_flags = SVGA_RELOC_WRITE;
 342    }
 343    else if (transfer == SVGA3D_READ_HOST_VRAM) {
 344       region_flags = SVGA_RELOC_WRITE;
 345       surface_flags = SVGA_RELOC_READ;
 346    }
 347    else {
 348       assert(0);
 349       return PIPE_ERROR_BAD_INPUT;
 350    }
 351
 352    assert(numBoxes);
 353
 354    cmd = SVGA3D_FIFOReserve(swc,
 355                             SVGA_3D_CMD_SURFACE_DMA,
 356                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 357                             2);
 358    if (!cmd)
 359       return PIPE_ERROR_OUT_OF_MEMORY;
 360
 361    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 362    cmd->guest.pitch = 0;
 363
 364    swc->surface_relocation(swc, &cmd->host.sid, NULL, host, surface_flags);
 365    cmd->host.face = 0;
 366    cmd->host.mipmap = 0;
 367
 368    cmd->transfer = transfer;
 369
 370    sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
 371    sbuf->dma.svga = svga;
 372
 373    /* Increment reference count */
 374    dummy = NULL;
 375    pipe_resource_reference(&dummy, &sbuf->b.b);
 376
 377    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 378    pSuffix->suffixSize = sizeof *pSuffix;
 379    pSuffix->maximumOffset = sbuf->b.b.width0;
 380    pSuffix->flags = sbuf->dma.flags;
 381
 382    SVGA_FIFOCommitAll(swc);
 383
 384    sbuf->dma.flags.discard = FALSE;
 385
 386    return PIPE_OK;
 387 }
 388
 389
 390 /**
 391  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 392  * with the final ranges.
 393  */
 394 void
 395 svga_buffer_upload_flush(struct svga_context *svga,
 396                          struct svga_buffer *sbuf)
 397 {
 398    unsigned i;
 399    struct pipe_resource *dummy;
 400
 401    if (!sbuf->dma.pending) {
 402       //debug_printf("no dma pending on buffer\n");
 403       return;
 404    }
 405
 406    assert(sbuf->handle);
 407    assert(sbuf->map.num_ranges);
 408    assert(sbuf->dma.svga == svga);
 409
 410    /*
 411     * Patch the DMA/update command with the final copy box.
 412     */
 413    if (svga_have_gb_objects(svga)) {
 414       struct svga_3d_update_gb_image *update = sbuf->dma.updates;
 415       assert(update);
 416
 417       for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
 418          SVGA3dBox *box = &update->body.box;
 419
 420          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 421                   sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 422
 423          box->x = sbuf->map.ranges[i].start;
 424          box->y = 0;
 425          box->z = 0;
 426          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 427          box->h = 1;
 428          box->d = 1;
 429
 430          assert(box->x <= sbuf->b.b.width0);
 431          assert(box->x + box->w <= sbuf->b.b.width0);
 432       }
 433    }
 434    else {
 435       assert(sbuf->hwbuf);
 436       assert(sbuf->dma.boxes);
 437       SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 438
 439       for (i = 0; i < sbuf->map.num_ranges; ++i) {
 440          SVGA3dCopyBox *box = sbuf->dma.boxes + i;
 441
 442          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 443                sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 444
 445          box->x = sbuf->map.ranges[i].start;
 446          box->y = 0;
 447          box->z = 0;
 448          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 449          box->h = 1;
 450          box->d = 1;
 451          box->srcx = sbuf->map.ranges[i].start;
 452          box->srcy = 0;
 453          box->srcz = 0;
 454
 455          assert(box->x <= sbuf->b.b.width0);
 456          assert(box->x + box->w <= sbuf->b.b.width0);
 457       }
 458    }
 459
 460    /* Reset sbuf for next use/upload */
 461
 462    sbuf->map.num_ranges = 0;
 463
 464    assert(sbuf->head.prev && sbuf->head.next);
 465    LIST_DEL(&sbuf->head);  /* remove from svga->dirty_buffers list */
 466 #ifdef DEBUG
 467    sbuf->head.next = sbuf->head.prev = NULL;
 468 #endif
 469    sbuf->dma.pending = FALSE;
 470    sbuf->dma.flags.discard = FALSE;
 471    sbuf->dma.flags.unsynchronized = FALSE;
 472
 473    sbuf->dma.svga = NULL;
 474    sbuf->dma.boxes = NULL;
 475    sbuf->dma.updates = NULL;
 476
 477    /* Decrement reference count (and potentially destroy) */
 478    dummy = &sbuf->b.b;
 479    pipe_resource_reference(&dummy, NULL);
 480 }
 481
 482
 483 /**
 484  * Note a dirty range.
 485  *
 486  * This function only notes the range down. It doesn't actually emit a DMA
 487  * upload command. That only happens when a context tries to refer to this
 488  * buffer, and the DMA upload command is added to that context's command
 489  * buffer.
 490  *
 491  * We try to lump as many contiguous DMA transfers together as possible.
 492  */
 493 void
 494 svga_buffer_add_range(struct svga_buffer *sbuf,
 495                       unsigned start,
 496                       unsigned end)
 497 {
 498    unsigned i;
 499    unsigned nearest_range;
 500    unsigned nearest_dist;
 501
 502    assert(end > start);
 503
 504    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 505       nearest_range = sbuf->map.num_ranges;
 506       nearest_dist = ~0;
 507    } else {
 508       nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
 509       nearest_dist = 0;
 510    }
 511
 512    /*
 513     * Try to grow one of the ranges.
 514     */
 515
 516    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 517       int left_dist;
 518       int right_dist;
 519       int dist;
 520
 521       left_dist = start - sbuf->map.ranges[i].end;
 522       right_dist = sbuf->map.ranges[i].start - end;
 523       dist = MAX2(left_dist, right_dist);
 524
 525       if (dist <= 0) {
 526          /*
 527           * Ranges are contiguous or overlapping -- extend this one and return.
 528           *
 529           * Note that it is not this function's task to prevent overlapping
 530           * ranges, as the GMR was already given so it is too late to do
 531           * anything.  If the ranges overlap here it must surely be because
 532           * PIPE_TRANSFER_UNSYNCHRONIZED was set.
 533           */
 534
 535          sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
 536          sbuf->map.ranges[i].end   = MAX2(sbuf->map.ranges[i].end,   end);
 537          return;
 538       }
 539       else {
 540          /*
 541           * Discontiguous ranges -- keep track of the nearest range.
 542           */
 543
 544          if (dist < nearest_dist) {
 545             nearest_range = i;
 546             nearest_dist = dist;
 547          }
 548       }
 549    }
 550
 551    /*
 552     * We cannot add a new range to an existing DMA command, so patch-up the
 553     * pending DMA upload and start clean.
 554     */
 555
 556    svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
 557
 558    assert(!sbuf->dma.pending);
 559    assert(!sbuf->dma.svga);
 560    assert(!sbuf->dma.boxes);
 561
 562    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 563       /*
 564        * Add a new range.
 565        */
 566
 567       sbuf->map.ranges[sbuf->map.num_ranges].start = start;
 568       sbuf->map.ranges[sbuf->map.num_ranges].end = end;
 569       ++sbuf->map.num_ranges;
 570    } else {
 571       /*
 572        * Everything else failed, so just extend the nearest range.
 573        *
 574        * It is OK to do this because we always keep a local copy of the
 575        * host buffer data, for SW TNL, and the host never modifies the buffer.
 576        */
 577
 578       assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
 579       assert(nearest_range < sbuf->map.num_ranges);
 580       sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
 581       sbuf->map.ranges[nearest_range].end   = MAX2(sbuf->map.ranges[nearest_range].end,   end);
 582    }
 583 }
 584
 585
 586
 587 /**
 588  * Copy the contents of the malloc buffer to a hardware buffer.
 589  */
 590 static enum pipe_error
 591 svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf)
 592 {
 593    assert(!sbuf->user);
 594    if (!svga_buffer_has_hw_storage(sbuf)) {
 595       struct svga_screen *ss = svga_screen(sbuf->b.b.screen);
 596       enum pipe_error ret;
 597       boolean retry;
 598       void *map;
 599
 600       assert(sbuf->swbuf);
 601       if (!sbuf->swbuf)
 602          return PIPE_ERROR;
 603
 604       ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen),
 605                                           sbuf);
 606       if (ret != PIPE_OK)
 607          return ret;
 608
 609       pipe_mutex_lock(ss->swc_mutex);
 610       map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
 611       assert(map);
 612       assert(!retry);
 613       if (!map) {
 614          pipe_mutex_unlock(ss->swc_mutex);
 615          svga_buffer_destroy_hw_storage(ss, sbuf);
 616          return PIPE_ERROR;
 617       }
 618
 619       memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
 620       svga_buffer_hw_storage_unmap(svga, sbuf);
 621
 622       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 623       assert(!sbuf->map.count);
 624       if (!sbuf->map.count) {
 625          if (sbuf->user)
 626             sbuf->user = FALSE;
 627          else
 628             align_free(sbuf->swbuf);
 629          sbuf->swbuf = NULL;
 630       }
 631
 632       pipe_mutex_unlock(ss->swc_mutex);
 633    }
 634
 635    return PIPE_OK;
 636 }
 637
 638
 639 /**
 640  * Upload the buffer to the host in a piecewise fashion.
 641  *
 642  * Used when the buffer is too big to fit in the GMR aperture.
 643  * This function should never get called in the guest-backed case
 644  * since we always have a full-sized hardware storage backing the
 645  * host surface.
 646  */
 647 static enum pipe_error
 648 svga_buffer_upload_piecewise(struct svga_screen *ss,
 649                              struct svga_context *svga,
 650                              struct svga_buffer *sbuf)
 651 {
 652    struct svga_winsys_screen *sws = ss->sws;
 653    const unsigned alignment = sizeof(void *);
 654    const unsigned usage = 0;
 655    unsigned i;
 656
 657    assert(sbuf->map.num_ranges);
 658    assert(!sbuf->dma.pending);
 659    assert(!svga_have_gb_objects(svga));
 660
 661    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 662
 663    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 664       struct svga_buffer_range *range = &sbuf->map.ranges[i];
 665       unsigned offset = range->start;
 666       unsigned size = range->end - range->start;
 667
 668       while (offset < range->end) {
 669          struct svga_winsys_buffer *hwbuf;
 670          uint8_t *map;
 671          enum pipe_error ret;
 672
 673          if (offset + size > range->end)
 674             size = range->end - offset;
 675
 676          hwbuf = sws->buffer_create(sws, alignment, usage, size);
 677          while (!hwbuf) {
 678             size /= 2;
 679             if (!size)
 680                return PIPE_ERROR_OUT_OF_MEMORY;
 681             hwbuf = sws->buffer_create(sws, alignment, usage, size);
 682          }
 683
 684          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 685                   offset, offset + size);
 686
 687          map = sws->buffer_map(sws, hwbuf,
 688                                PIPE_TRANSFER_WRITE |
 689                                PIPE_TRANSFER_DISCARD_RANGE);
 690          assert(map);
 691          if (map) {
 692             memcpy(map, (const char *) sbuf->swbuf + offset, size);
 693             sws->buffer_unmap(sws, hwbuf);
 694          }
 695
 696          ret = SVGA3D_BufferDMA(svga->swc,
 697                                 hwbuf, sbuf->handle,
 698                                 SVGA3D_WRITE_HOST_VRAM,
 699                                 size, 0, offset, sbuf->dma.flags);
 700          if (ret != PIPE_OK) {
 701             svga_context_flush(svga, NULL);
 702             ret =  SVGA3D_BufferDMA(svga->swc,
 703                                     hwbuf, sbuf->handle,
 704                                     SVGA3D_WRITE_HOST_VRAM,
 705                                     size, 0, offset, sbuf->dma.flags);
 706             assert(ret == PIPE_OK);
 707          }
 708
 709          sbuf->dma.flags.discard = FALSE;
 710
 711          sws->buffer_destroy(sws, hwbuf);
 712
 713          offset += size;
 714       }
 715    }
 716
 717    sbuf->map.num_ranges = 0;
 718
 719    return PIPE_OK;
 720 }
 721
 722
 723 /**
 724  * Get (or create/upload) the winsys surface handle so that we can
 725  * refer to this buffer in fifo commands.
 726  * This function will create the host surface, and in the GB case also the
 727  * hardware storage. In the non-GB case, the hardware storage will be created
 728  * if there are mapped ranges and the data is currently in a malloc'ed buffer.
 729  */
 730 struct svga_winsys_surface *
 731 svga_buffer_handle(struct svga_context *svga,
 732                    struct pipe_resource *buf)
 733 {
 734    struct pipe_screen *screen = svga->pipe.screen;
 735    struct svga_screen *ss = svga_screen(screen);
 736    struct svga_buffer *sbuf;
 737    enum pipe_error ret;
 738
 739    if (!buf)
 740       return NULL;
 741
 742    sbuf = svga_buffer(buf);
 743
 744    assert(!sbuf->user);
 745
 746    if (!sbuf->handle) {
 747       /* This call will set sbuf->handle */
 748       if (svga_have_gb_objects(svga)) {
 749          ret = svga_buffer_update_hw(svga, sbuf);
 750       } else {
 751          ret = svga_buffer_create_host_surface(ss, sbuf);
 752       }
 753       if (ret != PIPE_OK)
 754          return NULL;
 755    }
 756
 757    assert(sbuf->handle);
 758
 759    if (sbuf->map.num_ranges) {
 760       if (!sbuf->dma.pending) {
 761          /*
 762           * No pending DMA upload yet, so insert a DMA upload command now.
 763           */
 764
 765          /*
 766           * Migrate the data from swbuf -> hwbuf if necessary.
 767           */
 768          ret = svga_buffer_update_hw(svga, sbuf);
 769          if (ret == PIPE_OK) {
 770             /*
 771              * Queue a dma command.
 772              */
 773
 774             ret = svga_buffer_upload_command(svga, sbuf);
 775             if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 776                svga_context_flush(svga, NULL);
 777                ret = svga_buffer_upload_command(svga, sbuf);
 778                assert(ret == PIPE_OK);
 779             }
 780             if (ret == PIPE_OK) {
 781                sbuf->dma.pending = TRUE;
 782                assert(!sbuf->head.prev && !sbuf->head.next);
 783                LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 784             }
 785          }
 786          else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 787             /*
 788              * The buffer is too big to fit in the GMR aperture, so break it in
 789              * smaller pieces.
 790              */
 791             ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
 792          }
 793
 794          if (ret != PIPE_OK) {
 795             /*
 796              * Something unexpected happened above. There is very little that
 797              * we can do other than proceeding while ignoring the dirty ranges.
 798              */
 799             assert(0);
 800             sbuf->map.num_ranges = 0;
 801          }
 802       }
 803       else {
 804          /*
 805           * There a pending dma already. Make sure it is from this context.
 806           */
 807          assert(sbuf->dma.svga == svga);
 808       }
 809    }
 810
 811    assert(!sbuf->map.num_ranges || sbuf->dma.pending);
 812
 813    return sbuf->handle;
 814 }
 815
 816
 817
 818 void
 819 svga_context_flush_buffers(struct svga_context *svga)
 820 {
 821    struct list_head *curr, *next;
 822    struct svga_buffer *sbuf;
 823
 824    curr = svga->dirty_buffers.next;
 825    next = curr->next;
 826    while(curr != &svga->dirty_buffers) {
 827       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 828
 829       assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
 830       assert(sbuf->dma.pending);
 831
 832       svga_buffer_upload_flush(svga, sbuf);
 833
 834       curr = next;
 835       next = curr->next;
 836    }
 837 }