Merge commit 'origin/master' into gallium-msaa
[mesa.git] / src / gallium / drivers / svga / svga_resource_buffer_upload.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34
35 #include "svga_context.h"
36 #include "svga_screen.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_winsys.h"
40 #include "svga_debug.h"
41
42
43 /**
44 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
45 *
46 * It will flush and retry in case the first attempt to create a DMA buffer
47 * fails, so it should not be called from any function involved in flushing
48 * to avoid recursion.
49 */
50 struct svga_winsys_buffer *
51 svga_winsys_buffer_create( struct svga_context *svga,
52 unsigned alignment,
53 unsigned usage,
54 unsigned size )
55 {
56 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
57 struct svga_winsys_screen *sws = svgascreen->sws;
58 struct svga_winsys_buffer *buf;
59
60 /* Just try */
61 buf = sws->buffer_create(sws, alignment, usage, size);
62 if(!buf) {
63
64 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing screen to find %d bytes GMR\n",
65 size);
66
67 /* Try flushing all pending DMAs */
68 svga_context_flush(svga, NULL);
69 buf = sws->buffer_create(sws, alignment, usage, size);
70 }
71
72 return buf;
73 }
74
75
76 void
77 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
78 {
79 struct svga_winsys_screen *sws = ss->sws;
80
81 assert(!sbuf->map.count);
82 assert(sbuf->hwbuf);
83 if(sbuf->hwbuf) {
84 sws->buffer_destroy(sws, sbuf->hwbuf);
85 sbuf->hwbuf = NULL;
86 }
87 }
88
89
90
91 /**
92 * Allocate DMA'ble storage for the buffer.
93 *
94 * Called before mapping a buffer.
95 */
96 enum pipe_error
97 svga_buffer_create_hw_storage(struct svga_screen *ss,
98 struct svga_buffer *sbuf)
99 {
100 assert(!sbuf->user);
101
102 if(!sbuf->hwbuf) {
103 struct svga_winsys_screen *sws = ss->sws;
104 unsigned alignment = 16;
105 unsigned usage = 0;
106 unsigned size = sbuf->b.b.width0;
107
108 sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
109 if(!sbuf->hwbuf)
110 return PIPE_ERROR_OUT_OF_MEMORY;
111
112 assert(!sbuf->dma.pending);
113 }
114
115 return PIPE_OK;
116 }
117
118
119
120 enum pipe_error
121 svga_buffer_create_host_surface(struct svga_screen *ss,
122 struct svga_buffer *sbuf)
123 {
124 if(!sbuf->handle) {
125 sbuf->key.flags = 0;
126
127 sbuf->key.format = SVGA3D_BUFFER;
128 if(sbuf->b.b.bind & PIPE_BIND_VERTEX_BUFFER)
129 sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
130 if(sbuf->b.b.bind & PIPE_BIND_INDEX_BUFFER)
131 sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
132
133 sbuf->key.size.width = sbuf->b.b.width0;
134 sbuf->key.size.height = 1;
135 sbuf->key.size.depth = 1;
136
137 sbuf->key.numFaces = 1;
138 sbuf->key.numMipLevels = 1;
139 sbuf->key.cachable = 1;
140
141 SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
142
143 sbuf->handle = svga_screen_surface_create(ss, &sbuf->key);
144 if(!sbuf->handle)
145 return PIPE_ERROR_OUT_OF_MEMORY;
146
147 /* Always set the discard flag on the first time the buffer is written
148 * as svga_screen_surface_create might have passed a recycled host
149 * buffer.
150 */
151 sbuf->dma.flags.discard = TRUE;
152
153 SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
154 }
155
156 return PIPE_OK;
157 }
158
159
160 void
161 svga_buffer_destroy_host_surface(struct svga_screen *ss,
162 struct svga_buffer *sbuf)
163 {
164 if(sbuf->handle) {
165 SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
166 svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
167 }
168 }
169
170
171 /**
172 * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
173 */
174 static enum pipe_error
175 svga_buffer_upload_command(struct svga_context *svga,
176 struct svga_buffer *sbuf)
177 {
178 struct svga_winsys_context *swc = svga->swc;
179 struct svga_winsys_buffer *guest = sbuf->hwbuf;
180 struct svga_winsys_surface *host = sbuf->handle;
181 SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
182 SVGA3dCmdSurfaceDMA *cmd;
183 uint32 numBoxes = sbuf->map.num_ranges;
184 SVGA3dCopyBox *boxes;
185 SVGA3dCmdSurfaceDMASuffix *pSuffix;
186 unsigned region_flags;
187 unsigned surface_flags;
188 struct pipe_resource *dummy;
189
190 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
191 region_flags = SVGA_RELOC_READ;
192 surface_flags = SVGA_RELOC_WRITE;
193 }
194 else if(transfer == SVGA3D_READ_HOST_VRAM) {
195 region_flags = SVGA_RELOC_WRITE;
196 surface_flags = SVGA_RELOC_READ;
197 }
198 else {
199 assert(0);
200 return PIPE_ERROR_BAD_INPUT;
201 }
202
203 assert(numBoxes);
204
205 cmd = SVGA3D_FIFOReserve(swc,
206 SVGA_3D_CMD_SURFACE_DMA,
207 sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
208 2);
209 if(!cmd)
210 return PIPE_ERROR_OUT_OF_MEMORY;
211
212 swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
213 cmd->guest.pitch = 0;
214
215 swc->surface_relocation(swc, &cmd->host.sid, host, surface_flags);
216 cmd->host.face = 0;
217 cmd->host.mipmap = 0;
218
219 cmd->transfer = transfer;
220
221 sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
222 sbuf->dma.svga = svga;
223
224 /* Increment reference count */
225 dummy = NULL;
226 pipe_resource_reference(&dummy, &sbuf->b.b);
227
228 pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
229 pSuffix->suffixSize = sizeof *pSuffix;
230 pSuffix->maximumOffset = sbuf->b.b.width0;
231 pSuffix->flags = sbuf->dma.flags;
232
233 SVGA_FIFOCommitAll(swc);
234
235 sbuf->dma.flags.discard = FALSE;
236
237 return PIPE_OK;
238 }
239
240
241 /**
242 * Patch up the upload DMA command reserved by svga_buffer_upload_command
243 * with the final ranges.
244 */
245 static void
246 svga_buffer_upload_flush(struct svga_context *svga,
247 struct svga_buffer *sbuf)
248 {
249 SVGA3dCopyBox *boxes;
250 unsigned i;
251
252 assert(sbuf->handle);
253 assert(sbuf->hwbuf);
254 assert(sbuf->map.num_ranges);
255 assert(sbuf->dma.svga == svga);
256 assert(sbuf->dma.boxes);
257
258 /*
259 * Patch the DMA command with the final copy box.
260 */
261
262 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
263
264 boxes = sbuf->dma.boxes;
265 for(i = 0; i < sbuf->map.num_ranges; ++i) {
266 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
267 sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
268
269 boxes[i].x = sbuf->map.ranges[i].start;
270 boxes[i].y = 0;
271 boxes[i].z = 0;
272 boxes[i].w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
273 boxes[i].h = 1;
274 boxes[i].d = 1;
275 boxes[i].srcx = sbuf->map.ranges[i].start;
276 boxes[i].srcy = 0;
277 boxes[i].srcz = 0;
278 }
279
280 sbuf->map.num_ranges = 0;
281
282 assert(sbuf->head.prev && sbuf->head.next);
283 LIST_DEL(&sbuf->head);
284 #ifdef DEBUG
285 sbuf->head.next = sbuf->head.prev = NULL;
286 #endif
287 sbuf->dma.pending = FALSE;
288
289 sbuf->dma.svga = NULL;
290 sbuf->dma.boxes = NULL;
291
292 /* Decrement reference count */
293 pipe_reference(&(sbuf->b.b.reference), NULL);
294 sbuf = NULL;
295 }
296
297
298
299 /**
300 * Note a dirty range.
301 *
302 * This function only notes the range down. It doesn't actually emit a DMA
303 * upload command. That only happens when a context tries to refer to this
304 * buffer, and the DMA upload command is added to that context's command buffer.
305 *
306 * We try to lump as many contiguous DMA transfers together as possible.
307 */
308 void
309 svga_buffer_add_range(struct svga_buffer *sbuf,
310 unsigned start,
311 unsigned end)
312 {
313 unsigned i;
314 unsigned nearest_range;
315 unsigned nearest_dist;
316
317 assert(end > start);
318
319 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
320 nearest_range = sbuf->map.num_ranges;
321 nearest_dist = ~0;
322 } else {
323 nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
324 nearest_dist = 0;
325 }
326
327 /*
328 * Try to grow one of the ranges.
329 *
330 * Note that it is not this function task to care about overlapping ranges,
331 * as the GMR was already given so it is too late to do anything. Situations
332 * where overlapping ranges may pose a problem should be detected via
333 * pipe_context::is_resource_referenced and the context that refers to the
334 * buffer should be flushed.
335 */
336
337 for(i = 0; i < sbuf->map.num_ranges; ++i) {
338 int left_dist;
339 int right_dist;
340 int dist;
341
342 left_dist = start - sbuf->map.ranges[i].end;
343 right_dist = sbuf->map.ranges[i].start - end;
344 dist = MAX2(left_dist, right_dist);
345
346 if (dist <= 0) {
347 /*
348 * Ranges are contiguous or overlapping -- extend this one and return.
349 */
350
351 sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
352 sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
353 return;
354 }
355 else {
356 /*
357 * Discontiguous ranges -- keep track of the nearest range.
358 */
359
360 if (dist < nearest_dist) {
361 nearest_range = i;
362 nearest_dist = dist;
363 }
364 }
365 }
366
367 /*
368 * We cannot add a new range to an existing DMA command, so patch-up the
369 * pending DMA upload and start clean.
370 */
371
372 if(sbuf->dma.pending)
373 svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
374
375 assert(!sbuf->dma.pending);
376 assert(!sbuf->dma.svga);
377 assert(!sbuf->dma.boxes);
378
379 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
380 /*
381 * Add a new range.
382 */
383
384 sbuf->map.ranges[sbuf->map.num_ranges].start = start;
385 sbuf->map.ranges[sbuf->map.num_ranges].end = end;
386 ++sbuf->map.num_ranges;
387 } else {
388 /*
389 * Everything else failed, so just extend the nearest range.
390 *
391 * It is OK to do this because we always keep a local copy of the
392 * host buffer data, for SW TNL, and the host never modifies the buffer.
393 */
394
395 assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
396 assert(nearest_range < sbuf->map.num_ranges);
397 sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
398 sbuf->map.ranges[nearest_range].end = MAX2(sbuf->map.ranges[nearest_range].end, end);
399 }
400 }
401
402
403
404 /**
405 * Copy the contents of the malloc buffer to a hardware buffer.
406 */
407 static INLINE enum pipe_error
408 svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
409 {
410 assert(!sbuf->user);
411 if(!sbuf->hwbuf) {
412 enum pipe_error ret;
413 void *map;
414
415 assert(sbuf->swbuf);
416 if(!sbuf->swbuf)
417 return PIPE_ERROR;
418
419 ret = svga_buffer_create_hw_storage(ss, sbuf);
420 if(ret != PIPE_OK)
421 return ret;
422
423 pipe_mutex_lock(ss->swc_mutex);
424 map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_TRANSFER_WRITE);
425 assert(map);
426 if(!map) {
427 pipe_mutex_unlock(ss->swc_mutex);
428 svga_buffer_destroy_hw_storage(ss, sbuf);
429 return PIPE_ERROR;
430 }
431
432 memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
433 ss->sws->buffer_unmap(ss->sws, sbuf->hwbuf);
434
435 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
436 assert(!sbuf->map.count);
437 if(!sbuf->map.count) {
438 if(sbuf->user)
439 sbuf->user = FALSE;
440 else
441 align_free(sbuf->swbuf);
442 sbuf->swbuf = NULL;
443 }
444
445 pipe_mutex_unlock(ss->swc_mutex);
446 }
447
448 return PIPE_OK;
449 }
450
451
452 /**
453 * Upload the buffer to the host in a piecewise fashion.
454 *
455 * Used when the buffer is too big to fit in the GMR aperture.
456 */
457 static INLINE enum pipe_error
458 svga_buffer_upload_piecewise(struct svga_screen *ss,
459 struct svga_context *svga,
460 struct svga_buffer *sbuf)
461 {
462 struct svga_winsys_screen *sws = ss->sws;
463 const unsigned alignment = sizeof(void *);
464 const unsigned usage = 0;
465 unsigned i;
466
467 assert(sbuf->map.num_ranges);
468 assert(!sbuf->dma.pending);
469
470 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
471
472 for (i = 0; i < sbuf->map.num_ranges; ++i) {
473 struct svga_buffer_range *range = &sbuf->map.ranges[i];
474 unsigned offset = range->start;
475 unsigned size = range->end - range->start;
476
477 while (offset < range->end) {
478 struct svga_winsys_buffer *hwbuf;
479 uint8_t *map;
480 enum pipe_error ret;
481
482 if (offset + size > range->end)
483 size = range->end - offset;
484
485 hwbuf = sws->buffer_create(sws, alignment, usage, size);
486 while (!hwbuf) {
487 size /= 2;
488 if (!size)
489 return PIPE_ERROR_OUT_OF_MEMORY;
490 hwbuf = sws->buffer_create(sws, alignment, usage, size);
491 }
492
493 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
494 offset, offset + size);
495
496 map = sws->buffer_map(sws, hwbuf,
497 PIPE_TRANSFER_WRITE |
498 PIPE_TRANSFER_DISCARD);
499 assert(map);
500 if (map) {
501 memcpy(map, sbuf->swbuf, size);
502 sws->buffer_unmap(sws, hwbuf);
503 }
504
505 ret = SVGA3D_BufferDMA(svga->swc,
506 hwbuf, sbuf->handle,
507 SVGA3D_WRITE_HOST_VRAM,
508 size, 0, offset, sbuf->dma.flags);
509 if(ret != PIPE_OK) {
510 svga_context_flush(svga, NULL);
511 ret = SVGA3D_BufferDMA(svga->swc,
512 hwbuf, sbuf->handle,
513 SVGA3D_WRITE_HOST_VRAM,
514 size, 0, offset, sbuf->dma.flags);
515 assert(ret == PIPE_OK);
516 }
517
518 sbuf->dma.flags.discard = FALSE;
519
520 sws->buffer_destroy(sws, hwbuf);
521
522 offset += size;
523 }
524 }
525
526 sbuf->map.num_ranges = 0;
527
528 return PIPE_OK;
529 }
530
531
532
533
534 /* Get (or create/upload) the winsys surface handle so that we can
535 * refer to this buffer in fifo commands.
536 */
537 struct svga_winsys_surface *
538 svga_buffer_handle(struct svga_context *svga,
539 struct pipe_resource *buf)
540 {
541 struct pipe_screen *screen = svga->pipe.screen;
542 struct svga_screen *ss = svga_screen(screen);
543 struct svga_buffer *sbuf;
544 enum pipe_error ret;
545
546 if(!buf)
547 return NULL;
548
549 sbuf = svga_buffer(buf);
550
551 assert(!sbuf->map.count);
552 assert(!sbuf->user);
553
554 if(!sbuf->handle) {
555 ret = svga_buffer_create_host_surface(ss, sbuf);
556 if(ret != PIPE_OK)
557 return NULL;
558 }
559
560 assert(sbuf->handle);
561
562 if (sbuf->map.num_ranges) {
563 if (!sbuf->dma.pending) {
564 /*
565 * No pending DMA upload yet, so insert a DMA upload command now.
566 */
567
568 /*
569 * Migrate the data from swbuf -> hwbuf if necessary.
570 */
571 ret = svga_buffer_update_hw(ss, sbuf);
572 if (ret == PIPE_OK) {
573 /*
574 * Queue a dma command.
575 */
576
577 ret = svga_buffer_upload_command(svga, sbuf);
578 if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
579 svga_context_flush(svga, NULL);
580 ret = svga_buffer_upload_command(svga, sbuf);
581 assert(ret == PIPE_OK);
582 }
583 if (ret == PIPE_OK) {
584 sbuf->dma.pending = TRUE;
585 assert(!sbuf->head.prev && !sbuf->head.next);
586 LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
587 }
588 }
589 else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
590 /*
591 * The buffer is too big to fit in the GMR aperture, so break it in
592 * smaller pieces.
593 */
594 ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
595 }
596
597 if (ret != PIPE_OK) {
598 /*
599 * Something unexpected happened above. There is very little that
600 * we can do other than proceeding while ignoring the dirty ranges.
601 */
602 assert(0);
603 sbuf->map.num_ranges = 0;
604 }
605 }
606 else {
607 /*
608 * There a pending dma already. Make sure it is from this context.
609 */
610 assert(sbuf->dma.svga == svga);
611 }
612 }
613
614 assert(!sbuf->map.num_ranges || sbuf->dma.pending);
615
616 return sbuf->handle;
617 }
618
619
620
621 void
622 svga_context_flush_buffers(struct svga_context *svga)
623 {
624 struct list_head *curr, *next;
625 struct svga_buffer *sbuf;
626
627 curr = svga->dirty_buffers.next;
628 next = curr->next;
629 while(curr != &svga->dirty_buffers) {
630 sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
631
632 assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
633 assert(sbuf->dma.pending);
634
635 svga_buffer_upload_flush(svga, sbuf);
636
637 curr = next;
638 next = curr->next;
639 }
640 }