src/gallium/drivers/svga/svga_resource_buffer_upload.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26
  27 #include "os/os_thread.h"
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_math.h"
  32 #include "util/u_memory.h"
  33
  34 #include "svga_cmd.h"
  35 #include "svga_context.h"
  36 #include "svga_debug.h"
  37 #include "svga_resource_buffer.h"
  38 #include "svga_resource_buffer_upload.h"
  39 #include "svga_screen.h"
  40 #include "svga_winsys.h"
  41
  42 /**
  43  * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
  44  *
  45  */
  46 struct svga_3d_update_gb_image {
  47    SVGA3dCmdHeader header;
  48    SVGA3dCmdUpdateGBImage body;
  49 };
  50
  51 struct svga_3d_invalidate_gb_image {
  52    SVGA3dCmdHeader header;
  53    SVGA3dCmdInvalidateGBImage body;
  54 };
  55
  56
  57 /**
  58  * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
  59  *
  60  * It will flush and retry in case the first attempt to create a DMA buffer
  61  * fails, so it should not be called from any function involved in flushing
  62  * to avoid recursion.
  63  */
  64 struct svga_winsys_buffer *
  65 svga_winsys_buffer_create( struct svga_context *svga,
  66                            unsigned alignment,
  67                            unsigned usage,
  68                            unsigned size )
  69 {
  70    struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
  71    struct svga_winsys_screen *sws = svgascreen->sws;
  72    struct svga_winsys_buffer *buf;
  73
  74    /* Just try */
  75    buf = sws->buffer_create(sws, alignment, usage, size);
  76    if (!buf) {
  77       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
  78                size);
  79
  80       /* Try flushing all pending DMAs */
  81       svga_context_flush(svga, NULL);
  82       buf = sws->buffer_create(sws, alignment, usage, size);
  83    }
  84
  85    return buf;
  86 }
  87
  88
  89 /**
  90  * Destroy HW storage if separate from the host surface.
  91  * In the GB case, the HW storage is associated with the host surface
  92  * and is therefore a No-op.
  93  */
  94 void
  95 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
  96 {
  97    struct svga_winsys_screen *sws = ss->sws;
  98
  99    assert(!sbuf->map.count);
 100    assert(sbuf->hwbuf);
 101    if (sbuf->hwbuf) {
 102       sws->buffer_destroy(sws, sbuf->hwbuf);
 103       sbuf->hwbuf = NULL;
 104    }
 105 }
 106
 107
 108
 109 /**
 110  * Allocate DMA'ble or Updatable storage for the buffer.
 111  *
 112  * Called before mapping a buffer.
 113  */
 114 enum pipe_error
 115 svga_buffer_create_hw_storage(struct svga_screen *ss,
 116                               struct svga_buffer *sbuf)
 117 {
 118    assert(!sbuf->user);
 119
 120    if (ss->sws->have_gb_objects) {
 121       assert(sbuf->handle || !sbuf->dma.pending);
 122       return svga_buffer_create_host_surface(ss, sbuf);
 123    }
 124    if (!sbuf->hwbuf) {
 125       struct svga_winsys_screen *sws = ss->sws;
 126       unsigned alignment = 16;
 127       unsigned usage = 0;
 128       unsigned size = sbuf->b.b.width0;
 129
 130       sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
 131       if (!sbuf->hwbuf)
 132          return PIPE_ERROR_OUT_OF_MEMORY;
 133
 134       assert(!sbuf->dma.pending);
 135    }
 136
 137    return PIPE_OK;
 138 }
 139
 140
 141
 142 enum pipe_error
 143 svga_buffer_create_host_surface(struct svga_screen *ss,
 144                                 struct svga_buffer *sbuf)
 145 {
 146    assert(!sbuf->user);
 147
 148    if (!sbuf->handle) {
 149       sbuf->key.flags = 0;
 150
 151       sbuf->key.format = SVGA3D_BUFFER;
 152       if (sbuf->bind_flags & PIPE_BIND_VERTEX_BUFFER) {
 153          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
 154          sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
 155       }
 156       if (sbuf->bind_flags & PIPE_BIND_INDEX_BUFFER) {
 157          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
 158          sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
 159       }
 160       if (sbuf->bind_flags & PIPE_BIND_CONSTANT_BUFFER)
 161          sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
 162
 163       if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT)
 164          sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
 165
 166       if (sbuf->bind_flags & PIPE_BIND_SAMPLER_VIEW)
 167          sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 168
 169       sbuf->key.size.width = sbuf->b.b.width0;
 170       sbuf->key.size.height = 1;
 171       sbuf->key.size.depth = 1;
 172
 173       sbuf->key.numFaces = 1;
 174       sbuf->key.numMipLevels = 1;
 175       sbuf->key.cachable = 1;
 176       sbuf->key.arraySize = 1;
 177
 178       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
 179
 180       sbuf->handle = svga_screen_surface_create(ss, sbuf->b.b.bind,
 181                                                 sbuf->b.b.usage, &sbuf->key);
 182       if (!sbuf->handle)
 183          return PIPE_ERROR_OUT_OF_MEMORY;
 184
 185       /* Always set the discard flag on the first time the buffer is written
 186        * as svga_screen_surface_create might have passed a recycled host
 187        * buffer.
 188        */
 189       sbuf->dma.flags.discard = TRUE;
 190
 191       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
 192    }
 193
 194    return PIPE_OK;
 195 }
 196
 197
 198 void
 199 svga_buffer_destroy_host_surface(struct svga_screen *ss,
 200                                  struct svga_buffer *sbuf)
 201 {
 202    if (sbuf->handle) {
 203       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
 204       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 205    }
 206 }
 207
 208
 209 /**
 210  * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
 211  * command buffer, equal to the current number of mapped ranges.
 212  * The UPDATE_GB_IMAGE commands will be patched with the
 213  * actual ranges just before flush.
 214  */
 215 static enum pipe_error
 216 svga_buffer_upload_gb_command(struct svga_context *svga,
 217                               struct svga_buffer *sbuf)
 218 {
 219    struct svga_winsys_context *swc = svga->swc;
 220    SVGA3dCmdUpdateGBImage *update_cmd;
 221    struct svga_3d_update_gb_image *whole_update_cmd = NULL;
 222    uint32 numBoxes = sbuf->map.num_ranges;
 223    struct pipe_resource *dummy;
 224    unsigned int i;
 225
 226    assert(numBoxes);
 227    assert(sbuf->dma.updates == NULL);
 228
 229    if (sbuf->dma.flags.discard) {
 230       struct svga_3d_invalidate_gb_image *cicmd = NULL;
 231       SVGA3dCmdInvalidateGBImage *invalidate_cmd;
 232       const unsigned total_commands_size =
 233          sizeof(*invalidate_cmd) + numBoxes * sizeof(*whole_update_cmd);
 234
 235       /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
 236        * 'numBoxes' UPDATE_GB_IMAGE commands.  Allocate all at once rather
 237        * than with separate commands because we need to properly deal with
 238        * filling the command buffer.
 239        */
 240       invalidate_cmd = SVGA3D_FIFOReserve(swc,
 241                                           SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
 242                                           total_commands_size, 1 + numBoxes);
 243       if (!invalidate_cmd)
 244          return PIPE_ERROR_OUT_OF_MEMORY;
 245
 246       cicmd = container_of(invalidate_cmd, cicmd, body);
 247       cicmd->header.size = sizeof(*invalidate_cmd);
 248       swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL, sbuf->handle,
 249                               (SVGA_RELOC_WRITE |
 250                                SVGA_RELOC_INTERNAL |
 251                                SVGA_RELOC_DMA));
 252       invalidate_cmd->image.face = 0;
 253       invalidate_cmd->image.mipmap = 0;
 254
 255       /* The whole_update_command is a SVGA3dCmdHeader plus the
 256        * SVGA3dCmdUpdateGBImage command.
 257        */
 258       whole_update_cmd = (struct svga_3d_update_gb_image *) &invalidate_cmd[1];
 259       /* initialize the first UPDATE_GB_IMAGE command */
 260       whole_update_cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
 261       update_cmd = &whole_update_cmd->body;
 262
 263    } else {
 264       /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
 265       const unsigned total_commands_size =
 266          sizeof(*update_cmd) + (numBoxes - 1) * sizeof(*whole_update_cmd);
 267
 268       update_cmd = SVGA3D_FIFOReserve(swc,
 269                                       SVGA_3D_CMD_UPDATE_GB_IMAGE,
 270                                       total_commands_size, numBoxes);
 271       if (!update_cmd)
 272          return PIPE_ERROR_OUT_OF_MEMORY;
 273
 274       /* The whole_update_command is a SVGA3dCmdHeader plus the
 275        * SVGA3dCmdUpdateGBImage command.
 276        */
 277       whole_update_cmd = container_of(update_cmd, whole_update_cmd, body);
 278    }
 279
 280    /* Init the first UPDATE_GB_IMAGE command */
 281    whole_update_cmd->header.size = sizeof(*update_cmd);
 282    swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
 283                            SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 284    update_cmd->image.face = 0;
 285    update_cmd->image.mipmap = 0;
 286
 287    /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
 288     * fill in the box info below.
 289     */
 290    sbuf->dma.updates = whole_update_cmd;
 291
 292    /*
 293     * Copy the face, mipmap, etc. info to all subsequent commands.
 294     * Also do the surface relocation for each subsequent command.
 295     */
 296    for (i = 1; i < numBoxes; ++i) {
 297       whole_update_cmd++;
 298       memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd));
 299
 300       swc->surface_relocation(swc, &whole_update_cmd->body.image.sid, NULL,
 301                               sbuf->handle,
 302                               SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 303    }
 304
 305    /* Increment reference count */
 306    sbuf->dma.svga = svga;
 307    dummy = NULL;
 308    pipe_resource_reference(&dummy, &sbuf->b.b);
 309    SVGA_FIFOCommitAll(swc);
 310
 311    sbuf->dma.flags.discard = FALSE;
 312
 313    return PIPE_OK;
 314 }
 315
 316
 317 /**
 318  * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
 319  */
 320 static enum pipe_error
 321 svga_buffer_upload_command(struct svga_context *svga,
 322                            struct svga_buffer *sbuf)
 323 {
 324    struct svga_winsys_context *swc = svga->swc;
 325    struct svga_winsys_buffer *guest = sbuf->hwbuf;
 326    struct svga_winsys_surface *host = sbuf->handle;
 327    SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 328    SVGA3dCmdSurfaceDMA *cmd;
 329    uint32 numBoxes = sbuf->map.num_ranges;
 330    SVGA3dCopyBox *boxes;
 331    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 332    unsigned region_flags;
 333    unsigned surface_flags;
 334    struct pipe_resource *dummy;
 335
 336    if (svga_have_gb_objects(svga))
 337       return svga_buffer_upload_gb_command(svga, sbuf);
 338
 339    if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 340       region_flags = SVGA_RELOC_READ;
 341       surface_flags = SVGA_RELOC_WRITE;
 342    }
 343    else if (transfer == SVGA3D_READ_HOST_VRAM) {
 344       region_flags = SVGA_RELOC_WRITE;
 345       surface_flags = SVGA_RELOC_READ;
 346    }
 347    else {
 348       assert(0);
 349       return PIPE_ERROR_BAD_INPUT;
 350    }
 351
 352    assert(numBoxes);
 353
 354    cmd = SVGA3D_FIFOReserve(swc,
 355                             SVGA_3D_CMD_SURFACE_DMA,
 356                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 357                             2);
 358    if (!cmd)
 359       return PIPE_ERROR_OUT_OF_MEMORY;
 360
 361    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 362    cmd->guest.pitch = 0;
 363
 364    swc->surface_relocation(swc, &cmd->host.sid, NULL, host, surface_flags);
 365    cmd->host.face = 0;
 366    cmd->host.mipmap = 0;
 367
 368    cmd->transfer = transfer;
 369
 370    sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
 371    sbuf->dma.svga = svga;
 372
 373    /* Increment reference count */
 374    dummy = NULL;
 375    pipe_resource_reference(&dummy, &sbuf->b.b);
 376
 377    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 378    pSuffix->suffixSize = sizeof *pSuffix;
 379    pSuffix->maximumOffset = sbuf->b.b.width0;
 380    pSuffix->flags = sbuf->dma.flags;
 381
 382    SVGA_FIFOCommitAll(swc);
 383
 384    sbuf->dma.flags.discard = FALSE;
 385
 386    return PIPE_OK;
 387 }
 388
 389
 390 /**
 391  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 392  * with the final ranges.
 393  */
 394 void
 395 svga_buffer_upload_flush(struct svga_context *svga,
 396                          struct svga_buffer *sbuf)
 397 {
 398    unsigned i;
 399    struct pipe_resource *dummy;
 400
 401    if (!sbuf->dma.pending) {
 402       //debug_printf("no dma pending on buffer\n");
 403       return;
 404    }
 405
 406    assert(sbuf->handle);
 407    assert(sbuf->map.num_ranges);
 408    assert(sbuf->dma.svga == svga);
 409
 410    /*
 411     * Patch the DMA/update command with the final copy box.
 412     */
 413    if (svga_have_gb_objects(svga)) {
 414       struct svga_3d_update_gb_image *update = sbuf->dma.updates;
 415       assert(update);
 416
 417       for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
 418          SVGA3dBox *box = &update->body.box;
 419
 420          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 421                   sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 422
 423          box->x = sbuf->map.ranges[i].start;
 424          box->y = 0;
 425          box->z = 0;
 426          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 427          box->h = 1;
 428          box->d = 1;
 429
 430          assert(box->x <= sbuf->b.b.width0);
 431          assert(box->x + box->w <= sbuf->b.b.width0);
 432
 433          svga->hud.num_bytes_uploaded += box->w;
 434       }
 435    }
 436    else {
 437       assert(sbuf->hwbuf);
 438       assert(sbuf->dma.boxes);
 439       SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 440
 441       for (i = 0; i < sbuf->map.num_ranges; ++i) {
 442          SVGA3dCopyBox *box = sbuf->dma.boxes + i;
 443
 444          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 445                sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 446
 447          box->x = sbuf->map.ranges[i].start;
 448          box->y = 0;
 449          box->z = 0;
 450          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 451          box->h = 1;
 452          box->d = 1;
 453          box->srcx = sbuf->map.ranges[i].start;
 454          box->srcy = 0;
 455          box->srcz = 0;
 456
 457          assert(box->x <= sbuf->b.b.width0);
 458          assert(box->x + box->w <= sbuf->b.b.width0);
 459
 460          svga->hud.num_bytes_uploaded += box->w;
 461       }
 462    }
 463
 464    /* Reset sbuf for next use/upload */
 465
 466    sbuf->map.num_ranges = 0;
 467
 468    assert(sbuf->head.prev && sbuf->head.next);
 469    LIST_DEL(&sbuf->head);  /* remove from svga->dirty_buffers list */
 470 #ifdef DEBUG
 471    sbuf->head.next = sbuf->head.prev = NULL;
 472 #endif
 473    sbuf->dma.pending = FALSE;
 474    sbuf->dma.flags.discard = FALSE;
 475    sbuf->dma.flags.unsynchronized = FALSE;
 476
 477    sbuf->dma.svga = NULL;
 478    sbuf->dma.boxes = NULL;
 479    sbuf->dma.updates = NULL;
 480
 481    /* Decrement reference count (and potentially destroy) */
 482    dummy = &sbuf->b.b;
 483    pipe_resource_reference(&dummy, NULL);
 484 }
 485
 486
 487 /**
 488  * Note a dirty range.
 489  *
 490  * This function only notes the range down. It doesn't actually emit a DMA
 491  * upload command. That only happens when a context tries to refer to this
 492  * buffer, and the DMA upload command is added to that context's command
 493  * buffer.
 494  *
 495  * We try to lump as many contiguous DMA transfers together as possible.
 496  */
 497 void
 498 svga_buffer_add_range(struct svga_buffer *sbuf,
 499                       unsigned start,
 500                       unsigned end)
 501 {
 502    unsigned i;
 503    unsigned nearest_range;
 504    unsigned nearest_dist;
 505
 506    assert(end > start);
 507
 508    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 509       nearest_range = sbuf->map.num_ranges;
 510       nearest_dist = ~0;
 511    } else {
 512       nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
 513       nearest_dist = 0;
 514    }
 515
 516    /*
 517     * Try to grow one of the ranges.
 518     */
 519
 520    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 521       int left_dist;
 522       int right_dist;
 523       int dist;
 524
 525       left_dist = start - sbuf->map.ranges[i].end;
 526       right_dist = sbuf->map.ranges[i].start - end;
 527       dist = MAX2(left_dist, right_dist);
 528
 529       if (dist <= 0) {
 530          /*
 531           * Ranges are contiguous or overlapping -- extend this one and return.
 532           *
 533           * Note that it is not this function's task to prevent overlapping
 534           * ranges, as the GMR was already given so it is too late to do
 535           * anything.  If the ranges overlap here it must surely be because
 536           * PIPE_TRANSFER_UNSYNCHRONIZED was set.
 537           */
 538
 539          sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
 540          sbuf->map.ranges[i].end   = MAX2(sbuf->map.ranges[i].end,   end);
 541          return;
 542       }
 543       else {
 544          /*
 545           * Discontiguous ranges -- keep track of the nearest range.
 546           */
 547
 548          if (dist < nearest_dist) {
 549             nearest_range = i;
 550             nearest_dist = dist;
 551          }
 552       }
 553    }
 554
 555    /*
 556     * We cannot add a new range to an existing DMA command, so patch-up the
 557     * pending DMA upload and start clean.
 558     */
 559
 560    svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
 561
 562    assert(!sbuf->dma.pending);
 563    assert(!sbuf->dma.svga);
 564    assert(!sbuf->dma.boxes);
 565
 566    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 567       /*
 568        * Add a new range.
 569        */
 570
 571       sbuf->map.ranges[sbuf->map.num_ranges].start = start;
 572       sbuf->map.ranges[sbuf->map.num_ranges].end = end;
 573       ++sbuf->map.num_ranges;
 574    } else {
 575       /*
 576        * Everything else failed, so just extend the nearest range.
 577        *
 578        * It is OK to do this because we always keep a local copy of the
 579        * host buffer data, for SW TNL, and the host never modifies the buffer.
 580        */
 581
 582       assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
 583       assert(nearest_range < sbuf->map.num_ranges);
 584       sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
 585       sbuf->map.ranges[nearest_range].end   = MAX2(sbuf->map.ranges[nearest_range].end,   end);
 586    }
 587 }
 588
 589
 590
 591 /**
 592  * Copy the contents of the malloc buffer to a hardware buffer.
 593  */
 594 static enum pipe_error
 595 svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf)
 596 {
 597    assert(!sbuf->user);
 598    if (!svga_buffer_has_hw_storage(sbuf)) {
 599       struct svga_screen *ss = svga_screen(sbuf->b.b.screen);
 600       enum pipe_error ret;
 601       boolean retry;
 602       void *map;
 603
 604       assert(sbuf->swbuf);
 605       if (!sbuf->swbuf)
 606          return PIPE_ERROR;
 607
 608       ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen),
 609                                           sbuf);
 610       if (ret != PIPE_OK)
 611          return ret;
 612
 613       pipe_mutex_lock(ss->swc_mutex);
 614       map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
 615       assert(map);
 616       assert(!retry);
 617       if (!map) {
 618          pipe_mutex_unlock(ss->swc_mutex);
 619          svga_buffer_destroy_hw_storage(ss, sbuf);
 620          return PIPE_ERROR;
 621       }
 622
 623       memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
 624       svga_buffer_hw_storage_unmap(svga, sbuf);
 625
 626       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 627       assert(!sbuf->map.count);
 628       if (!sbuf->map.count) {
 629          if (sbuf->user)
 630             sbuf->user = FALSE;
 631          else
 632             align_free(sbuf->swbuf);
 633          sbuf->swbuf = NULL;
 634       }
 635
 636       pipe_mutex_unlock(ss->swc_mutex);
 637    }
 638
 639    return PIPE_OK;
 640 }
 641
 642
 643 /**
 644  * Upload the buffer to the host in a piecewise fashion.
 645  *
 646  * Used when the buffer is too big to fit in the GMR aperture.
 647  * This function should never get called in the guest-backed case
 648  * since we always have a full-sized hardware storage backing the
 649  * host surface.
 650  */
 651 static enum pipe_error
 652 svga_buffer_upload_piecewise(struct svga_screen *ss,
 653                              struct svga_context *svga,
 654                              struct svga_buffer *sbuf)
 655 {
 656    struct svga_winsys_screen *sws = ss->sws;
 657    const unsigned alignment = sizeof(void *);
 658    const unsigned usage = 0;
 659    unsigned i;
 660
 661    assert(sbuf->map.num_ranges);
 662    assert(!sbuf->dma.pending);
 663    assert(!svga_have_gb_objects(svga));
 664
 665    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 666
 667    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 668       struct svga_buffer_range *range = &sbuf->map.ranges[i];
 669       unsigned offset = range->start;
 670       unsigned size = range->end - range->start;
 671
 672       while (offset < range->end) {
 673          struct svga_winsys_buffer *hwbuf;
 674          uint8_t *map;
 675          enum pipe_error ret;
 676
 677          if (offset + size > range->end)
 678             size = range->end - offset;
 679
 680          hwbuf = sws->buffer_create(sws, alignment, usage, size);
 681          while (!hwbuf) {
 682             size /= 2;
 683             if (!size)
 684                return PIPE_ERROR_OUT_OF_MEMORY;
 685             hwbuf = sws->buffer_create(sws, alignment, usage, size);
 686          }
 687
 688          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 689                   offset, offset + size);
 690
 691          map = sws->buffer_map(sws, hwbuf,
 692                                PIPE_TRANSFER_WRITE |
 693                                PIPE_TRANSFER_DISCARD_RANGE);
 694          assert(map);
 695          if (map) {
 696             memcpy(map, (const char *) sbuf->swbuf + offset, size);
 697             sws->buffer_unmap(sws, hwbuf);
 698          }
 699
 700          ret = SVGA3D_BufferDMA(svga->swc,
 701                                 hwbuf, sbuf->handle,
 702                                 SVGA3D_WRITE_HOST_VRAM,
 703                                 size, 0, offset, sbuf->dma.flags);
 704          if (ret != PIPE_OK) {
 705             svga_context_flush(svga, NULL);
 706             ret =  SVGA3D_BufferDMA(svga->swc,
 707                                     hwbuf, sbuf->handle,
 708                                     SVGA3D_WRITE_HOST_VRAM,
 709                                     size, 0, offset, sbuf->dma.flags);
 710             assert(ret == PIPE_OK);
 711          }
 712
 713          sbuf->dma.flags.discard = FALSE;
 714
 715          sws->buffer_destroy(sws, hwbuf);
 716
 717          offset += size;
 718       }
 719    }
 720
 721    sbuf->map.num_ranges = 0;
 722
 723    return PIPE_OK;
 724 }
 725
 726
 727 /**
 728  * Get (or create/upload) the winsys surface handle so that we can
 729  * refer to this buffer in fifo commands.
 730  * This function will create the host surface, and in the GB case also the
 731  * hardware storage. In the non-GB case, the hardware storage will be created
 732  * if there are mapped ranges and the data is currently in a malloc'ed buffer.
 733  */
 734 struct svga_winsys_surface *
 735 svga_buffer_handle(struct svga_context *svga,
 736                    struct pipe_resource *buf)
 737 {
 738    struct pipe_screen *screen = svga->pipe.screen;
 739    struct svga_screen *ss = svga_screen(screen);
 740    struct svga_buffer *sbuf;
 741    enum pipe_error ret;
 742
 743    if (!buf)
 744       return NULL;
 745
 746    sbuf = svga_buffer(buf);
 747
 748    assert(!sbuf->user);
 749
 750    if (!sbuf->handle) {
 751       /* This call will set sbuf->handle */
 752       if (svga_have_gb_objects(svga)) {
 753          ret = svga_buffer_update_hw(svga, sbuf);
 754       } else {
 755          ret = svga_buffer_create_host_surface(ss, sbuf);
 756       }
 757       if (ret != PIPE_OK)
 758          return NULL;
 759    }
 760
 761    assert(sbuf->handle);
 762
 763    if (sbuf->map.num_ranges) {
 764       if (!sbuf->dma.pending) {
 765          /*
 766           * No pending DMA upload yet, so insert a DMA upload command now.
 767           */
 768
 769          /*
 770           * Migrate the data from swbuf -> hwbuf if necessary.
 771           */
 772          ret = svga_buffer_update_hw(svga, sbuf);
 773          if (ret == PIPE_OK) {
 774             /*
 775              * Queue a dma command.
 776              */
 777
 778             ret = svga_buffer_upload_command(svga, sbuf);
 779             if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 780                svga_context_flush(svga, NULL);
 781                ret = svga_buffer_upload_command(svga, sbuf);
 782                assert(ret == PIPE_OK);
 783             }
 784             if (ret == PIPE_OK) {
 785                sbuf->dma.pending = TRUE;
 786                assert(!sbuf->head.prev && !sbuf->head.next);
 787                LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 788             }
 789          }
 790          else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 791             /*
 792              * The buffer is too big to fit in the GMR aperture, so break it in
 793              * smaller pieces.
 794              */
 795             ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
 796          }
 797
 798          if (ret != PIPE_OK) {
 799             /*
 800              * Something unexpected happened above. There is very little that
 801              * we can do other than proceeding while ignoring the dirty ranges.
 802              */
 803             assert(0);
 804             sbuf->map.num_ranges = 0;
 805          }
 806       }
 807       else {
 808          /*
 809           * There a pending dma already. Make sure it is from this context.
 810           */
 811          assert(sbuf->dma.svga == svga);
 812       }
 813    }
 814
 815    assert(!sbuf->map.num_ranges || sbuf->dma.pending);
 816
 817    return sbuf->handle;
 818 }
 819
 820
 821
 822 void
 823 svga_context_flush_buffers(struct svga_context *svga)
 824 {
 825    struct list_head *curr, *next;
 826    struct svga_buffer *sbuf;
 827
 828    curr = svga->dirty_buffers.next;
 829    next = curr->next;
 830    while(curr != &svga->dirty_buffers) {
 831       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 832
 833       assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
 834       assert(sbuf->dma.pending);
 835
 836       svga_buffer_upload_flush(svga, sbuf);
 837
 838       curr = next;
 839       next = curr->next;
 840    }
 841 }