svga: enable MSAA for SM4_1 device
[mesa.git] / src / gallium / drivers / svga / svga_resource_buffer_upload.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26
27 #include "os/os_thread.h"
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "util/u_math.h"
32 #include "util/u_memory.h"
33
34 #include "svga_cmd.h"
35 #include "svga_context.h"
36 #include "svga_debug.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_screen.h"
40 #include "svga_winsys.h"
41
42 /**
43 * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
44 *
45 */
46 struct svga_3d_update_gb_image {
47 SVGA3dCmdHeader header;
48 SVGA3dCmdUpdateGBImage body;
49 };
50
51 struct svga_3d_invalidate_gb_image {
52 SVGA3dCmdHeader header;
53 SVGA3dCmdInvalidateGBImage body;
54 };
55
56
57 /**
58 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
59 *
60 * It will flush and retry in case the first attempt to create a DMA buffer
61 * fails, so it should not be called from any function involved in flushing
62 * to avoid recursion.
63 */
64 struct svga_winsys_buffer *
65 svga_winsys_buffer_create( struct svga_context *svga,
66 unsigned alignment,
67 unsigned usage,
68 unsigned size )
69 {
70 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
71 struct svga_winsys_screen *sws = svgascreen->sws;
72 struct svga_winsys_buffer *buf;
73
74 /* Just try */
75 buf = sws->buffer_create(sws, alignment, usage, size);
76 if (!buf) {
77 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
78 size);
79
80 /* Try flushing all pending DMAs */
81 svga_context_flush(svga, NULL);
82 buf = sws->buffer_create(sws, alignment, usage, size);
83 }
84
85 return buf;
86 }
87
88
89 /**
90 * Destroy HW storage if separate from the host surface.
91 * In the GB case, the HW storage is associated with the host surface
92 * and is therefore a No-op.
93 */
94 void
95 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
96 {
97 struct svga_winsys_screen *sws = ss->sws;
98
99 assert(sbuf->map.count == 0);
100 assert(sbuf->hwbuf);
101 if (sbuf->hwbuf) {
102 sws->buffer_destroy(sws, sbuf->hwbuf);
103 sbuf->hwbuf = NULL;
104 }
105 }
106
107
108
109 /**
110 * Allocate DMA'ble or Updatable storage for the buffer.
111 *
112 * Called before mapping a buffer.
113 */
114 enum pipe_error
115 svga_buffer_create_hw_storage(struct svga_screen *ss,
116 struct svga_buffer *sbuf,
117 unsigned bind_flags)
118 {
119 assert(!sbuf->user);
120
121 if (ss->sws->have_gb_objects) {
122 assert(sbuf->handle || !sbuf->dma.pending);
123 return svga_buffer_create_host_surface(ss, sbuf, bind_flags);
124 }
125 if (!sbuf->hwbuf) {
126 struct svga_winsys_screen *sws = ss->sws;
127 unsigned alignment = 16;
128 unsigned usage = 0;
129 unsigned size = sbuf->b.b.width0;
130
131 sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
132 if (!sbuf->hwbuf)
133 return PIPE_ERROR_OUT_OF_MEMORY;
134
135 assert(!sbuf->dma.pending);
136 }
137
138 return PIPE_OK;
139 }
140
141
142 /**
143 * Allocate graphics memory for vertex/index/constant/etc buffer (not
144 * textures).
145 */
146 enum pipe_error
147 svga_buffer_create_host_surface(struct svga_screen *ss,
148 struct svga_buffer *sbuf,
149 unsigned bind_flags)
150 {
151 enum pipe_error ret = PIPE_OK;
152
153 assert(!sbuf->user);
154
155 if (!sbuf->handle) {
156 boolean validated;
157
158 sbuf->key.flags = 0;
159
160 sbuf->key.format = SVGA3D_BUFFER;
161 if (bind_flags & PIPE_BIND_VERTEX_BUFFER) {
162 sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
163 sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
164 }
165 if (bind_flags & PIPE_BIND_INDEX_BUFFER) {
166 sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
167 sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
168 }
169 if (bind_flags & PIPE_BIND_CONSTANT_BUFFER)
170 sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
171
172 if (bind_flags & PIPE_BIND_STREAM_OUTPUT)
173 sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
174
175 if (bind_flags & PIPE_BIND_SAMPLER_VIEW)
176 sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
177
178 if (!bind_flags && sbuf->b.b.usage == PIPE_USAGE_STAGING) {
179 /* This surface is to be used with the
180 * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other
181 * bind flags are allowed to be set for this surface.
182 */
183 sbuf->key.flags = SVGA3D_SURFACE_TRANSFER_FROM_BUFFER;
184 }
185
186 sbuf->key.size.width = sbuf->b.b.width0;
187 sbuf->key.size.height = 1;
188 sbuf->key.size.depth = 1;
189
190 sbuf->key.numFaces = 1;
191 sbuf->key.numMipLevels = 1;
192 sbuf->key.cachable = 1;
193 sbuf->key.arraySize = 1;
194 sbuf->key.sampleCount = 0;
195
196 SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n",
197 sbuf->b.b.width0);
198
199 sbuf->handle = svga_screen_surface_create(ss, bind_flags,
200 sbuf->b.b.usage,
201 &validated, &sbuf->key);
202 if (!sbuf->handle)
203 return PIPE_ERROR_OUT_OF_MEMORY;
204
205 /* Always set the discard flag on the first time the buffer is written
206 * as svga_screen_surface_create might have passed a recycled host
207 * buffer.
208 */
209 sbuf->dma.flags.discard = TRUE;
210
211 SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n",
212 sbuf->handle, sbuf->b.b.width0);
213
214 /* Add the new surface to the buffer surface list */
215 ret = svga_buffer_add_host_surface(sbuf, sbuf->handle, &sbuf->key,
216 bind_flags);
217 }
218
219 return ret;
220 }
221
222
223 /**
224 * Recreates a host surface with the new bind flags.
225 */
226 enum pipe_error
227 svga_buffer_recreate_host_surface(struct svga_context *svga,
228 struct svga_buffer *sbuf,
229 unsigned bind_flags)
230 {
231 enum pipe_error ret = PIPE_OK;
232 struct svga_winsys_surface *old_handle = sbuf->handle;
233
234 assert(sbuf->bind_flags != bind_flags);
235 assert(old_handle);
236
237 sbuf->handle = NULL;
238
239 /* Create a new resource with the requested bind_flags */
240 ret = svga_buffer_create_host_surface(svga_screen(svga->pipe.screen),
241 sbuf, bind_flags);
242 if (ret == PIPE_OK) {
243 /* Copy the surface data */
244 assert(sbuf->handle);
245 ret = SVGA3D_vgpu10_BufferCopy(svga->swc, old_handle, sbuf->handle,
246 0, 0, sbuf->b.b.width0);
247 if (ret != PIPE_OK) {
248 svga_context_flush(svga, NULL);
249 ret = SVGA3D_vgpu10_BufferCopy(svga->swc, old_handle, sbuf->handle,
250 0, 0, sbuf->b.b.width0);
251 assert(ret == PIPE_OK);
252 }
253 }
254
255 /* Set the new bind flags for this buffer resource */
256 sbuf->bind_flags = bind_flags;
257
258 return ret;
259 }
260
261
262 /**
263 * Returns TRUE if the surface bind flags is compatible with the new bind flags.
264 */
265 static boolean
266 compatible_bind_flags(unsigned bind_flags,
267 unsigned tobind_flags)
268 {
269 if ((bind_flags & tobind_flags) == tobind_flags)
270 return TRUE;
271 else if ((bind_flags|tobind_flags) & PIPE_BIND_CONSTANT_BUFFER)
272 return FALSE;
273 else
274 return TRUE;
275 }
276
277
278 /**
279 * Returns a buffer surface from the surface list
280 * that has the requested bind flags or its existing bind flags
281 * can be promoted to include the new bind flags.
282 */
283 static struct svga_buffer_surface *
284 svga_buffer_get_host_surface(struct svga_buffer *sbuf,
285 unsigned bind_flags)
286 {
287 struct svga_buffer_surface *bufsurf;
288
289 LIST_FOR_EACH_ENTRY(bufsurf, &sbuf->surfaces, list) {
290 if (compatible_bind_flags(bufsurf->bind_flags, bind_flags))
291 return bufsurf;
292 }
293 return NULL;
294 }
295
296
297 /**
298 * Adds the host surface to the buffer surface list.
299 */
300 enum pipe_error
301 svga_buffer_add_host_surface(struct svga_buffer *sbuf,
302 struct svga_winsys_surface *handle,
303 struct svga_host_surface_cache_key *key,
304 unsigned bind_flags)
305 {
306 struct svga_buffer_surface *bufsurf;
307
308 bufsurf = CALLOC_STRUCT(svga_buffer_surface);
309 if (!bufsurf)
310 return PIPE_ERROR_OUT_OF_MEMORY;
311
312 bufsurf->bind_flags = bind_flags;
313 bufsurf->handle = handle;
314 bufsurf->key = *key;
315
316 /* add the surface to the surface list */
317 LIST_ADD(&bufsurf->list, &sbuf->surfaces);
318
319 return PIPE_OK;
320 }
321
322
323 /**
324 * Start using the specified surface for this buffer resource.
325 */
326 void
327 svga_buffer_bind_host_surface(struct svga_context *svga,
328 struct svga_buffer *sbuf,
329 struct svga_buffer_surface *bufsurf)
330 {
331 enum pipe_error ret;
332
333 /* Update the to-bind surface */
334 assert(bufsurf->handle);
335 assert(sbuf->handle);
336
337 /* If we are switching from stream output to other buffer,
338 * make sure to copy the buffer content.
339 */
340 if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT) {
341 ret = SVGA3D_vgpu10_BufferCopy(svga->swc, sbuf->handle, bufsurf->handle,
342 0, 0, sbuf->b.b.width0);
343 if (ret != PIPE_OK) {
344 svga_context_flush(svga, NULL);
345 ret = SVGA3D_vgpu10_BufferCopy(svga->swc, sbuf->handle, bufsurf->handle,
346 0, 0, sbuf->b.b.width0);
347 assert(ret == PIPE_OK);
348 }
349 }
350
351 /* Set this surface as the current one */
352 sbuf->handle = bufsurf->handle;
353 sbuf->key = bufsurf->key;
354 sbuf->bind_flags = bufsurf->bind_flags;
355 }
356
357
358 /**
359 * Prepare a host surface that can be used as indicated in the
360 * tobind_flags. If the existing host surface is not created
361 * with the necessary binding flags and if the new bind flags can be
362 * combined with the existing bind flags, then we will recreate a
363 * new surface with the combined bind flags. Otherwise, we will create
364 * a surface for that incompatible bind flags.
365 * For example, if a stream output buffer is reused as a constant buffer,
366 * since constant buffer surface cannot be bound as a stream output surface,
367 * two surfaces will be created, one for stream output,
368 * and another one for constant buffer.
369 */
370 enum pipe_error
371 svga_buffer_validate_host_surface(struct svga_context *svga,
372 struct svga_buffer *sbuf,
373 unsigned tobind_flags)
374 {
375 struct svga_buffer_surface *bufsurf;
376 enum pipe_error ret = PIPE_OK;
377
378 /* Flush any pending upload first */
379 svga_buffer_upload_flush(svga, sbuf);
380
381 /* First check from the cached buffer surface list to see if there is
382 * already a buffer surface that has the requested bind flags, or
383 * surface with compatible bind flags that can be promoted.
384 */
385 bufsurf = svga_buffer_get_host_surface(sbuf, tobind_flags);
386
387 if (bufsurf) {
388 if ((bufsurf->bind_flags & tobind_flags) == tobind_flags) {
389 /* there is a surface with the requested bind flags */
390 svga_buffer_bind_host_surface(svga, sbuf, bufsurf);
391 } else {
392
393 /* Recreate a host surface with the combined bind flags */
394 ret = svga_buffer_recreate_host_surface(svga, sbuf,
395 bufsurf->bind_flags |
396 tobind_flags);
397
398 /* Destroy the old surface */
399 svga_screen_surface_destroy(svga_screen(sbuf->b.b.screen),
400 &bufsurf->key, &bufsurf->handle);
401
402 LIST_DEL(&bufsurf->list);
403 FREE(bufsurf);
404 }
405 } else {
406 /* Need to create a new surface if the bind flags are incompatible,
407 * such as constant buffer surface & stream output surface.
408 */
409 ret = svga_buffer_recreate_host_surface(svga, sbuf,
410 tobind_flags);
411 }
412 return ret;
413 }
414
415
416 void
417 svga_buffer_destroy_host_surface(struct svga_screen *ss,
418 struct svga_buffer *sbuf)
419 {
420 struct svga_buffer_surface *bufsurf, *next;
421
422 LIST_FOR_EACH_ENTRY_SAFE(bufsurf, next, &sbuf->surfaces, list) {
423 SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n",
424 bufsurf->handle, sbuf->b.b.width0);
425 svga_screen_surface_destroy(ss, &bufsurf->key, &bufsurf->handle);
426 FREE(bufsurf);
427 }
428 }
429
430
431 /**
432 * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
433 * command buffer, equal to the current number of mapped ranges.
434 * The UPDATE_GB_IMAGE commands will be patched with the
435 * actual ranges just before flush.
436 */
437 static enum pipe_error
438 svga_buffer_upload_gb_command(struct svga_context *svga,
439 struct svga_buffer *sbuf)
440 {
441 struct svga_winsys_context *swc = svga->swc;
442 SVGA3dCmdUpdateGBImage *update_cmd;
443 struct svga_3d_update_gb_image *whole_update_cmd = NULL;
444 const uint32 numBoxes = sbuf->map.num_ranges;
445 struct pipe_resource *dummy;
446 unsigned i;
447
448 assert(svga_have_gb_objects(svga));
449 assert(numBoxes);
450 assert(sbuf->dma.updates == NULL);
451
452 if (sbuf->dma.flags.discard) {
453 struct svga_3d_invalidate_gb_image *cicmd = NULL;
454 SVGA3dCmdInvalidateGBImage *invalidate_cmd;
455 const unsigned total_commands_size =
456 sizeof(*invalidate_cmd) + numBoxes * sizeof(*whole_update_cmd);
457
458 /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
459 * 'numBoxes' UPDATE_GB_IMAGE commands. Allocate all at once rather
460 * than with separate commands because we need to properly deal with
461 * filling the command buffer.
462 */
463 invalidate_cmd = SVGA3D_FIFOReserve(swc,
464 SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
465 total_commands_size, 1 + numBoxes);
466 if (!invalidate_cmd)
467 return PIPE_ERROR_OUT_OF_MEMORY;
468
469 cicmd = container_of(invalidate_cmd, cicmd, body);
470 cicmd->header.size = sizeof(*invalidate_cmd);
471 swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL,
472 sbuf->handle,
473 (SVGA_RELOC_WRITE |
474 SVGA_RELOC_INTERNAL |
475 SVGA_RELOC_DMA));
476 invalidate_cmd->image.face = 0;
477 invalidate_cmd->image.mipmap = 0;
478
479 /* The whole_update_command is a SVGA3dCmdHeader plus the
480 * SVGA3dCmdUpdateGBImage command.
481 */
482 whole_update_cmd = (struct svga_3d_update_gb_image *) &invalidate_cmd[1];
483 /* initialize the first UPDATE_GB_IMAGE command */
484 whole_update_cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
485 update_cmd = &whole_update_cmd->body;
486
487 } else {
488 /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
489 const unsigned total_commands_size =
490 sizeof(*update_cmd) + (numBoxes - 1) * sizeof(*whole_update_cmd);
491
492 update_cmd = SVGA3D_FIFOReserve(swc,
493 SVGA_3D_CMD_UPDATE_GB_IMAGE,
494 total_commands_size, numBoxes);
495 if (!update_cmd)
496 return PIPE_ERROR_OUT_OF_MEMORY;
497
498 /* The whole_update_command is a SVGA3dCmdHeader plus the
499 * SVGA3dCmdUpdateGBImage command.
500 */
501 whole_update_cmd = container_of(update_cmd, whole_update_cmd, body);
502 }
503
504 /* Init the first UPDATE_GB_IMAGE command */
505 whole_update_cmd->header.size = sizeof(*update_cmd);
506 swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
507 SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
508 update_cmd->image.face = 0;
509 update_cmd->image.mipmap = 0;
510
511 /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
512 * fill in the box info below.
513 */
514 sbuf->dma.updates = whole_update_cmd;
515
516 /*
517 * Copy the face, mipmap, etc. info to all subsequent commands.
518 * Also do the surface relocation for each subsequent command.
519 */
520 for (i = 1; i < numBoxes; ++i) {
521 whole_update_cmd++;
522 memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd));
523
524 swc->surface_relocation(swc, &whole_update_cmd->body.image.sid, NULL,
525 sbuf->handle,
526 SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
527 }
528
529 /* Increment reference count */
530 sbuf->dma.svga = svga;
531 dummy = NULL;
532 pipe_resource_reference(&dummy, &sbuf->b.b);
533 SVGA_FIFOCommitAll(swc);
534
535 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
536 sbuf->dma.flags.discard = FALSE;
537
538 svga->hud.num_resource_updates++;
539
540 return PIPE_OK;
541 }
542
543
544 /**
545 * Issue DMA commands to transfer guest memory to the host.
546 * Note that the memory segments (offset, size) will be patched in
547 * later in the svga_buffer_upload_flush() function.
548 */
549 static enum pipe_error
550 svga_buffer_upload_hb_command(struct svga_context *svga,
551 struct svga_buffer *sbuf)
552 {
553 struct svga_winsys_context *swc = svga->swc;
554 struct svga_winsys_buffer *guest = sbuf->hwbuf;
555 struct svga_winsys_surface *host = sbuf->handle;
556 const SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
557 SVGA3dCmdSurfaceDMA *cmd;
558 const uint32 numBoxes = sbuf->map.num_ranges;
559 SVGA3dCopyBox *boxes;
560 SVGA3dCmdSurfaceDMASuffix *pSuffix;
561 unsigned region_flags;
562 unsigned surface_flags;
563 struct pipe_resource *dummy;
564
565 assert(!svga_have_gb_objects(svga));
566
567 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
568 region_flags = SVGA_RELOC_READ;
569 surface_flags = SVGA_RELOC_WRITE;
570 }
571 else if (transfer == SVGA3D_READ_HOST_VRAM) {
572 region_flags = SVGA_RELOC_WRITE;
573 surface_flags = SVGA_RELOC_READ;
574 }
575 else {
576 assert(0);
577 return PIPE_ERROR_BAD_INPUT;
578 }
579
580 assert(numBoxes);
581
582 cmd = SVGA3D_FIFOReserve(swc,
583 SVGA_3D_CMD_SURFACE_DMA,
584 sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
585 2);
586 if (!cmd)
587 return PIPE_ERROR_OUT_OF_MEMORY;
588
589 swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
590 cmd->guest.pitch = 0;
591
592 swc->surface_relocation(swc, &cmd->host.sid, NULL, host, surface_flags);
593 cmd->host.face = 0;
594 cmd->host.mipmap = 0;
595
596 cmd->transfer = transfer;
597
598 sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
599 sbuf->dma.svga = svga;
600
601 /* Increment reference count */
602 dummy = NULL;
603 pipe_resource_reference(&dummy, &sbuf->b.b);
604
605 pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
606 pSuffix->suffixSize = sizeof *pSuffix;
607 pSuffix->maximumOffset = sbuf->b.b.width0;
608 pSuffix->flags = sbuf->dma.flags;
609
610 SVGA_FIFOCommitAll(swc);
611
612 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
613 sbuf->dma.flags.discard = FALSE;
614
615 svga->hud.num_buffer_uploads++;
616
617 return PIPE_OK;
618 }
619
620
621 /**
622 * Issue commands to transfer guest memory to the host.
623 */
624 static enum pipe_error
625 svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf)
626 {
627 if (svga_have_gb_objects(svga)) {
628 return svga_buffer_upload_gb_command(svga, sbuf);
629 } else {
630 return svga_buffer_upload_hb_command(svga, sbuf);
631 }
632 }
633
634
635 /**
636 * Patch up the upload DMA command reserved by svga_buffer_upload_command
637 * with the final ranges.
638 */
639 void
640 svga_buffer_upload_flush(struct svga_context *svga, struct svga_buffer *sbuf)
641 {
642 unsigned i;
643 struct pipe_resource *dummy;
644
645 if (!sbuf->dma.pending) {
646 //debug_printf("no dma pending on buffer\n");
647 return;
648 }
649
650 assert(sbuf->handle);
651 assert(sbuf->map.num_ranges);
652 assert(sbuf->dma.svga == svga);
653
654 /*
655 * Patch the DMA/update command with the final copy box.
656 */
657 if (svga_have_gb_objects(svga)) {
658 struct svga_3d_update_gb_image *update = sbuf->dma.updates;
659 assert(update);
660
661 for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
662 SVGA3dBox *box = &update->body.box;
663
664 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
665 sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
666
667 box->x = sbuf->map.ranges[i].start;
668 box->y = 0;
669 box->z = 0;
670 box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
671 box->h = 1;
672 box->d = 1;
673
674 assert(box->x <= sbuf->b.b.width0);
675 assert(box->x + box->w <= sbuf->b.b.width0);
676
677 svga->hud.num_bytes_uploaded += box->w;
678 svga->hud.num_buffer_uploads++;
679 }
680 }
681 else {
682 assert(sbuf->hwbuf);
683 assert(sbuf->dma.boxes);
684 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
685
686 for (i = 0; i < sbuf->map.num_ranges; ++i) {
687 SVGA3dCopyBox *box = sbuf->dma.boxes + i;
688
689 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
690 sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
691
692 box->x = sbuf->map.ranges[i].start;
693 box->y = 0;
694 box->z = 0;
695 box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
696 box->h = 1;
697 box->d = 1;
698 box->srcx = sbuf->map.ranges[i].start;
699 box->srcy = 0;
700 box->srcz = 0;
701
702 assert(box->x <= sbuf->b.b.width0);
703 assert(box->x + box->w <= sbuf->b.b.width0);
704
705 svga->hud.num_bytes_uploaded += box->w;
706 svga->hud.num_buffer_uploads++;
707 }
708 }
709
710 /* Reset sbuf for next use/upload */
711
712 sbuf->map.num_ranges = 0;
713
714 assert(sbuf->head.prev && sbuf->head.next);
715 LIST_DEL(&sbuf->head); /* remove from svga->dirty_buffers list */
716 #ifdef DEBUG
717 sbuf->head.next = sbuf->head.prev = NULL;
718 #endif
719 sbuf->dma.pending = FALSE;
720 sbuf->dma.flags.discard = FALSE;
721 sbuf->dma.flags.unsynchronized = FALSE;
722
723 sbuf->dma.svga = NULL;
724 sbuf->dma.boxes = NULL;
725 sbuf->dma.updates = NULL;
726
727 /* Decrement reference count (and potentially destroy) */
728 dummy = &sbuf->b.b;
729 pipe_resource_reference(&dummy, NULL);
730 }
731
732
733 /**
734 * Note a dirty range.
735 *
736 * This function only notes the range down. It doesn't actually emit a DMA
737 * upload command. That only happens when a context tries to refer to this
738 * buffer, and the DMA upload command is added to that context's command
739 * buffer.
740 *
741 * We try to lump as many contiguous DMA transfers together as possible.
742 */
743 void
744 svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end)
745 {
746 unsigned i;
747 unsigned nearest_range;
748 unsigned nearest_dist;
749
750 assert(end > start);
751
752 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
753 nearest_range = sbuf->map.num_ranges;
754 nearest_dist = ~0;
755 } else {
756 nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
757 nearest_dist = 0;
758 }
759
760 /*
761 * Try to grow one of the ranges.
762 */
763 for (i = 0; i < sbuf->map.num_ranges; ++i) {
764 const int left_dist = start - sbuf->map.ranges[i].end;
765 const int right_dist = sbuf->map.ranges[i].start - end;
766 const int dist = MAX2(left_dist, right_dist);
767
768 if (dist <= 0) {
769 /*
770 * Ranges are contiguous or overlapping -- extend this one and return.
771 *
772 * Note that it is not this function's task to prevent overlapping
773 * ranges, as the GMR was already given so it is too late to do
774 * anything. If the ranges overlap here it must surely be because
775 * PIPE_TRANSFER_UNSYNCHRONIZED was set.
776 */
777 sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
778 sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
779 return;
780 }
781 else {
782 /*
783 * Discontiguous ranges -- keep track of the nearest range.
784 */
785 if (dist < nearest_dist) {
786 nearest_range = i;
787 nearest_dist = dist;
788 }
789 }
790 }
791
792 /*
793 * We cannot add a new range to an existing DMA command, so patch-up the
794 * pending DMA upload and start clean.
795 */
796
797 svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
798
799 assert(!sbuf->dma.pending);
800 assert(!sbuf->dma.svga);
801 assert(!sbuf->dma.boxes);
802
803 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
804 /*
805 * Add a new range.
806 */
807
808 sbuf->map.ranges[sbuf->map.num_ranges].start = start;
809 sbuf->map.ranges[sbuf->map.num_ranges].end = end;
810 ++sbuf->map.num_ranges;
811 } else {
812 /*
813 * Everything else failed, so just extend the nearest range.
814 *
815 * It is OK to do this because we always keep a local copy of the
816 * host buffer data, for SW TNL, and the host never modifies the buffer.
817 */
818
819 assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
820 assert(nearest_range < sbuf->map.num_ranges);
821 sbuf->map.ranges[nearest_range].start =
822 MIN2(sbuf->map.ranges[nearest_range].start, start);
823 sbuf->map.ranges[nearest_range].end =
824 MAX2(sbuf->map.ranges[nearest_range].end, end);
825 }
826 }
827
828
829
830 /**
831 * Copy the contents of the malloc buffer to a hardware buffer.
832 */
833 static enum pipe_error
834 svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf,
835 unsigned bind_flags)
836 {
837 assert(!sbuf->user);
838 if (!svga_buffer_has_hw_storage(sbuf)) {
839 struct svga_screen *ss = svga_screen(sbuf->b.b.screen);
840 enum pipe_error ret;
841 boolean retry;
842 void *map;
843 unsigned i;
844
845 assert(sbuf->swbuf);
846 if (!sbuf->swbuf)
847 return PIPE_ERROR;
848
849 ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen), sbuf,
850 bind_flags);
851 if (ret != PIPE_OK)
852 return ret;
853
854 mtx_lock(&ss->swc_mutex);
855 map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
856 assert(map);
857 assert(!retry);
858 if (!map) {
859 mtx_unlock(&ss->swc_mutex);
860 svga_buffer_destroy_hw_storage(ss, sbuf);
861 return PIPE_ERROR;
862 }
863
864 /* Copy data from malloc'd swbuf to the new hardware buffer */
865 for (i = 0; i < sbuf->map.num_ranges; i++) {
866 unsigned start = sbuf->map.ranges[i].start;
867 unsigned len = sbuf->map.ranges[i].end - start;
868 memcpy((uint8_t *) map + start, (uint8_t *) sbuf->swbuf + start, len);
869 }
870
871 svga_buffer_hw_storage_unmap(svga, sbuf);
872
873 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
874 assert(sbuf->map.count == 0);
875 if (sbuf->map.count == 0) {
876 if (sbuf->user)
877 sbuf->user = FALSE;
878 else
879 align_free(sbuf->swbuf);
880 sbuf->swbuf = NULL;
881 }
882
883 mtx_unlock(&ss->swc_mutex);
884 }
885
886 return PIPE_OK;
887 }
888
889
890 /**
891 * Upload the buffer to the host in a piecewise fashion.
892 *
893 * Used when the buffer is too big to fit in the GMR aperture.
894 * This function should never get called in the guest-backed case
895 * since we always have a full-sized hardware storage backing the
896 * host surface.
897 */
898 static enum pipe_error
899 svga_buffer_upload_piecewise(struct svga_screen *ss,
900 struct svga_context *svga,
901 struct svga_buffer *sbuf)
902 {
903 struct svga_winsys_screen *sws = ss->sws;
904 const unsigned alignment = sizeof(void *);
905 const unsigned usage = 0;
906 unsigned i;
907
908 assert(sbuf->map.num_ranges);
909 assert(!sbuf->dma.pending);
910 assert(!svga_have_gb_objects(svga));
911
912 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
913
914 for (i = 0; i < sbuf->map.num_ranges; ++i) {
915 const struct svga_buffer_range *range = &sbuf->map.ranges[i];
916 unsigned offset = range->start;
917 unsigned size = range->end - range->start;
918
919 while (offset < range->end) {
920 struct svga_winsys_buffer *hwbuf;
921 uint8_t *map;
922 enum pipe_error ret;
923
924 if (offset + size > range->end)
925 size = range->end - offset;
926
927 hwbuf = sws->buffer_create(sws, alignment, usage, size);
928 while (!hwbuf) {
929 size /= 2;
930 if (!size)
931 return PIPE_ERROR_OUT_OF_MEMORY;
932 hwbuf = sws->buffer_create(sws, alignment, usage, size);
933 }
934
935 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
936 offset, offset + size);
937
938 map = sws->buffer_map(sws, hwbuf,
939 PIPE_TRANSFER_WRITE |
940 PIPE_TRANSFER_DISCARD_RANGE);
941 assert(map);
942 if (map) {
943 memcpy(map, (const char *) sbuf->swbuf + offset, size);
944 sws->buffer_unmap(sws, hwbuf);
945 }
946
947 ret = SVGA3D_BufferDMA(svga->swc,
948 hwbuf, sbuf->handle,
949 SVGA3D_WRITE_HOST_VRAM,
950 size, 0, offset, sbuf->dma.flags);
951 if (ret != PIPE_OK) {
952 svga_context_flush(svga, NULL);
953 ret = SVGA3D_BufferDMA(svga->swc,
954 hwbuf, sbuf->handle,
955 SVGA3D_WRITE_HOST_VRAM,
956 size, 0, offset, sbuf->dma.flags);
957 assert(ret == PIPE_OK);
958 }
959
960 sbuf->dma.flags.discard = FALSE;
961
962 sws->buffer_destroy(sws, hwbuf);
963
964 offset += size;
965 }
966 }
967
968 sbuf->map.num_ranges = 0;
969
970 return PIPE_OK;
971 }
972
973
974 /**
975 * Get (or create/upload) the winsys surface handle so that we can
976 * refer to this buffer in fifo commands.
977 * This function will create the host surface, and in the GB case also the
978 * hardware storage. In the non-GB case, the hardware storage will be created
979 * if there are mapped ranges and the data is currently in a malloc'ed buffer.
980 */
981 struct svga_winsys_surface *
982 svga_buffer_handle(struct svga_context *svga, struct pipe_resource *buf,
983 unsigned tobind_flags)
984 {
985 struct pipe_screen *screen = svga->pipe.screen;
986 struct svga_screen *ss = svga_screen(screen);
987 struct svga_buffer *sbuf;
988 enum pipe_error ret;
989
990 if (!buf)
991 return NULL;
992
993 sbuf = svga_buffer(buf);
994
995 assert(!sbuf->user);
996
997 if (sbuf->handle) {
998 if ((sbuf->bind_flags & tobind_flags) != tobind_flags) {
999 /* If the allocated resource's bind flags do not include the
1000 * requested bind flags, validate the host surface.
1001 */
1002 ret = svga_buffer_validate_host_surface(svga, sbuf, tobind_flags);
1003 if (ret != PIPE_OK)
1004 return NULL;
1005 }
1006 } else {
1007 /* If there is no resource handle yet, then combine the buffer bind
1008 * flags and the tobind_flags if they are compatible.
1009 * If not, just use the tobind_flags for creating the resource handle.
1010 */
1011 if (compatible_bind_flags(sbuf->bind_flags, tobind_flags))
1012 sbuf->bind_flags = sbuf->bind_flags | tobind_flags;
1013 else
1014 sbuf->bind_flags = tobind_flags;
1015
1016 assert((sbuf->bind_flags & tobind_flags) == tobind_flags);
1017
1018 /* This call will set sbuf->handle */
1019 if (svga_have_gb_objects(svga)) {
1020 ret = svga_buffer_update_hw(svga, sbuf, sbuf->bind_flags);
1021 } else {
1022 ret = svga_buffer_create_host_surface(ss, sbuf, sbuf->bind_flags);
1023 }
1024 if (ret != PIPE_OK)
1025 return NULL;
1026 }
1027
1028 assert(sbuf->handle);
1029
1030 if (sbuf->map.num_ranges) {
1031 if (!sbuf->dma.pending) {
1032 /* No pending DMA/update commands yet. */
1033
1034 /* Migrate the data from swbuf -> hwbuf if necessary */
1035 ret = svga_buffer_update_hw(svga, sbuf, sbuf->bind_flags);
1036 if (ret == PIPE_OK) {
1037 /* Emit DMA or UpdateGBImage commands */
1038 ret = svga_buffer_upload_command(svga, sbuf);
1039 if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
1040 svga_context_flush(svga, NULL);
1041 ret = svga_buffer_upload_command(svga, sbuf);
1042 assert(ret == PIPE_OK);
1043 }
1044 if (ret == PIPE_OK) {
1045 sbuf->dma.pending = TRUE;
1046 assert(!sbuf->head.prev && !sbuf->head.next);
1047 LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
1048 }
1049 }
1050 else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
1051 /*
1052 * The buffer is too big to fit in the GMR aperture, so break it in
1053 * smaller pieces.
1054 */
1055 ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
1056 }
1057
1058 if (ret != PIPE_OK) {
1059 /*
1060 * Something unexpected happened above. There is very little that
1061 * we can do other than proceeding while ignoring the dirty ranges.
1062 */
1063 assert(0);
1064 sbuf->map.num_ranges = 0;
1065 }
1066 }
1067 else {
1068 /*
1069 * There a pending dma already. Make sure it is from this context.
1070 */
1071 assert(sbuf->dma.svga == svga);
1072 }
1073 }
1074
1075 assert(sbuf->map.num_ranges == 0 || sbuf->dma.pending);
1076
1077 return sbuf->handle;
1078 }
1079
1080
1081 void
1082 svga_context_flush_buffers(struct svga_context *svga)
1083 {
1084 struct list_head *curr, *next;
1085
1086 SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERSFLUSH);
1087
1088 curr = svga->dirty_buffers.next;
1089 next = curr->next;
1090 while (curr != &svga->dirty_buffers) {
1091 struct svga_buffer *sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
1092
1093 assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
1094 assert(sbuf->dma.pending);
1095
1096 svga_buffer_upload_flush(svga, sbuf);
1097
1098 curr = next;
1099 next = curr->next;
1100 }
1101
1102 SVGA_STATS_TIME_POP(svga_sws(svga));
1103 }