src/gallium/drivers/svga/svga_resource_buffer_upload.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26
  27 #include "os/os_thread.h"
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_math.h"
  32 #include "util/u_memory.h"
  33
  34 #include "svga_cmd.h"
  35 #include "svga_context.h"
  36 #include "svga_debug.h"
  37 #include "svga_resource_buffer.h"
  38 #include "svga_resource_buffer_upload.h"
  39 #include "svga_screen.h"
  40 #include "svga_winsys.h"
  41
  42 /**
  43  * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
  44  *
  45  */
  46 struct svga_3d_update_gb_image {
  47    SVGA3dCmdHeader header;
  48    SVGA3dCmdUpdateGBImage body;
  49 };
  50
  51 struct svga_3d_invalidate_gb_image {
  52    SVGA3dCmdHeader header;
  53    SVGA3dCmdInvalidateGBImage body;
  54 };
  55
  56
  57 /**
  58  * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
  59  *
  60  * It will flush and retry in case the first attempt to create a DMA buffer
  61  * fails, so it should not be called from any function involved in flushing
  62  * to avoid recursion.
  63  */
  64 struct svga_winsys_buffer *
  65 svga_winsys_buffer_create( struct svga_context *svga,
  66                            unsigned alignment,
  67                            unsigned usage,
  68                            unsigned size )
  69 {
  70    struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
  71    struct svga_winsys_screen *sws = svgascreen->sws;
  72    struct svga_winsys_buffer *buf;
  73
  74    /* Just try */
  75    buf = sws->buffer_create(sws, alignment, usage, size);
  76    if (!buf) {
  77       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
  78                size);
  79
  80       /* Try flushing all pending DMAs */
  81       svga_context_flush(svga, NULL);
  82       buf = sws->buffer_create(sws, alignment, usage, size);
  83    }
  84
  85    return buf;
  86 }
  87
  88
  89 /**
  90  * Destroy HW storage if separate from the host surface.
  91  * In the GB case, the HW storage is associated with the host surface
  92  * and is therefore a No-op.
  93  */
  94 void
  95 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
  96 {
  97    struct svga_winsys_screen *sws = ss->sws;
  98
  99    assert(sbuf->map.count == 0);
 100    assert(sbuf->hwbuf);
 101    if (sbuf->hwbuf) {
 102       sws->buffer_destroy(sws, sbuf->hwbuf);
 103       sbuf->hwbuf = NULL;
 104    }
 105 }
 106
 107
 108
 109 /**
 110  * Allocate DMA'ble or Updatable storage for the buffer.
 111  *
 112  * Called before mapping a buffer.
 113  */
 114 enum pipe_error
 115 svga_buffer_create_hw_storage(struct svga_screen *ss,
 116                               struct svga_buffer *sbuf,
 117                               unsigned bind_flags)
 118 {
 119    assert(!sbuf->user);
 120
 121    if (ss->sws->have_gb_objects) {
 122       assert(sbuf->handle || !sbuf->dma.pending);
 123       return svga_buffer_create_host_surface(ss, sbuf, bind_flags);
 124    }
 125    if (!sbuf->hwbuf) {
 126       struct svga_winsys_screen *sws = ss->sws;
 127       unsigned alignment = 16;
 128       unsigned usage = 0;
 129       unsigned size = sbuf->b.b.width0;
 130
 131       sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
 132       if (!sbuf->hwbuf)
 133          return PIPE_ERROR_OUT_OF_MEMORY;
 134
 135       assert(!sbuf->dma.pending);
 136    }
 137
 138    return PIPE_OK;
 139 }
 140
 141
 142 /**
 143  * Allocate graphics memory for vertex/index/constant/etc buffer (not
 144  * textures).
 145  */
 146 enum pipe_error
 147 svga_buffer_create_host_surface(struct svga_screen *ss,
 148                                 struct svga_buffer *sbuf,
 149                                 unsigned bind_flags)
 150 {
 151    enum pipe_error ret = PIPE_OK;
 152
 153    assert(!sbuf->user);
 154
 155    if (!sbuf->handle) {
 156       boolean validated;
 157
 158       sbuf->key.flags = 0;
 159
 160       sbuf->key.format = SVGA3D_BUFFER;
 161       if (bind_flags & PIPE_BIND_VERTEX_BUFFER) {
 162          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
 163          sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
 164       }
 165       if (bind_flags & PIPE_BIND_INDEX_BUFFER) {
 166          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
 167          sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
 168       }
 169       if (bind_flags & PIPE_BIND_CONSTANT_BUFFER)
 170          sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
 171
 172       if (bind_flags & PIPE_BIND_STREAM_OUTPUT)
 173          sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
 174
 175       if (bind_flags & PIPE_BIND_SAMPLER_VIEW)
 176          sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 177
 178       if (!bind_flags && sbuf->b.b.usage == PIPE_USAGE_STAGING) {
 179          /* This surface is to be used with the
 180           * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other
 181           * bind flags are allowed to be set for this surface.
 182           */
 183          sbuf->key.flags = SVGA3D_SURFACE_TRANSFER_FROM_BUFFER;
 184       }
 185
 186       sbuf->key.size.width = sbuf->b.b.width0;
 187       sbuf->key.size.height = 1;
 188       sbuf->key.size.depth = 1;
 189
 190       sbuf->key.numFaces = 1;
 191       sbuf->key.numMipLevels = 1;
 192       sbuf->key.cachable = 1;
 193       sbuf->key.arraySize = 1;
 194       sbuf->key.sampleCount = 0;
 195
 196       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n",
 197                sbuf->b.b.width0);
 198
 199       sbuf->handle = svga_screen_surface_create(ss, bind_flags,
 200                                                 sbuf->b.b.usage,
 201                                                 &validated, &sbuf->key);
 202       if (!sbuf->handle)
 203          return PIPE_ERROR_OUT_OF_MEMORY;
 204
 205       /* Always set the discard flag on the first time the buffer is written
 206        * as svga_screen_surface_create might have passed a recycled host
 207        * buffer.
 208        */
 209       sbuf->dma.flags.discard = TRUE;
 210
 211       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n",
 212                sbuf->handle, sbuf->b.b.width0);
 213
 214       /* Add the new surface to the buffer surface list */
 215       ret = svga_buffer_add_host_surface(sbuf, sbuf->handle, &sbuf->key,
 216                                          bind_flags);
 217    }
 218
 219    return ret;
 220 }
 221
 222
 223 /**
 224  * Recreates a host surface with the new bind flags.
 225  */
 226 enum pipe_error
 227 svga_buffer_recreate_host_surface(struct svga_context *svga,
 228                                   struct svga_buffer *sbuf,
 229                                   unsigned bind_flags)
 230 {
 231    enum pipe_error ret = PIPE_OK;
 232    struct svga_winsys_surface *old_handle = sbuf->handle;
 233
 234    assert(sbuf->bind_flags != bind_flags);
 235    assert(old_handle);
 236
 237    sbuf->handle = NULL;
 238
 239    /* Create a new resource with the requested bind_flags */
 240    ret = svga_buffer_create_host_surface(svga_screen(svga->pipe.screen),
 241                                          sbuf, bind_flags);
 242    if (ret == PIPE_OK) {
 243       /* Copy the surface data */
 244       assert(sbuf->handle);
 245       ret = SVGA3D_vgpu10_BufferCopy(svga->swc, old_handle, sbuf->handle,
 246                                      0, 0, sbuf->b.b.width0);
 247       if (ret != PIPE_OK) {
 248          svga_context_flush(svga, NULL);
 249          ret = SVGA3D_vgpu10_BufferCopy(svga->swc, old_handle, sbuf->handle,
 250                                         0, 0, sbuf->b.b.width0);
 251          assert(ret == PIPE_OK);
 252       }
 253    }
 254
 255    /* Set the new bind flags for this buffer resource */
 256    sbuf->bind_flags = bind_flags;
 257
 258    return ret;
 259 }
 260
 261
 262 /**
 263  * Returns TRUE if the surface bind flags is compatible with the new bind flags.
 264  */
 265 static boolean
 266 compatible_bind_flags(unsigned bind_flags,
 267                       unsigned tobind_flags)
 268 {
 269    if ((bind_flags & tobind_flags) == tobind_flags)
 270       return TRUE;
 271    else if ((bind_flags|tobind_flags) & PIPE_BIND_CONSTANT_BUFFER)
 272       return FALSE;
 273    else
 274       return TRUE;
 275 }
 276
 277
 278 /**
 279  * Returns a buffer surface from the surface list
 280  * that has the requested bind flags or its existing bind flags
 281  * can be promoted to include the new bind flags.
 282  */
 283 static struct svga_buffer_surface *
 284 svga_buffer_get_host_surface(struct svga_buffer *sbuf,
 285                              unsigned bind_flags)
 286 {
 287    struct svga_buffer_surface *bufsurf;
 288
 289    LIST_FOR_EACH_ENTRY(bufsurf, &sbuf->surfaces, list) {
 290       if (compatible_bind_flags(bufsurf->bind_flags, bind_flags))
 291          return bufsurf;
 292    }
 293    return NULL;
 294 }
 295
 296
 297 /**
 298  * Adds the host surface to the buffer surface list.
 299  */
 300 enum pipe_error
 301 svga_buffer_add_host_surface(struct svga_buffer *sbuf,
 302                              struct svga_winsys_surface *handle,
 303                              struct svga_host_surface_cache_key *key,
 304                              unsigned bind_flags)
 305 {
 306    struct svga_buffer_surface *bufsurf;
 307
 308    bufsurf = CALLOC_STRUCT(svga_buffer_surface);
 309    if (!bufsurf)
 310       return PIPE_ERROR_OUT_OF_MEMORY;
 311
 312    bufsurf->bind_flags = bind_flags;
 313    bufsurf->handle = handle;
 314    bufsurf->key = *key;
 315
 316    /* add the surface to the surface list */
 317    LIST_ADD(&bufsurf->list, &sbuf->surfaces);
 318
 319    /* Set the new bind flags for this buffer resource */
 320    sbuf->bind_flags = bind_flags;
 321
 322    return PIPE_OK;
 323 }
 324
 325
 326 /**
 327  * Start using the specified surface for this buffer resource.
 328  */
 329 void
 330 svga_buffer_bind_host_surface(struct svga_context *svga,
 331                               struct svga_buffer *sbuf,
 332                               struct svga_buffer_surface *bufsurf)
 333 {
 334    enum pipe_error ret;
 335
 336    /* Update the to-bind surface */
 337    assert(bufsurf->handle);
 338    assert(sbuf->handle);
 339
 340    /* If we are switching from stream output to other buffer,
 341     * make sure to copy the buffer content.
 342     */
 343    if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT) {
 344       ret = SVGA3D_vgpu10_BufferCopy(svga->swc, sbuf->handle, bufsurf->handle,
 345                                      0, 0, sbuf->b.b.width0);
 346       if (ret != PIPE_OK) {
 347          svga_context_flush(svga, NULL);
 348          ret = SVGA3D_vgpu10_BufferCopy(svga->swc, sbuf->handle, bufsurf->handle,
 349                                         0, 0, sbuf->b.b.width0);
 350          assert(ret == PIPE_OK);
 351       }
 352    }
 353
 354    /* Set this surface as the current one */
 355    sbuf->handle = bufsurf->handle;
 356    sbuf->key = bufsurf->key;
 357    sbuf->bind_flags = bufsurf->bind_flags;
 358 }
 359
 360
 361 /**
 362  * Prepare a host surface that can be used as indicated in the
 363  * tobind_flags. If the existing host surface is not created
 364  * with the necessary binding flags and if the new bind flags can be
 365  * combined with the existing bind flags, then we will recreate a
 366  * new surface with the combined bind flags. Otherwise, we will create
 367  * a surface for that incompatible bind flags.
 368  * For example, if a stream output buffer is reused as a constant buffer,
 369  * since constant buffer surface cannot be bound as a stream output surface,
 370  * two surfaces will be created, one for stream output,
 371  * and another one for constant buffer.
 372  */
 373 enum pipe_error
 374 svga_buffer_validate_host_surface(struct svga_context *svga,
 375                                   struct svga_buffer *sbuf,
 376                                   unsigned tobind_flags)
 377 {
 378    struct svga_buffer_surface *bufsurf;
 379    enum pipe_error ret = PIPE_OK;
 380
 381    /* Flush any pending upload first */
 382    svga_buffer_upload_flush(svga, sbuf);
 383
 384    /* First check from the cached buffer surface list to see if there is
 385     * already a buffer surface that has the requested bind flags, or
 386     * surface with compatible bind flags that can be promoted.
 387     */
 388    bufsurf = svga_buffer_get_host_surface(sbuf, tobind_flags);
 389
 390    if (bufsurf) {
 391       if ((bufsurf->bind_flags & tobind_flags) == tobind_flags) {
 392          /* there is a surface with the requested bind flags */
 393          svga_buffer_bind_host_surface(svga, sbuf, bufsurf);
 394       } else {
 395
 396          /* Recreate a host surface with the combined bind flags */
 397          ret = svga_buffer_recreate_host_surface(svga, sbuf,
 398                                                  bufsurf->bind_flags |
 399                                                  tobind_flags);
 400
 401          /* Destroy the old surface */
 402          svga_screen_surface_destroy(svga_screen(sbuf->b.b.screen),
 403                                      &bufsurf->key, &bufsurf->handle);
 404
 405          LIST_DEL(&bufsurf->list);
 406          FREE(bufsurf);
 407       }
 408    } else {
 409       /* Need to create a new surface if the bind flags are incompatible,
 410        * such as constant buffer surface & stream output surface.
 411        */
 412       ret = svga_buffer_recreate_host_surface(svga, sbuf,
 413                                               tobind_flags);
 414    }
 415    return ret;
 416 }
 417
 418
 419 void
 420 svga_buffer_destroy_host_surface(struct svga_screen *ss,
 421                                  struct svga_buffer *sbuf)
 422 {
 423    struct svga_buffer_surface *bufsurf, *next;
 424
 425    LIST_FOR_EACH_ENTRY_SAFE(bufsurf, next, &sbuf->surfaces, list) {
 426       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n",
 427                bufsurf->handle, sbuf->b.b.width0);
 428       svga_screen_surface_destroy(ss, &bufsurf->key, &bufsurf->handle);
 429       FREE(bufsurf);
 430    }
 431 }
 432
 433
 434 /**
 435  * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
 436  * command buffer, equal to the current number of mapped ranges.
 437  * The UPDATE_GB_IMAGE commands will be patched with the
 438  * actual ranges just before flush.
 439  */
 440 static enum pipe_error
 441 svga_buffer_upload_gb_command(struct svga_context *svga,
 442                               struct svga_buffer *sbuf)
 443 {
 444    struct svga_winsys_context *swc = svga->swc;
 445    SVGA3dCmdUpdateGBImage *update_cmd;
 446    struct svga_3d_update_gb_image *whole_update_cmd = NULL;
 447    const uint32 numBoxes = sbuf->map.num_ranges;
 448    struct pipe_resource *dummy;
 449    unsigned i;
 450
 451    if (swc->force_coherent)
 452       return PIPE_OK;
 453
 454    assert(svga_have_gb_objects(svga));
 455    assert(numBoxes);
 456    assert(sbuf->dma.updates == NULL);
 457
 458    if (sbuf->dma.flags.discard) {
 459       struct svga_3d_invalidate_gb_image *cicmd = NULL;
 460       SVGA3dCmdInvalidateGBImage *invalidate_cmd;
 461       const unsigned total_commands_size =
 462          sizeof(*invalidate_cmd) + numBoxes * sizeof(*whole_update_cmd);
 463
 464       /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
 465        * 'numBoxes' UPDATE_GB_IMAGE commands.  Allocate all at once rather
 466        * than with separate commands because we need to properly deal with
 467        * filling the command buffer.
 468        */
 469       invalidate_cmd = SVGA3D_FIFOReserve(swc,
 470                                           SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
 471                                           total_commands_size, 1 + numBoxes);
 472       if (!invalidate_cmd)
 473          return PIPE_ERROR_OUT_OF_MEMORY;
 474
 475       cicmd = container_of(invalidate_cmd, cicmd, body);
 476       cicmd->header.size = sizeof(*invalidate_cmd);
 477       swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL,
 478                               sbuf->handle,
 479                               (SVGA_RELOC_WRITE |
 480                                SVGA_RELOC_INTERNAL |
 481                                SVGA_RELOC_DMA));
 482       invalidate_cmd->image.face = 0;
 483       invalidate_cmd->image.mipmap = 0;
 484
 485       /* The whole_update_command is a SVGA3dCmdHeader plus the
 486        * SVGA3dCmdUpdateGBImage command.
 487        */
 488       whole_update_cmd = (struct svga_3d_update_gb_image *) &invalidate_cmd[1];
 489       /* initialize the first UPDATE_GB_IMAGE command */
 490       whole_update_cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
 491       update_cmd = &whole_update_cmd->body;
 492
 493    } else {
 494       /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
 495       const unsigned total_commands_size =
 496          sizeof(*update_cmd) + (numBoxes - 1) * sizeof(*whole_update_cmd);
 497
 498       update_cmd = SVGA3D_FIFOReserve(swc,
 499                                       SVGA_3D_CMD_UPDATE_GB_IMAGE,
 500                                       total_commands_size, numBoxes);
 501       if (!update_cmd)
 502          return PIPE_ERROR_OUT_OF_MEMORY;
 503
 504       /* The whole_update_command is a SVGA3dCmdHeader plus the
 505        * SVGA3dCmdUpdateGBImage command.
 506        */
 507       whole_update_cmd = container_of(update_cmd, whole_update_cmd, body);
 508    }
 509
 510    /* Init the first UPDATE_GB_IMAGE command */
 511    whole_update_cmd->header.size = sizeof(*update_cmd);
 512    swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
 513                            SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 514    update_cmd->image.face = 0;
 515    update_cmd->image.mipmap = 0;
 516
 517    /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
 518     * fill in the box info below.
 519     */
 520    sbuf->dma.updates = whole_update_cmd;
 521
 522    /*
 523     * Copy the face, mipmap, etc. info to all subsequent commands.
 524     * Also do the surface relocation for each subsequent command.
 525     */
 526    for (i = 1; i < numBoxes; ++i) {
 527       whole_update_cmd++;
 528       memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd));
 529
 530       swc->surface_relocation(swc, &whole_update_cmd->body.image.sid, NULL,
 531                               sbuf->handle,
 532                               SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 533    }
 534
 535    /* Increment reference count */
 536    sbuf->dma.svga = svga;
 537    dummy = NULL;
 538    pipe_resource_reference(&dummy, &sbuf->b.b);
 539    SVGA_FIFOCommitAll(swc);
 540
 541    swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
 542    sbuf->dma.flags.discard = FALSE;
 543
 544    svga->hud.num_resource_updates++;
 545
 546    return PIPE_OK;
 547 }
 548
 549
 550 /**
 551  * Issue DMA commands to transfer guest memory to the host.
 552  * Note that the memory segments (offset, size) will be patched in
 553  * later in the svga_buffer_upload_flush() function.
 554  */
 555 static enum pipe_error
 556 svga_buffer_upload_hb_command(struct svga_context *svga,
 557                               struct svga_buffer *sbuf)
 558 {
 559    struct svga_winsys_context *swc = svga->swc;
 560    struct svga_winsys_buffer *guest = sbuf->hwbuf;
 561    struct svga_winsys_surface *host = sbuf->handle;
 562    const SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 563    SVGA3dCmdSurfaceDMA *cmd;
 564    const uint32 numBoxes = sbuf->map.num_ranges;
 565    SVGA3dCopyBox *boxes;
 566    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 567    unsigned region_flags;
 568    unsigned surface_flags;
 569    struct pipe_resource *dummy;
 570
 571    assert(!svga_have_gb_objects(svga));
 572
 573    if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 574       region_flags = SVGA_RELOC_READ;
 575       surface_flags = SVGA_RELOC_WRITE;
 576    }
 577    else if (transfer == SVGA3D_READ_HOST_VRAM) {
 578       region_flags = SVGA_RELOC_WRITE;
 579       surface_flags = SVGA_RELOC_READ;
 580    }
 581    else {
 582       assert(0);
 583       return PIPE_ERROR_BAD_INPUT;
 584    }
 585
 586    assert(numBoxes);
 587
 588    cmd = SVGA3D_FIFOReserve(swc,
 589                             SVGA_3D_CMD_SURFACE_DMA,
 590                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 591                             2);
 592    if (!cmd)
 593       return PIPE_ERROR_OUT_OF_MEMORY;
 594
 595    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 596    cmd->guest.pitch = 0;
 597
 598    swc->surface_relocation(swc, &cmd->host.sid, NULL, host, surface_flags);
 599    cmd->host.face = 0;
 600    cmd->host.mipmap = 0;
 601
 602    cmd->transfer = transfer;
 603
 604    sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
 605    sbuf->dma.svga = svga;
 606
 607    /* Increment reference count */
 608    dummy = NULL;
 609    pipe_resource_reference(&dummy, &sbuf->b.b);
 610
 611    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 612    pSuffix->suffixSize = sizeof *pSuffix;
 613    pSuffix->maximumOffset = sbuf->b.b.width0;
 614    pSuffix->flags = sbuf->dma.flags;
 615
 616    SVGA_FIFOCommitAll(swc);
 617
 618    swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
 619    sbuf->dma.flags.discard = FALSE;
 620
 621    svga->hud.num_buffer_uploads++;
 622
 623    return PIPE_OK;
 624 }
 625
 626
 627 /**
 628  * Issue commands to transfer guest memory to the host.
 629  */
 630 static enum pipe_error
 631 svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf)
 632 {
 633    if (svga_have_gb_objects(svga)) {
 634       return svga_buffer_upload_gb_command(svga, sbuf);
 635    } else {
 636       return svga_buffer_upload_hb_command(svga, sbuf);
 637    }
 638 }
 639
 640
 641 /**
 642  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 643  * with the final ranges.
 644  */
 645 void
 646 svga_buffer_upload_flush(struct svga_context *svga, struct svga_buffer *sbuf)
 647 {
 648    unsigned i;
 649    struct pipe_resource *dummy;
 650
 651    if (!sbuf->dma.pending || svga->swc->force_coherent) {
 652       //debug_printf("no dma pending on buffer\n");
 653       return;
 654    }
 655
 656    assert(sbuf->handle);
 657    assert(sbuf->map.num_ranges);
 658    assert(sbuf->dma.svga == svga);
 659
 660    /*
 661     * Patch the DMA/update command with the final copy box.
 662     */
 663    if (svga_have_gb_objects(svga)) {
 664       struct svga_3d_update_gb_image *update = sbuf->dma.updates;
 665
 666       assert(update);
 667
 668       for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
 669          SVGA3dBox *box = &update->body.box;
 670
 671          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 672                   sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 673
 674          box->x = sbuf->map.ranges[i].start;
 675          box->y = 0;
 676          box->z = 0;
 677          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 678          box->h = 1;
 679          box->d = 1;
 680
 681          assert(box->x <= sbuf->b.b.width0);
 682          assert(box->x + box->w <= sbuf->b.b.width0);
 683
 684          svga->hud.num_bytes_uploaded += box->w;
 685          svga->hud.num_buffer_uploads++;
 686       }
 687    }
 688    else {
 689       assert(sbuf->hwbuf);
 690       assert(sbuf->dma.boxes);
 691       SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 692
 693       for (i = 0; i < sbuf->map.num_ranges; ++i) {
 694          SVGA3dCopyBox *box = sbuf->dma.boxes + i;
 695
 696          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 697                sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 698
 699          box->x = sbuf->map.ranges[i].start;
 700          box->y = 0;
 701          box->z = 0;
 702          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 703          box->h = 1;
 704          box->d = 1;
 705          box->srcx = sbuf->map.ranges[i].start;
 706          box->srcy = 0;
 707          box->srcz = 0;
 708
 709          assert(box->x <= sbuf->b.b.width0);
 710          assert(box->x + box->w <= sbuf->b.b.width0);
 711
 712          svga->hud.num_bytes_uploaded += box->w;
 713          svga->hud.num_buffer_uploads++;
 714       }
 715    }
 716
 717    /* Reset sbuf for next use/upload */
 718
 719    sbuf->map.num_ranges = 0;
 720
 721    assert(sbuf->head.prev && sbuf->head.next);
 722    LIST_DEL(&sbuf->head);  /* remove from svga->dirty_buffers list */
 723 #ifdef DEBUG
 724    sbuf->head.next = sbuf->head.prev = NULL;
 725 #endif
 726    sbuf->dma.pending = FALSE;
 727    sbuf->dma.flags.discard = FALSE;
 728    sbuf->dma.flags.unsynchronized = FALSE;
 729
 730    sbuf->dma.svga = NULL;
 731    sbuf->dma.boxes = NULL;
 732    sbuf->dma.updates = NULL;
 733
 734    /* Decrement reference count (and potentially destroy) */
 735    dummy = &sbuf->b.b;
 736    pipe_resource_reference(&dummy, NULL);
 737 }
 738
 739
 740 /**
 741  * Note a dirty range.
 742  *
 743  * This function only notes the range down. It doesn't actually emit a DMA
 744  * upload command. That only happens when a context tries to refer to this
 745  * buffer, and the DMA upload command is added to that context's command
 746  * buffer.
 747  *
 748  * We try to lump as many contiguous DMA transfers together as possible.
 749  */
 750 void
 751 svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end)
 752 {
 753    unsigned i;
 754    unsigned nearest_range;
 755    unsigned nearest_dist;
 756
 757    assert(end > start);
 758
 759    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 760       nearest_range = sbuf->map.num_ranges;
 761       nearest_dist = ~0;
 762    } else {
 763       nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
 764       nearest_dist = 0;
 765    }
 766
 767    /*
 768     * Try to grow one of the ranges.
 769     */
 770    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 771       const int left_dist = start - sbuf->map.ranges[i].end;
 772       const int right_dist = sbuf->map.ranges[i].start - end;
 773       const int dist = MAX2(left_dist, right_dist);
 774
 775       if (dist <= 0) {
 776          /*
 777           * Ranges are contiguous or overlapping -- extend this one and return.
 778           *
 779           * Note that it is not this function's task to prevent overlapping
 780           * ranges, as the GMR was already given so it is too late to do
 781           * anything.  If the ranges overlap here it must surely be because
 782           * PIPE_TRANSFER_UNSYNCHRONIZED was set.
 783           */
 784          sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
 785          sbuf->map.ranges[i].end   = MAX2(sbuf->map.ranges[i].end,   end);
 786          return;
 787       }
 788       else {
 789          /*
 790           * Discontiguous ranges -- keep track of the nearest range.
 791           */
 792          if (dist < nearest_dist) {
 793             nearest_range = i;
 794             nearest_dist = dist;
 795          }
 796       }
 797    }
 798
 799    /*
 800     * We cannot add a new range to an existing DMA command, so patch-up the
 801     * pending DMA upload and start clean.
 802     */
 803
 804    svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
 805
 806    assert(!sbuf->dma.pending);
 807    assert(!sbuf->dma.svga);
 808    assert(!sbuf->dma.boxes);
 809
 810    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 811       /*
 812        * Add a new range.
 813        */
 814
 815       sbuf->map.ranges[sbuf->map.num_ranges].start = start;
 816       sbuf->map.ranges[sbuf->map.num_ranges].end = end;
 817       ++sbuf->map.num_ranges;
 818    } else {
 819       /*
 820        * Everything else failed, so just extend the nearest range.
 821        *
 822        * It is OK to do this because we always keep a local copy of the
 823        * host buffer data, for SW TNL, and the host never modifies the buffer.
 824        */
 825
 826       assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
 827       assert(nearest_range < sbuf->map.num_ranges);
 828       sbuf->map.ranges[nearest_range].start =
 829          MIN2(sbuf->map.ranges[nearest_range].start, start);
 830       sbuf->map.ranges[nearest_range].end =
 831          MAX2(sbuf->map.ranges[nearest_range].end, end);
 832    }
 833 }
 834
 835
 836
 837 /**
 838  * Copy the contents of the malloc buffer to a hardware buffer.
 839  */
 840 static enum pipe_error
 841 svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf,
 842                       unsigned bind_flags)
 843 {
 844    assert(!sbuf->user);
 845    if (!svga_buffer_has_hw_storage(sbuf)) {
 846       struct svga_screen *ss = svga_screen(sbuf->b.b.screen);
 847       enum pipe_error ret;
 848       boolean retry;
 849       void *map;
 850       unsigned i;
 851
 852       assert(sbuf->swbuf);
 853       if (!sbuf->swbuf)
 854          return PIPE_ERROR;
 855
 856       ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen), sbuf,
 857                                           bind_flags);
 858       if (ret != PIPE_OK)
 859          return ret;
 860
 861       mtx_lock(&ss->swc_mutex);
 862       map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
 863       assert(map);
 864       assert(!retry);
 865       if (!map) {
 866          mtx_unlock(&ss->swc_mutex);
 867          svga_buffer_destroy_hw_storage(ss, sbuf);
 868          return PIPE_ERROR;
 869       }
 870
 871       /* Copy data from malloc'd swbuf to the new hardware buffer */
 872       for (i = 0; i < sbuf->map.num_ranges; i++) {
 873          unsigned start = sbuf->map.ranges[i].start;
 874          unsigned len = sbuf->map.ranges[i].end - start;
 875          memcpy((uint8_t *) map + start, (uint8_t *) sbuf->swbuf + start, len);
 876       }
 877
 878       if (svga->swc->force_coherent)
 879          sbuf->map.num_ranges = 0;
 880
 881       svga_buffer_hw_storage_unmap(svga, sbuf);
 882
 883       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 884       assert(sbuf->map.count == 0);
 885       if (sbuf->map.count == 0) {
 886          if (sbuf->user)
 887             sbuf->user = FALSE;
 888          else
 889             align_free(sbuf->swbuf);
 890          sbuf->swbuf = NULL;
 891       }
 892
 893       mtx_unlock(&ss->swc_mutex);
 894    }
 895
 896    return PIPE_OK;
 897 }
 898
 899
 900 /**
 901  * Upload the buffer to the host in a piecewise fashion.
 902  *
 903  * Used when the buffer is too big to fit in the GMR aperture.
 904  * This function should never get called in the guest-backed case
 905  * since we always have a full-sized hardware storage backing the
 906  * host surface.
 907  */
 908 static enum pipe_error
 909 svga_buffer_upload_piecewise(struct svga_screen *ss,
 910                              struct svga_context *svga,
 911                              struct svga_buffer *sbuf)
 912 {
 913    struct svga_winsys_screen *sws = ss->sws;
 914    const unsigned alignment = sizeof(void *);
 915    const unsigned usage = 0;
 916    unsigned i;
 917
 918    assert(sbuf->map.num_ranges);
 919    assert(!sbuf->dma.pending);
 920    assert(!svga_have_gb_objects(svga));
 921
 922    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 923
 924    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 925       const struct svga_buffer_range *range = &sbuf->map.ranges[i];
 926       unsigned offset = range->start;
 927       unsigned size = range->end - range->start;
 928
 929       while (offset < range->end) {
 930          struct svga_winsys_buffer *hwbuf;
 931          uint8_t *map;
 932          enum pipe_error ret;
 933
 934          if (offset + size > range->end)
 935             size = range->end - offset;
 936
 937          hwbuf = sws->buffer_create(sws, alignment, usage, size);
 938          while (!hwbuf) {
 939             size /= 2;
 940             if (!size)
 941                return PIPE_ERROR_OUT_OF_MEMORY;
 942             hwbuf = sws->buffer_create(sws, alignment, usage, size);
 943          }
 944
 945          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 946                   offset, offset + size);
 947
 948          map = sws->buffer_map(sws, hwbuf,
 949                                PIPE_TRANSFER_WRITE |
 950                                PIPE_TRANSFER_DISCARD_RANGE);
 951          assert(map);
 952          if (map) {
 953             memcpy(map, (const char *) sbuf->swbuf + offset, size);
 954             sws->buffer_unmap(sws, hwbuf);
 955          }
 956
 957          ret = SVGA3D_BufferDMA(svga->swc,
 958                                 hwbuf, sbuf->handle,
 959                                 SVGA3D_WRITE_HOST_VRAM,
 960                                 size, 0, offset, sbuf->dma.flags);
 961          if (ret != PIPE_OK) {
 962             svga_context_flush(svga, NULL);
 963             ret =  SVGA3D_BufferDMA(svga->swc,
 964                                     hwbuf, sbuf->handle,
 965                                     SVGA3D_WRITE_HOST_VRAM,
 966                                     size, 0, offset, sbuf->dma.flags);
 967             assert(ret == PIPE_OK);
 968          }
 969
 970          sbuf->dma.flags.discard = FALSE;
 971
 972          sws->buffer_destroy(sws, hwbuf);
 973
 974          offset += size;
 975       }
 976    }
 977
 978    sbuf->map.num_ranges = 0;
 979
 980    return PIPE_OK;
 981 }
 982
 983
 984 /**
 985  * Get (or create/upload) the winsys surface handle so that we can
 986  * refer to this buffer in fifo commands.
 987  * This function will create the host surface, and in the GB case also the
 988  * hardware storage. In the non-GB case, the hardware storage will be created
 989  * if there are mapped ranges and the data is currently in a malloc'ed buffer.
 990  */
 991 struct svga_winsys_surface *
 992 svga_buffer_handle(struct svga_context *svga, struct pipe_resource *buf,
 993                    unsigned tobind_flags)
 994 {
 995    struct pipe_screen *screen = svga->pipe.screen;
 996    struct svga_screen *ss = svga_screen(screen);
 997    struct svga_buffer *sbuf;
 998    enum pipe_error ret;
 999
1000    if (!buf)
1001       return NULL;
1002
1003    sbuf = svga_buffer(buf);
1004
1005    assert(!sbuf->user);
1006
1007    if (sbuf->handle) {
1008       if ((sbuf->bind_flags & tobind_flags) != tobind_flags) {
1009          /* If the allocated resource's bind flags do not include the
1010           * requested bind flags, validate the host surface.
1011           */
1012          ret = svga_buffer_validate_host_surface(svga, sbuf, tobind_flags);
1013          if (ret != PIPE_OK)
1014             return NULL;
1015       }
1016    } else {
1017       /* If there is no resource handle yet, then combine the buffer bind
1018        * flags and the tobind_flags if they are compatible.
1019        * If not, just use the tobind_flags for creating the resource handle.
1020        */
1021       if (compatible_bind_flags(sbuf->bind_flags, tobind_flags))
1022          sbuf->bind_flags = sbuf->bind_flags | tobind_flags;
1023       else
1024          sbuf->bind_flags = tobind_flags;
1025
1026       assert((sbuf->bind_flags & tobind_flags) == tobind_flags);
1027
1028       /* This call will set sbuf->handle */
1029       if (svga_have_gb_objects(svga)) {
1030          ret = svga_buffer_update_hw(svga, sbuf, sbuf->bind_flags);
1031       } else {
1032          ret = svga_buffer_create_host_surface(ss, sbuf, sbuf->bind_flags);
1033       }
1034       if (ret != PIPE_OK)
1035          return NULL;
1036    }
1037
1038    assert(sbuf->handle);
1039    if (svga->swc->force_coherent)
1040       return sbuf->handle;
1041
1042    if (sbuf->map.num_ranges) {
1043       if (!sbuf->dma.pending) {
1044          /* No pending DMA/update commands yet. */
1045
1046          /* Migrate the data from swbuf -> hwbuf if necessary */
1047          ret = svga_buffer_update_hw(svga, sbuf, sbuf->bind_flags);
1048          if (ret == PIPE_OK) {
1049             /* Emit DMA or UpdateGBImage commands */
1050             ret = svga_buffer_upload_command(svga, sbuf);
1051             if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
1052                svga_context_flush(svga, NULL);
1053                ret = svga_buffer_upload_command(svga, sbuf);
1054                assert(ret == PIPE_OK);
1055             }
1056             if (ret == PIPE_OK) {
1057                sbuf->dma.pending = TRUE;
1058                assert(!sbuf->head.prev && !sbuf->head.next);
1059                LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
1060             }
1061          }
1062          else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
1063             /*
1064              * The buffer is too big to fit in the GMR aperture, so break it in
1065              * smaller pieces.
1066              */
1067             ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
1068          }
1069
1070          if (ret != PIPE_OK) {
1071             /*
1072              * Something unexpected happened above. There is very little that
1073              * we can do other than proceeding while ignoring the dirty ranges.
1074              */
1075             assert(0);
1076             sbuf->map.num_ranges = 0;
1077          }
1078       }
1079       else {
1080          /*
1081           * There a pending dma already. Make sure it is from this context.
1082           */
1083          assert(sbuf->dma.svga == svga);
1084       }
1085    }
1086
1087    assert(sbuf->map.num_ranges == 0 || sbuf->dma.pending);
1088
1089    return sbuf->handle;
1090 }
1091
1092
1093 void
1094 svga_context_flush_buffers(struct svga_context *svga)
1095 {
1096    struct list_head *curr, *next;
1097
1098    SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERSFLUSH);
1099
1100    curr = svga->dirty_buffers.next;
1101    next = curr->next;
1102    while (curr != &svga->dirty_buffers) {
1103       struct svga_buffer *sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
1104
1105       assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
1106       assert(sbuf->dma.pending);
1107
1108       svga_buffer_upload_flush(svga, sbuf);
1109
1110       curr = next;
1111       next = curr->next;
1112    }
1113
1114    SVGA_STATS_TIME_POP(svga_sws(svga));
1115 }