src/gallium/drivers/svga/svga_resource_buffer_upload.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26
  27 #include "os/os_thread.h"
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_math.h"
  32 #include "util/u_memory.h"
  33
  34 #include "svga_cmd.h"
  35 #include "svga_context.h"
  36 #include "svga_debug.h"
  37 #include "svga_resource_buffer.h"
  38 #include "svga_resource_buffer_upload.h"
  39 #include "svga_screen.h"
  40 #include "svga_winsys.h"
  41
  42 /**
  43  * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
  44  *
  45  */
  46 struct svga_3d_update_gb_image {
  47    SVGA3dCmdHeader header;
  48    SVGA3dCmdUpdateGBImage body;
  49 };
  50
  51 struct svga_3d_invalidate_gb_image {
  52    SVGA3dCmdHeader header;
  53    SVGA3dCmdInvalidateGBImage body;
  54 };
  55
  56
  57 /**
  58  * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
  59  *
  60  * It will flush and retry in case the first attempt to create a DMA buffer
  61  * fails, so it should not be called from any function involved in flushing
  62  * to avoid recursion.
  63  */
  64 struct svga_winsys_buffer *
  65 svga_winsys_buffer_create( struct svga_context *svga,
  66                            unsigned alignment,
  67                            unsigned usage,
  68                            unsigned size )
  69 {
  70    struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
  71    struct svga_winsys_screen *sws = svgascreen->sws;
  72    struct svga_winsys_buffer *buf;
  73
  74    /* Just try */
  75    buf = sws->buffer_create(sws, alignment, usage, size);
  76    if (!buf) {
  77       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
  78                size);
  79
  80       /* Try flushing all pending DMAs */
  81       svga_context_flush(svga, NULL);
  82       buf = sws->buffer_create(sws, alignment, usage, size);
  83    }
  84
  85    return buf;
  86 }
  87
  88
  89 /**
  90  * Destroy HW storage if separate from the host surface.
  91  * In the GB case, the HW storage is associated with the host surface
  92  * and is therefore a No-op.
  93  */
  94 void
  95 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
  96 {
  97    struct svga_winsys_screen *sws = ss->sws;
  98
  99    assert(!sbuf->map.count);
 100    assert(sbuf->hwbuf);
 101    if (sbuf->hwbuf) {
 102       sws->buffer_destroy(sws, sbuf->hwbuf);
 103       sbuf->hwbuf = NULL;
 104    }
 105 }
 106
 107
 108
 109 /**
 110  * Allocate DMA'ble or Updatable storage for the buffer.
 111  *
 112  * Called before mapping a buffer.
 113  */
 114 enum pipe_error
 115 svga_buffer_create_hw_storage(struct svga_screen *ss,
 116                               struct svga_buffer *sbuf)
 117 {
 118    assert(!sbuf->user);
 119
 120    if (ss->sws->have_gb_objects) {
 121       assert(sbuf->handle || !sbuf->dma.pending);
 122       return svga_buffer_create_host_surface(ss, sbuf);
 123    }
 124    if (!sbuf->hwbuf) {
 125       struct svga_winsys_screen *sws = ss->sws;
 126       unsigned alignment = 16;
 127       unsigned usage = 0;
 128       unsigned size = sbuf->b.b.width0;
 129
 130       sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
 131       if (!sbuf->hwbuf)
 132          return PIPE_ERROR_OUT_OF_MEMORY;
 133
 134       assert(!sbuf->dma.pending);
 135    }
 136
 137    return PIPE_OK;
 138 }
 139
 140
 141
 142 enum pipe_error
 143 svga_buffer_create_host_surface(struct svga_screen *ss,
 144                                 struct svga_buffer *sbuf)
 145 {
 146    assert(!sbuf->user);
 147
 148    if (!sbuf->handle) {
 149       sbuf->key.flags = 0;
 150
 151       sbuf->key.format = SVGA3D_BUFFER;
 152       if (sbuf->bind_flags & PIPE_BIND_VERTEX_BUFFER) {
 153          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
 154          sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
 155       }
 156       if (sbuf->bind_flags & PIPE_BIND_INDEX_BUFFER) {
 157          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
 158          sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
 159       }
 160       if (sbuf->bind_flags & PIPE_BIND_CONSTANT_BUFFER)
 161          sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
 162
 163       if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT)
 164          sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
 165
 166       if (sbuf->bind_flags & PIPE_BIND_SAMPLER_VIEW)
 167          sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 168
 169       sbuf->key.size.width = sbuf->b.b.width0;
 170       sbuf->key.size.height = 1;
 171       sbuf->key.size.depth = 1;
 172
 173       sbuf->key.numFaces = 1;
 174       sbuf->key.numMipLevels = 1;
 175       sbuf->key.cachable = 1;
 176       sbuf->key.arraySize = 1;
 177
 178       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
 179
 180       sbuf->handle = svga_screen_surface_create(ss, sbuf->b.b.bind,
 181                                                 sbuf->b.b.usage, &sbuf->key);
 182       if (!sbuf->handle)
 183          return PIPE_ERROR_OUT_OF_MEMORY;
 184
 185       /* Always set the discard flag on the first time the buffer is written
 186        * as svga_screen_surface_create might have passed a recycled host
 187        * buffer.
 188        */
 189       sbuf->dma.flags.discard = TRUE;
 190
 191       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
 192    }
 193
 194    return PIPE_OK;
 195 }
 196
 197
 198 void
 199 svga_buffer_destroy_host_surface(struct svga_screen *ss,
 200                                  struct svga_buffer *sbuf)
 201 {
 202    if (sbuf->handle) {
 203       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
 204       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 205    }
 206 }
 207
 208
 209 /**
 210  * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
 211  * command buffer, equal to the current number of mapped ranges.
 212  * The UPDATE_GB_IMAGE commands will be patched with the
 213  * actual ranges just before flush.
 214  */
 215 static enum pipe_error
 216 svga_buffer_upload_gb_command(struct svga_context *svga,
 217                               struct svga_buffer *sbuf)
 218 {
 219    struct svga_winsys_context *swc = svga->swc;
 220    SVGA3dCmdUpdateGBImage *update_cmd;
 221    struct svga_3d_update_gb_image *whole_update_cmd = NULL;
 222    uint32 numBoxes = sbuf->map.num_ranges;
 223    struct pipe_resource *dummy;
 224    unsigned i;
 225
 226    assert(svga_have_gb_objects(svga));
 227    assert(numBoxes);
 228    assert(sbuf->dma.updates == NULL);
 229
 230    if (sbuf->dma.flags.discard) {
 231       struct svga_3d_invalidate_gb_image *cicmd = NULL;
 232       SVGA3dCmdInvalidateGBImage *invalidate_cmd;
 233       const unsigned total_commands_size =
 234          sizeof(*invalidate_cmd) + numBoxes * sizeof(*whole_update_cmd);
 235
 236       /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
 237        * 'numBoxes' UPDATE_GB_IMAGE commands.  Allocate all at once rather
 238        * than with separate commands because we need to properly deal with
 239        * filling the command buffer.
 240        */
 241       invalidate_cmd = SVGA3D_FIFOReserve(swc,
 242                                           SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
 243                                           total_commands_size, 1 + numBoxes);
 244       if (!invalidate_cmd)
 245          return PIPE_ERROR_OUT_OF_MEMORY;
 246
 247       cicmd = container_of(invalidate_cmd, cicmd, body);
 248       cicmd->header.size = sizeof(*invalidate_cmd);
 249       swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL, sbuf->handle,
 250                               (SVGA_RELOC_WRITE |
 251                                SVGA_RELOC_INTERNAL |
 252                                SVGA_RELOC_DMA));
 253       invalidate_cmd->image.face = 0;
 254       invalidate_cmd->image.mipmap = 0;
 255
 256       /* The whole_update_command is a SVGA3dCmdHeader plus the
 257        * SVGA3dCmdUpdateGBImage command.
 258        */
 259       whole_update_cmd = (struct svga_3d_update_gb_image *) &invalidate_cmd[1];
 260       /* initialize the first UPDATE_GB_IMAGE command */
 261       whole_update_cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
 262       update_cmd = &whole_update_cmd->body;
 263
 264    } else {
 265       /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
 266       const unsigned total_commands_size =
 267          sizeof(*update_cmd) + (numBoxes - 1) * sizeof(*whole_update_cmd);
 268
 269       update_cmd = SVGA3D_FIFOReserve(swc,
 270                                       SVGA_3D_CMD_UPDATE_GB_IMAGE,
 271                                       total_commands_size, numBoxes);
 272       if (!update_cmd)
 273          return PIPE_ERROR_OUT_OF_MEMORY;
 274
 275       /* The whole_update_command is a SVGA3dCmdHeader plus the
 276        * SVGA3dCmdUpdateGBImage command.
 277        */
 278       whole_update_cmd = container_of(update_cmd, whole_update_cmd, body);
 279    }
 280
 281    /* Init the first UPDATE_GB_IMAGE command */
 282    whole_update_cmd->header.size = sizeof(*update_cmd);
 283    swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
 284                            SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 285    update_cmd->image.face = 0;
 286    update_cmd->image.mipmap = 0;
 287
 288    /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
 289     * fill in the box info below.
 290     */
 291    sbuf->dma.updates = whole_update_cmd;
 292
 293    /*
 294     * Copy the face, mipmap, etc. info to all subsequent commands.
 295     * Also do the surface relocation for each subsequent command.
 296     */
 297    for (i = 1; i < numBoxes; ++i) {
 298       whole_update_cmd++;
 299       memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd));
 300
 301       swc->surface_relocation(swc, &whole_update_cmd->body.image.sid, NULL,
 302                               sbuf->handle,
 303                               SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 304    }
 305
 306    /* Increment reference count */
 307    sbuf->dma.svga = svga;
 308    dummy = NULL;
 309    pipe_resource_reference(&dummy, &sbuf->b.b);
 310    SVGA_FIFOCommitAll(swc);
 311
 312    swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
 313    sbuf->dma.flags.discard = FALSE;
 314
 315    svga->hud.num_resource_updates++;
 316
 317    return PIPE_OK;
 318 }
 319
 320
 321 /**
 322  * Issue DMA commands to transfer guest memory to the host.
 323  * Note that the memory segments (offset, size) will be patched in
 324  * later in the svga_buffer_upload_flush() function.
 325  */
 326 static enum pipe_error
 327 svga_buffer_upload_hb_command(struct svga_context *svga,
 328                               struct svga_buffer *sbuf)
 329 {
 330    struct svga_winsys_context *swc = svga->swc;
 331    struct svga_winsys_buffer *guest = sbuf->hwbuf;
 332    struct svga_winsys_surface *host = sbuf->handle;
 333    SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 334    SVGA3dCmdSurfaceDMA *cmd;
 335    uint32 numBoxes = sbuf->map.num_ranges;
 336    SVGA3dCopyBox *boxes;
 337    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 338    unsigned region_flags;
 339    unsigned surface_flags;
 340    struct pipe_resource *dummy;
 341
 342    assert(!svga_have_gb_objects(svga));
 343
 344    if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 345       region_flags = SVGA_RELOC_READ;
 346       surface_flags = SVGA_RELOC_WRITE;
 347    }
 348    else if (transfer == SVGA3D_READ_HOST_VRAM) {
 349       region_flags = SVGA_RELOC_WRITE;
 350       surface_flags = SVGA_RELOC_READ;
 351    }
 352    else {
 353       assert(0);
 354       return PIPE_ERROR_BAD_INPUT;
 355    }
 356
 357    assert(numBoxes);
 358
 359    cmd = SVGA3D_FIFOReserve(swc,
 360                             SVGA_3D_CMD_SURFACE_DMA,
 361                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 362                             2);
 363    if (!cmd)
 364       return PIPE_ERROR_OUT_OF_MEMORY;
 365
 366    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 367    cmd->guest.pitch = 0;
 368
 369    swc->surface_relocation(swc, &cmd->host.sid, NULL, host, surface_flags);
 370    cmd->host.face = 0;
 371    cmd->host.mipmap = 0;
 372
 373    cmd->transfer = transfer;
 374
 375    sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
 376    sbuf->dma.svga = svga;
 377
 378    /* Increment reference count */
 379    dummy = NULL;
 380    pipe_resource_reference(&dummy, &sbuf->b.b);
 381
 382    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 383    pSuffix->suffixSize = sizeof *pSuffix;
 384    pSuffix->maximumOffset = sbuf->b.b.width0;
 385    pSuffix->flags = sbuf->dma.flags;
 386
 387    SVGA_FIFOCommitAll(swc);
 388
 389    swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
 390    sbuf->dma.flags.discard = FALSE;
 391
 392    svga->hud.num_buffer_uploads++;
 393
 394    return PIPE_OK;
 395 }
 396
 397
 398 /**
 399  * Issue commands to transfer guest memory to the host.
 400  */
 401 static enum pipe_error
 402 svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf)
 403 {
 404    if (svga_have_gb_objects(svga)) {
 405       return svga_buffer_upload_gb_command(svga, sbuf);
 406    } else {
 407       return svga_buffer_upload_hb_command(svga, sbuf);
 408    }
 409 }
 410
 411
 412 /**
 413  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 414  * with the final ranges.
 415  */
 416 void
 417 svga_buffer_upload_flush(struct svga_context *svga,
 418                          struct svga_buffer *sbuf)
 419 {
 420    unsigned i;
 421    struct pipe_resource *dummy;
 422
 423    if (!sbuf->dma.pending) {
 424       //debug_printf("no dma pending on buffer\n");
 425       return;
 426    }
 427
 428    assert(sbuf->handle);
 429    assert(sbuf->map.num_ranges);
 430    assert(sbuf->dma.svga == svga);
 431
 432    /*
 433     * Patch the DMA/update command with the final copy box.
 434     */
 435    if (svga_have_gb_objects(svga)) {
 436       struct svga_3d_update_gb_image *update = sbuf->dma.updates;
 437       assert(update);
 438
 439       for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
 440          SVGA3dBox *box = &update->body.box;
 441
 442          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 443                   sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 444
 445          box->x = sbuf->map.ranges[i].start;
 446          box->y = 0;
 447          box->z = 0;
 448          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 449          box->h = 1;
 450          box->d = 1;
 451
 452          assert(box->x <= sbuf->b.b.width0);
 453          assert(box->x + box->w <= sbuf->b.b.width0);
 454
 455          svga->hud.num_bytes_uploaded += box->w;
 456          svga->hud.num_buffer_uploads++;
 457       }
 458    }
 459    else {
 460       assert(sbuf->hwbuf);
 461       assert(sbuf->dma.boxes);
 462       SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 463
 464       for (i = 0; i < sbuf->map.num_ranges; ++i) {
 465          SVGA3dCopyBox *box = sbuf->dma.boxes + i;
 466
 467          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 468                sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 469
 470          box->x = sbuf->map.ranges[i].start;
 471          box->y = 0;
 472          box->z = 0;
 473          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 474          box->h = 1;
 475          box->d = 1;
 476          box->srcx = sbuf->map.ranges[i].start;
 477          box->srcy = 0;
 478          box->srcz = 0;
 479
 480          assert(box->x <= sbuf->b.b.width0);
 481          assert(box->x + box->w <= sbuf->b.b.width0);
 482
 483          svga->hud.num_bytes_uploaded += box->w;
 484          svga->hud.num_buffer_uploads++;
 485       }
 486    }
 487
 488    /* Reset sbuf for next use/upload */
 489
 490    sbuf->map.num_ranges = 0;
 491
 492    assert(sbuf->head.prev && sbuf->head.next);
 493    LIST_DEL(&sbuf->head);  /* remove from svga->dirty_buffers list */
 494 #ifdef DEBUG
 495    sbuf->head.next = sbuf->head.prev = NULL;
 496 #endif
 497    sbuf->dma.pending = FALSE;
 498    sbuf->dma.flags.discard = FALSE;
 499    sbuf->dma.flags.unsynchronized = FALSE;
 500
 501    sbuf->dma.svga = NULL;
 502    sbuf->dma.boxes = NULL;
 503    sbuf->dma.updates = NULL;
 504
 505    /* Decrement reference count (and potentially destroy) */
 506    dummy = &sbuf->b.b;
 507    pipe_resource_reference(&dummy, NULL);
 508 }
 509
 510
 511 /**
 512  * Note a dirty range.
 513  *
 514  * This function only notes the range down. It doesn't actually emit a DMA
 515  * upload command. That only happens when a context tries to refer to this
 516  * buffer, and the DMA upload command is added to that context's command
 517  * buffer.
 518  *
 519  * We try to lump as many contiguous DMA transfers together as possible.
 520  */
 521 void
 522 svga_buffer_add_range(struct svga_buffer *sbuf,
 523                       unsigned start,
 524                       unsigned end)
 525 {
 526    unsigned i;
 527    unsigned nearest_range;
 528    unsigned nearest_dist;
 529
 530    assert(end > start);
 531
 532    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 533       nearest_range = sbuf->map.num_ranges;
 534       nearest_dist = ~0;
 535    } else {
 536       nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
 537       nearest_dist = 0;
 538    }
 539
 540    /*
 541     * Try to grow one of the ranges.
 542     */
 543
 544    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 545       int left_dist;
 546       int right_dist;
 547       int dist;
 548
 549       left_dist = start - sbuf->map.ranges[i].end;
 550       right_dist = sbuf->map.ranges[i].start - end;
 551       dist = MAX2(left_dist, right_dist);
 552
 553       if (dist <= 0) {
 554          /*
 555           * Ranges are contiguous or overlapping -- extend this one and return.
 556           *
 557           * Note that it is not this function's task to prevent overlapping
 558           * ranges, as the GMR was already given so it is too late to do
 559           * anything.  If the ranges overlap here it must surely be because
 560           * PIPE_TRANSFER_UNSYNCHRONIZED was set.
 561           */
 562
 563          sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
 564          sbuf->map.ranges[i].end   = MAX2(sbuf->map.ranges[i].end,   end);
 565          return;
 566       }
 567       else {
 568          /*
 569           * Discontiguous ranges -- keep track of the nearest range.
 570           */
 571
 572          if (dist < nearest_dist) {
 573             nearest_range = i;
 574             nearest_dist = dist;
 575          }
 576       }
 577    }
 578
 579    /*
 580     * We cannot add a new range to an existing DMA command, so patch-up the
 581     * pending DMA upload and start clean.
 582     */
 583
 584    svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
 585
 586    assert(!sbuf->dma.pending);
 587    assert(!sbuf->dma.svga);
 588    assert(!sbuf->dma.boxes);
 589
 590    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 591       /*
 592        * Add a new range.
 593        */
 594
 595       sbuf->map.ranges[sbuf->map.num_ranges].start = start;
 596       sbuf->map.ranges[sbuf->map.num_ranges].end = end;
 597       ++sbuf->map.num_ranges;
 598    } else {
 599       /*
 600        * Everything else failed, so just extend the nearest range.
 601        *
 602        * It is OK to do this because we always keep a local copy of the
 603        * host buffer data, for SW TNL, and the host never modifies the buffer.
 604        */
 605
 606       assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
 607       assert(nearest_range < sbuf->map.num_ranges);
 608       sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
 609       sbuf->map.ranges[nearest_range].end   = MAX2(sbuf->map.ranges[nearest_range].end,   end);
 610    }
 611 }
 612
 613
 614
 615 /**
 616  * Copy the contents of the malloc buffer to a hardware buffer.
 617  */
 618 static enum pipe_error
 619 svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf)
 620 {
 621    assert(!sbuf->user);
 622    if (!svga_buffer_has_hw_storage(sbuf)) {
 623       struct svga_screen *ss = svga_screen(sbuf->b.b.screen);
 624       enum pipe_error ret;
 625       boolean retry;
 626       void *map;
 627
 628       assert(sbuf->swbuf);
 629       if (!sbuf->swbuf)
 630          return PIPE_ERROR;
 631
 632       ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen),
 633                                           sbuf);
 634       if (ret != PIPE_OK)
 635          return ret;
 636
 637       pipe_mutex_lock(ss->swc_mutex);
 638       map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
 639       assert(map);
 640       assert(!retry);
 641       if (!map) {
 642          pipe_mutex_unlock(ss->swc_mutex);
 643          svga_buffer_destroy_hw_storage(ss, sbuf);
 644          return PIPE_ERROR;
 645       }
 646
 647       memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
 648       svga_buffer_hw_storage_unmap(svga, sbuf);
 649
 650       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 651       assert(!sbuf->map.count);
 652       if (!sbuf->map.count) {
 653          if (sbuf->user)
 654             sbuf->user = FALSE;
 655          else
 656             align_free(sbuf->swbuf);
 657          sbuf->swbuf = NULL;
 658       }
 659
 660       pipe_mutex_unlock(ss->swc_mutex);
 661    }
 662
 663    return PIPE_OK;
 664 }
 665
 666
 667 /**
 668  * Upload the buffer to the host in a piecewise fashion.
 669  *
 670  * Used when the buffer is too big to fit in the GMR aperture.
 671  * This function should never get called in the guest-backed case
 672  * since we always have a full-sized hardware storage backing the
 673  * host surface.
 674  */
 675 static enum pipe_error
 676 svga_buffer_upload_piecewise(struct svga_screen *ss,
 677                              struct svga_context *svga,
 678                              struct svga_buffer *sbuf)
 679 {
 680    struct svga_winsys_screen *sws = ss->sws;
 681    const unsigned alignment = sizeof(void *);
 682    const unsigned usage = 0;
 683    unsigned i;
 684
 685    assert(sbuf->map.num_ranges);
 686    assert(!sbuf->dma.pending);
 687    assert(!svga_have_gb_objects(svga));
 688
 689    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 690
 691    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 692       const struct svga_buffer_range *range = &sbuf->map.ranges[i];
 693       unsigned offset = range->start;
 694       unsigned size = range->end - range->start;
 695
 696       while (offset < range->end) {
 697          struct svga_winsys_buffer *hwbuf;
 698          uint8_t *map;
 699          enum pipe_error ret;
 700
 701          if (offset + size > range->end)
 702             size = range->end - offset;
 703
 704          hwbuf = sws->buffer_create(sws, alignment, usage, size);
 705          while (!hwbuf) {
 706             size /= 2;
 707             if (!size)
 708                return PIPE_ERROR_OUT_OF_MEMORY;
 709             hwbuf = sws->buffer_create(sws, alignment, usage, size);
 710          }
 711
 712          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 713                   offset, offset + size);
 714
 715          map = sws->buffer_map(sws, hwbuf,
 716                                PIPE_TRANSFER_WRITE |
 717                                PIPE_TRANSFER_DISCARD_RANGE);
 718          assert(map);
 719          if (map) {
 720             memcpy(map, (const char *) sbuf->swbuf + offset, size);
 721             sws->buffer_unmap(sws, hwbuf);
 722          }
 723
 724          ret = SVGA3D_BufferDMA(svga->swc,
 725                                 hwbuf, sbuf->handle,
 726                                 SVGA3D_WRITE_HOST_VRAM,
 727                                 size, 0, offset, sbuf->dma.flags);
 728          if (ret != PIPE_OK) {
 729             svga_context_flush(svga, NULL);
 730             ret =  SVGA3D_BufferDMA(svga->swc,
 731                                     hwbuf, sbuf->handle,
 732                                     SVGA3D_WRITE_HOST_VRAM,
 733                                     size, 0, offset, sbuf->dma.flags);
 734             assert(ret == PIPE_OK);
 735          }
 736
 737          sbuf->dma.flags.discard = FALSE;
 738
 739          sws->buffer_destroy(sws, hwbuf);
 740
 741          offset += size;
 742       }
 743    }
 744
 745    sbuf->map.num_ranges = 0;
 746
 747    return PIPE_OK;
 748 }
 749
 750
 751 /**
 752  * Get (or create/upload) the winsys surface handle so that we can
 753  * refer to this buffer in fifo commands.
 754  * This function will create the host surface, and in the GB case also the
 755  * hardware storage. In the non-GB case, the hardware storage will be created
 756  * if there are mapped ranges and the data is currently in a malloc'ed buffer.
 757  */
 758 struct svga_winsys_surface *
 759 svga_buffer_handle(struct svga_context *svga,
 760                    struct pipe_resource *buf)
 761 {
 762    struct pipe_screen *screen = svga->pipe.screen;
 763    struct svga_screen *ss = svga_screen(screen);
 764    struct svga_buffer *sbuf;
 765    enum pipe_error ret;
 766
 767    if (!buf)
 768       return NULL;
 769
 770    sbuf = svga_buffer(buf);
 771
 772    assert(!sbuf->user);
 773
 774    if (!sbuf->handle) {
 775       /* This call will set sbuf->handle */
 776       if (svga_have_gb_objects(svga)) {
 777          ret = svga_buffer_update_hw(svga, sbuf);
 778       } else {
 779          ret = svga_buffer_create_host_surface(ss, sbuf);
 780       }
 781       if (ret != PIPE_OK)
 782          return NULL;
 783    }
 784
 785    assert(sbuf->handle);
 786
 787    if (sbuf->map.num_ranges) {
 788       if (!sbuf->dma.pending) {
 789          /* No pending DMA/update commands yet. */
 790
 791          /* Migrate the data from swbuf -> hwbuf if necessary */
 792          ret = svga_buffer_update_hw(svga, sbuf);
 793          if (ret == PIPE_OK) {
 794             /* Emit DMA or UpdateGBImage commands */
 795             ret = svga_buffer_upload_command(svga, sbuf);
 796             if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 797                svga_context_flush(svga, NULL);
 798                ret = svga_buffer_upload_command(svga, sbuf);
 799                assert(ret == PIPE_OK);
 800             }
 801             if (ret == PIPE_OK) {
 802                sbuf->dma.pending = TRUE;
 803                assert(!sbuf->head.prev && !sbuf->head.next);
 804                LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 805             }
 806          }
 807          else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 808             /*
 809              * The buffer is too big to fit in the GMR aperture, so break it in
 810              * smaller pieces.
 811              */
 812             ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
 813          }
 814
 815          if (ret != PIPE_OK) {
 816             /*
 817              * Something unexpected happened above. There is very little that
 818              * we can do other than proceeding while ignoring the dirty ranges.
 819              */
 820             assert(0);
 821             sbuf->map.num_ranges = 0;
 822          }
 823       }
 824       else {
 825          /*
 826           * There a pending dma already. Make sure it is from this context.
 827           */
 828          assert(sbuf->dma.svga == svga);
 829       }
 830    }
 831
 832    assert(!sbuf->map.num_ranges || sbuf->dma.pending);
 833
 834    return sbuf->handle;
 835 }
 836
 837
 838
 839 void
 840 svga_context_flush_buffers(struct svga_context *svga)
 841 {
 842    struct list_head *curr, *next;
 843    struct svga_buffer *sbuf;
 844
 845    curr = svga->dirty_buffers.next;
 846    next = curr->next;
 847    while(curr != &svga->dirty_buffers) {
 848       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 849
 850       assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
 851       assert(sbuf->dma.pending);
 852
 853       svga_buffer_upload_flush(svga, sbuf);
 854
 855       curr = next;
 856       next = curr->next;
 857    }
 858 }