svga: Hardcode SVGA_COMBINE_USERBUFFERS to 1.
[mesa.git] / src / gallium / drivers / svga / svga_resource_buffer_upload.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34
35 #include "svga_context.h"
36 #include "svga_screen.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_winsys.h"
40 #include "svga_debug.h"
41
42
43 #define MAX_DMA_SIZE (4 * 1024 * 1024)
44
45
46 /**
47 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
48 *
49 * It will flush and retry in case the first attempt to create a DMA buffer
50 * fails, so it should not be called from any function involved in flushing
51 * to avoid recursion.
52 */
53 struct svga_winsys_buffer *
54 svga_winsys_buffer_create( struct svga_context *svga,
55 unsigned alignment,
56 unsigned usage,
57 unsigned size )
58 {
59 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
60 struct svga_winsys_screen *sws = svgascreen->sws;
61 struct svga_winsys_buffer *buf;
62
63 /* XXX this shouldn't be a hard-coded number; it should be queried
64 * somehow.
65 */
66 if (size > MAX_DMA_SIZE) {
67 return NULL;
68 }
69
70 /* Just try */
71 buf = sws->buffer_create(sws, alignment, usage, size);
72 if(!buf) {
73
74 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing screen to find %d bytes GMR\n",
75 size);
76
77 /* Try flushing all pending DMAs */
78 svga_context_flush(svga, NULL);
79 buf = sws->buffer_create(sws, alignment, usage, size);
80 }
81
82 return buf;
83 }
84
85
86 void
87 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
88 {
89 struct svga_winsys_screen *sws = ss->sws;
90
91 assert(!sbuf->map.count);
92 assert(sbuf->hwbuf);
93 if(sbuf->hwbuf) {
94 sws->buffer_destroy(sws, sbuf->hwbuf);
95 sbuf->hwbuf = NULL;
96 }
97 }
98
99
100
101 /**
102 * Allocate DMA'ble storage for the buffer.
103 *
104 * Called before mapping a buffer.
105 */
106 enum pipe_error
107 svga_buffer_create_hw_storage(struct svga_screen *ss,
108 struct svga_buffer *sbuf)
109 {
110 assert(!sbuf->user);
111
112 if(!sbuf->hwbuf) {
113 struct svga_winsys_screen *sws = ss->sws;
114 unsigned alignment = 16;
115 unsigned usage = 0;
116 unsigned size = sbuf->b.b.width0;
117
118 sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
119 if(!sbuf->hwbuf)
120 return PIPE_ERROR_OUT_OF_MEMORY;
121
122 assert(!sbuf->dma.pending);
123 }
124
125 return PIPE_OK;
126 }
127
128
129
130 enum pipe_error
131 svga_buffer_create_host_surface(struct svga_screen *ss,
132 struct svga_buffer *sbuf)
133 {
134 assert(!sbuf->user);
135
136 if(!sbuf->handle) {
137 sbuf->key.flags = 0;
138
139 sbuf->key.format = SVGA3D_BUFFER;
140 if(sbuf->b.b.bind & PIPE_BIND_VERTEX_BUFFER)
141 sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
142 if(sbuf->b.b.bind & PIPE_BIND_INDEX_BUFFER)
143 sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
144
145 sbuf->key.size.width = sbuf->b.b.width0;
146 sbuf->key.size.height = 1;
147 sbuf->key.size.depth = 1;
148
149 sbuf->key.numFaces = 1;
150 sbuf->key.numMipLevels = 1;
151 sbuf->key.cachable = 1;
152
153 SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
154
155 sbuf->handle = svga_screen_surface_create(ss, &sbuf->key);
156 if(!sbuf->handle)
157 return PIPE_ERROR_OUT_OF_MEMORY;
158
159 /* Always set the discard flag on the first time the buffer is written
160 * as svga_screen_surface_create might have passed a recycled host
161 * buffer.
162 */
163 sbuf->dma.flags.discard = TRUE;
164
165 SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
166 }
167
168 return PIPE_OK;
169 }
170
171
172 void
173 svga_buffer_destroy_host_surface(struct svga_screen *ss,
174 struct svga_buffer *sbuf)
175 {
176 if(sbuf->handle) {
177 SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
178 svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
179 }
180 }
181
182
183 /**
184 * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
185 */
186 static enum pipe_error
187 svga_buffer_upload_command(struct svga_context *svga,
188 struct svga_buffer *sbuf)
189 {
190 struct svga_winsys_context *swc = svga->swc;
191 struct svga_winsys_buffer *guest = sbuf->hwbuf;
192 struct svga_winsys_surface *host = sbuf->handle;
193 SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
194 SVGA3dCmdSurfaceDMA *cmd;
195 uint32 numBoxes = sbuf->map.num_ranges;
196 SVGA3dCopyBox *boxes;
197 SVGA3dCmdSurfaceDMASuffix *pSuffix;
198 unsigned region_flags;
199 unsigned surface_flags;
200 struct pipe_resource *dummy;
201
202 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
203 region_flags = SVGA_RELOC_READ;
204 surface_flags = SVGA_RELOC_WRITE;
205 }
206 else if(transfer == SVGA3D_READ_HOST_VRAM) {
207 region_flags = SVGA_RELOC_WRITE;
208 surface_flags = SVGA_RELOC_READ;
209 }
210 else {
211 assert(0);
212 return PIPE_ERROR_BAD_INPUT;
213 }
214
215 assert(numBoxes);
216
217 cmd = SVGA3D_FIFOReserve(swc,
218 SVGA_3D_CMD_SURFACE_DMA,
219 sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
220 2);
221 if(!cmd)
222 return PIPE_ERROR_OUT_OF_MEMORY;
223
224 swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
225 cmd->guest.pitch = 0;
226
227 swc->surface_relocation(swc, &cmd->host.sid, host, surface_flags);
228 cmd->host.face = 0;
229 cmd->host.mipmap = 0;
230
231 cmd->transfer = transfer;
232
233 sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
234 sbuf->dma.svga = svga;
235
236 /* Increment reference count */
237 dummy = NULL;
238 pipe_resource_reference(&dummy, &sbuf->b.b);
239
240 pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
241 pSuffix->suffixSize = sizeof *pSuffix;
242 pSuffix->maximumOffset = sbuf->b.b.width0;
243 pSuffix->flags = sbuf->dma.flags;
244
245 SVGA_FIFOCommitAll(swc);
246
247 sbuf->dma.flags.discard = FALSE;
248
249 return PIPE_OK;
250 }
251
252
253 /**
254 * Patch up the upload DMA command reserved by svga_buffer_upload_command
255 * with the final ranges.
256 */
257 void
258 svga_buffer_upload_flush(struct svga_context *svga,
259 struct svga_buffer *sbuf)
260 {
261 SVGA3dCopyBox *boxes;
262 unsigned i;
263 struct pipe_resource *dummy;
264
265 if (!sbuf->dma.pending) {
266 return;
267 }
268
269 assert(sbuf->handle);
270 assert(sbuf->hwbuf);
271 assert(sbuf->map.num_ranges);
272 assert(sbuf->dma.svga == svga);
273 assert(sbuf->dma.boxes);
274
275 /*
276 * Patch the DMA command with the final copy box.
277 */
278
279 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
280
281 boxes = sbuf->dma.boxes;
282 for(i = 0; i < sbuf->map.num_ranges; ++i) {
283 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
284 sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
285
286 boxes[i].x = sbuf->map.ranges[i].start;
287 boxes[i].y = 0;
288 boxes[i].z = 0;
289 boxes[i].w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
290 boxes[i].h = 1;
291 boxes[i].d = 1;
292 boxes[i].srcx = sbuf->map.ranges[i].start;
293 boxes[i].srcy = 0;
294 boxes[i].srcz = 0;
295 }
296
297 sbuf->map.num_ranges = 0;
298
299 assert(sbuf->head.prev && sbuf->head.next);
300 LIST_DEL(&sbuf->head);
301 #ifdef DEBUG
302 sbuf->head.next = sbuf->head.prev = NULL;
303 #endif
304 sbuf->dma.pending = FALSE;
305 sbuf->dma.flags.discard = FALSE;
306 sbuf->dma.flags.unsynchronized = FALSE;
307
308 sbuf->dma.svga = NULL;
309 sbuf->dma.boxes = NULL;
310
311 /* Decrement reference count (and potentially destroy) */
312 dummy = &sbuf->b.b;
313 pipe_resource_reference(&dummy, NULL);
314 }
315
316
317 /**
318 * Note a dirty range.
319 *
320 * This function only notes the range down. It doesn't actually emit a DMA
321 * upload command. That only happens when a context tries to refer to this
322 * buffer, and the DMA upload command is added to that context's command buffer.
323 *
324 * We try to lump as many contiguous DMA transfers together as possible.
325 */
326 void
327 svga_buffer_add_range(struct svga_buffer *sbuf,
328 unsigned start,
329 unsigned end)
330 {
331 unsigned i;
332 unsigned nearest_range;
333 unsigned nearest_dist;
334
335 assert(end > start);
336
337 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
338 nearest_range = sbuf->map.num_ranges;
339 nearest_dist = ~0;
340 } else {
341 nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
342 nearest_dist = 0;
343 }
344
345 /*
346 * Try to grow one of the ranges.
347 */
348
349 for(i = 0; i < sbuf->map.num_ranges; ++i) {
350 int left_dist;
351 int right_dist;
352 int dist;
353
354 left_dist = start - sbuf->map.ranges[i].end;
355 right_dist = sbuf->map.ranges[i].start - end;
356 dist = MAX2(left_dist, right_dist);
357
358 if (dist <= 0) {
359 /*
360 * Ranges are contiguous or overlapping -- extend this one and return.
361 *
362 * Note that it is not this function's task to prevent overlapping
363 * ranges, as the GMR was already given so it is too late to do
364 * anything. If the ranges overlap here it must surely be because
365 * PIPE_TRANSFER_UNSYNCHRONIZED was set.
366 */
367
368 sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
369 sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
370 return;
371 }
372 else {
373 /*
374 * Discontiguous ranges -- keep track of the nearest range.
375 */
376
377 if (dist < nearest_dist) {
378 nearest_range = i;
379 nearest_dist = dist;
380 }
381 }
382 }
383
384 /*
385 * We cannot add a new range to an existing DMA command, so patch-up the
386 * pending DMA upload and start clean.
387 */
388
389 svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
390
391 assert(!sbuf->dma.pending);
392 assert(!sbuf->dma.svga);
393 assert(!sbuf->dma.boxes);
394
395 if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
396 /*
397 * Add a new range.
398 */
399
400 sbuf->map.ranges[sbuf->map.num_ranges].start = start;
401 sbuf->map.ranges[sbuf->map.num_ranges].end = end;
402 ++sbuf->map.num_ranges;
403 } else {
404 /*
405 * Everything else failed, so just extend the nearest range.
406 *
407 * It is OK to do this because we always keep a local copy of the
408 * host buffer data, for SW TNL, and the host never modifies the buffer.
409 */
410
411 assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
412 assert(nearest_range < sbuf->map.num_ranges);
413 sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
414 sbuf->map.ranges[nearest_range].end = MAX2(sbuf->map.ranges[nearest_range].end, end);
415 }
416 }
417
418
419
420 /**
421 * Copy the contents of the malloc buffer to a hardware buffer.
422 */
423 static INLINE enum pipe_error
424 svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
425 {
426 assert(!sbuf->user);
427 if(!sbuf->hwbuf) {
428 enum pipe_error ret;
429 void *map;
430
431 assert(sbuf->swbuf);
432 if(!sbuf->swbuf)
433 return PIPE_ERROR;
434
435 ret = svga_buffer_create_hw_storage(ss, sbuf);
436 if(ret != PIPE_OK)
437 return ret;
438
439 pipe_mutex_lock(ss->swc_mutex);
440 map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_TRANSFER_WRITE);
441 assert(map);
442 if(!map) {
443 pipe_mutex_unlock(ss->swc_mutex);
444 svga_buffer_destroy_hw_storage(ss, sbuf);
445 return PIPE_ERROR;
446 }
447
448 memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
449 ss->sws->buffer_unmap(ss->sws, sbuf->hwbuf);
450
451 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
452 assert(!sbuf->map.count);
453 if(!sbuf->map.count) {
454 if(sbuf->user)
455 sbuf->user = FALSE;
456 else
457 align_free(sbuf->swbuf);
458 sbuf->swbuf = NULL;
459 }
460
461 pipe_mutex_unlock(ss->swc_mutex);
462 }
463
464 return PIPE_OK;
465 }
466
467
468 /**
469 * Upload the buffer to the host in a piecewise fashion.
470 *
471 * Used when the buffer is too big to fit in the GMR aperture.
472 */
473 static INLINE enum pipe_error
474 svga_buffer_upload_piecewise(struct svga_screen *ss,
475 struct svga_context *svga,
476 struct svga_buffer *sbuf)
477 {
478 struct svga_winsys_screen *sws = ss->sws;
479 const unsigned alignment = sizeof(void *);
480 const unsigned usage = 0;
481 unsigned i;
482
483 assert(sbuf->map.num_ranges);
484 assert(!sbuf->dma.pending);
485
486 SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
487
488 for (i = 0; i < sbuf->map.num_ranges; ++i) {
489 struct svga_buffer_range *range = &sbuf->map.ranges[i];
490 unsigned offset = range->start;
491 unsigned size = range->end - range->start;
492
493 while (offset < range->end) {
494 struct svga_winsys_buffer *hwbuf;
495 uint8_t *map;
496 enum pipe_error ret;
497
498 if (offset + size > range->end)
499 size = range->end - offset;
500
501 hwbuf = sws->buffer_create(sws, alignment, usage, size);
502 while (!hwbuf) {
503 size /= 2;
504 if (!size)
505 return PIPE_ERROR_OUT_OF_MEMORY;
506 hwbuf = sws->buffer_create(sws, alignment, usage, size);
507 }
508
509 SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
510 offset, offset + size);
511
512 map = sws->buffer_map(sws, hwbuf,
513 PIPE_TRANSFER_WRITE |
514 PIPE_TRANSFER_DISCARD);
515 assert(map);
516 if (map) {
517 memcpy(map, sbuf->swbuf, size);
518 sws->buffer_unmap(sws, hwbuf);
519 }
520
521 ret = SVGA3D_BufferDMA(svga->swc,
522 hwbuf, sbuf->handle,
523 SVGA3D_WRITE_HOST_VRAM,
524 size, 0, offset, sbuf->dma.flags);
525 if(ret != PIPE_OK) {
526 svga_context_flush(svga, NULL);
527 ret = SVGA3D_BufferDMA(svga->swc,
528 hwbuf, sbuf->handle,
529 SVGA3D_WRITE_HOST_VRAM,
530 size, 0, offset, sbuf->dma.flags);
531 assert(ret == PIPE_OK);
532 }
533
534 sbuf->dma.flags.discard = FALSE;
535
536 sws->buffer_destroy(sws, hwbuf);
537
538 offset += size;
539 }
540 }
541
542 sbuf->map.num_ranges = 0;
543
544 return PIPE_OK;
545 }
546
547
548
549
550 /* Get (or create/upload) the winsys surface handle so that we can
551 * refer to this buffer in fifo commands.
552 */
553 struct svga_winsys_surface *
554 svga_buffer_handle(struct svga_context *svga,
555 struct pipe_resource *buf)
556 {
557 struct pipe_screen *screen = svga->pipe.screen;
558 struct svga_screen *ss = svga_screen(screen);
559 struct svga_buffer *sbuf;
560 enum pipe_error ret;
561
562 if(!buf)
563 return NULL;
564
565 sbuf = svga_buffer(buf);
566
567 assert(!sbuf->map.count);
568 assert(!sbuf->user);
569
570 if(!sbuf->handle) {
571 ret = svga_buffer_create_host_surface(ss, sbuf);
572 if(ret != PIPE_OK)
573 return NULL;
574 }
575
576 assert(sbuf->handle);
577
578 if (sbuf->map.num_ranges) {
579 if (!sbuf->dma.pending) {
580 /*
581 * No pending DMA upload yet, so insert a DMA upload command now.
582 */
583
584 /*
585 * Migrate the data from swbuf -> hwbuf if necessary.
586 */
587 ret = svga_buffer_update_hw(ss, sbuf);
588 if (ret == PIPE_OK) {
589 /*
590 * Queue a dma command.
591 */
592
593 ret = svga_buffer_upload_command(svga, sbuf);
594 if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
595 svga_context_flush(svga, NULL);
596 ret = svga_buffer_upload_command(svga, sbuf);
597 assert(ret == PIPE_OK);
598 }
599 if (ret == PIPE_OK) {
600 sbuf->dma.pending = TRUE;
601 assert(!sbuf->head.prev && !sbuf->head.next);
602 LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
603 }
604 }
605 else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
606 /*
607 * The buffer is too big to fit in the GMR aperture, so break it in
608 * smaller pieces.
609 */
610 ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
611 }
612
613 if (ret != PIPE_OK) {
614 /*
615 * Something unexpected happened above. There is very little that
616 * we can do other than proceeding while ignoring the dirty ranges.
617 */
618 assert(0);
619 sbuf->map.num_ranges = 0;
620 }
621 }
622 else {
623 /*
624 * There a pending dma already. Make sure it is from this context.
625 */
626 assert(sbuf->dma.svga == svga);
627 }
628 }
629
630 assert(!sbuf->map.num_ranges || sbuf->dma.pending);
631
632 return sbuf->handle;
633 }
634
635
636
637 void
638 svga_context_flush_buffers(struct svga_context *svga)
639 {
640 struct list_head *curr, *next;
641 struct svga_buffer *sbuf;
642
643 curr = svga->dirty_buffers.next;
644 next = curr->next;
645 while(curr != &svga->dirty_buffers) {
646 sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
647
648 assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
649 assert(sbuf->dma.pending);
650
651 svga_buffer_upload_flush(svga, sbuf);
652
653 curr = next;
654 next = curr->next;
655 }
656 }
657
658
659 void
660 svga_redefine_user_buffer(struct pipe_context *pipe,
661 struct pipe_resource *resource,
662 unsigned offset,
663 unsigned size)
664 {
665 struct svga_screen *ss = svga_screen(pipe->screen);
666 struct svga_context *svga = svga_context(pipe);
667 struct svga_buffer *sbuf = svga_buffer(resource);
668
669 assert(sbuf->user);
670 assert(!sbuf->dma.pending);
671 assert(!sbuf->handle);
672 assert(!sbuf->hwbuf);
673
674 /*
675 * Release any uploaded user buffer.
676 *
677 * TODO: As an optimization, we could try to update the uploaded buffer
678 * instead.
679 */
680
681 pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
682
683 pipe_mutex_lock(ss->swc_mutex);
684
685 sbuf->key.size.width = sbuf->b.b.width0 = offset + size;
686
687 pipe_mutex_unlock(ss->swc_mutex);
688
689 svga->curr.any_user_vertex_buffers = TRUE;
690 svga->dirty |= SVGA_NEW_VBUFFER | SVGA_NEW_VELEMENT;
691 }