src/gallium/drivers/svga/svga_resource_buffer_upload.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26
  27 #include "os/os_thread.h"
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_math.h"
  32 #include "util/u_memory.h"
  33
  34 #include "svga_cmd.h"
  35 #include "svga_context.h"
  36 #include "svga_debug.h"
  37 #include "svga_resource_buffer.h"
  38 #include "svga_resource_buffer_upload.h"
  39 #include "svga_screen.h"
  40 #include "svga_winsys.h"
  41
  42 /**
  43  * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
  44  *
  45  */
  46 struct svga_3d_update_gb_image {
  47    SVGA3dCmdHeader header;
  48    SVGA3dCmdUpdateGBImage body;
  49 };
  50
  51 struct svga_3d_invalidate_gb_image {
  52    SVGA3dCmdHeader header;
  53    SVGA3dCmdInvalidateGBImage body;
  54 };
  55
  56
  57 /**
  58  * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
  59  *
  60  * It will flush and retry in case the first attempt to create a DMA buffer
  61  * fails, so it should not be called from any function involved in flushing
  62  * to avoid recursion.
  63  */
  64 struct svga_winsys_buffer *
  65 svga_winsys_buffer_create( struct svga_context *svga,
  66                            unsigned alignment,
  67                            unsigned usage,
  68                            unsigned size )
  69 {
  70    struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
  71    struct svga_winsys_screen *sws = svgascreen->sws;
  72    struct svga_winsys_buffer *buf;
  73
  74    /* Just try */
  75    buf = sws->buffer_create(sws, alignment, usage, size);
  76    if (!buf) {
  77       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
  78                size);
  79
  80       /* Try flushing all pending DMAs */
  81       svga_context_flush(svga, NULL);
  82       buf = sws->buffer_create(sws, alignment, usage, size);
  83    }
  84
  85    return buf;
  86 }
  87
  88
  89 /**
  90  * Destroy HW storage if separate from the host surface.
  91  * In the GB case, the HW storage is associated with the host surface
  92  * and is therefore a No-op.
  93  */
  94 void
  95 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
  96 {
  97    struct svga_winsys_screen *sws = ss->sws;
  98
  99    assert(sbuf->map.count == 0);
 100    assert(sbuf->hwbuf);
 101    if (sbuf->hwbuf) {
 102       sws->buffer_destroy(sws, sbuf->hwbuf);
 103       sbuf->hwbuf = NULL;
 104    }
 105 }
 106
 107
 108
 109 /**
 110  * Allocate DMA'ble or Updatable storage for the buffer.
 111  *
 112  * Called before mapping a buffer.
 113  */
 114 enum pipe_error
 115 svga_buffer_create_hw_storage(struct svga_screen *ss,
 116                               struct svga_buffer *sbuf)
 117 {
 118    assert(!sbuf->user);
 119
 120    if (ss->sws->have_gb_objects) {
 121       assert(sbuf->handle || !sbuf->dma.pending);
 122       return svga_buffer_create_host_surface(ss, sbuf);
 123    }
 124    if (!sbuf->hwbuf) {
 125       struct svga_winsys_screen *sws = ss->sws;
 126       unsigned alignment = 16;
 127       unsigned usage = 0;
 128       unsigned size = sbuf->b.b.width0;
 129
 130       sbuf->hwbuf = sws->buffer_create(sws, alignment, usage, size);
 131       if (!sbuf->hwbuf)
 132          return PIPE_ERROR_OUT_OF_MEMORY;
 133
 134       assert(!sbuf->dma.pending);
 135    }
 136
 137    return PIPE_OK;
 138 }
 139
 140
 141
 142 enum pipe_error
 143 svga_buffer_create_host_surface(struct svga_screen *ss,
 144                                 struct svga_buffer *sbuf)
 145 {
 146    assert(!sbuf->user);
 147
 148    if (!sbuf->handle) {
 149       sbuf->key.flags = 0;
 150
 151       sbuf->key.format = SVGA3D_BUFFER;
 152       if (sbuf->bind_flags & PIPE_BIND_VERTEX_BUFFER) {
 153          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
 154          sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
 155       }
 156       if (sbuf->bind_flags & PIPE_BIND_INDEX_BUFFER) {
 157          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
 158          sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
 159       }
 160       if (sbuf->bind_flags & PIPE_BIND_CONSTANT_BUFFER)
 161          sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
 162
 163       if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT)
 164          sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
 165
 166       if (sbuf->bind_flags & PIPE_BIND_SAMPLER_VIEW)
 167          sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 168
 169       sbuf->key.size.width = sbuf->b.b.width0;
 170       sbuf->key.size.height = 1;
 171       sbuf->key.size.depth = 1;
 172
 173       sbuf->key.numFaces = 1;
 174       sbuf->key.numMipLevels = 1;
 175       sbuf->key.cachable = 1;
 176       sbuf->key.arraySize = 1;
 177
 178       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n",
 179                sbuf->b.b.width0);
 180
 181       sbuf->handle = svga_screen_surface_create(ss, sbuf->b.b.bind,
 182                                                 sbuf->b.b.usage, &sbuf->key);
 183       if (!sbuf->handle)
 184          return PIPE_ERROR_OUT_OF_MEMORY;
 185
 186       /* Always set the discard flag on the first time the buffer is written
 187        * as svga_screen_surface_create might have passed a recycled host
 188        * buffer.
 189        */
 190       sbuf->dma.flags.discard = TRUE;
 191
 192       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n",
 193                sbuf->handle, sbuf->b.b.width0);
 194    }
 195
 196    return PIPE_OK;
 197 }
 198
 199
 200 void
 201 svga_buffer_destroy_host_surface(struct svga_screen *ss,
 202                                  struct svga_buffer *sbuf)
 203 {
 204    if (sbuf->handle) {
 205       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n",
 206                sbuf->handle, sbuf->b.b.width0);
 207       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 208    }
 209 }
 210
 211
 212 /**
 213  * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
 214  * command buffer, equal to the current number of mapped ranges.
 215  * The UPDATE_GB_IMAGE commands will be patched with the
 216  * actual ranges just before flush.
 217  */
 218 static enum pipe_error
 219 svga_buffer_upload_gb_command(struct svga_context *svga,
 220                               struct svga_buffer *sbuf)
 221 {
 222    struct svga_winsys_context *swc = svga->swc;
 223    SVGA3dCmdUpdateGBImage *update_cmd;
 224    struct svga_3d_update_gb_image *whole_update_cmd = NULL;
 225    const uint32 numBoxes = sbuf->map.num_ranges;
 226    struct pipe_resource *dummy;
 227    unsigned i;
 228
 229    assert(svga_have_gb_objects(svga));
 230    assert(numBoxes);
 231    assert(sbuf->dma.updates == NULL);
 232
 233    if (sbuf->dma.flags.discard) {
 234       struct svga_3d_invalidate_gb_image *cicmd = NULL;
 235       SVGA3dCmdInvalidateGBImage *invalidate_cmd;
 236       const unsigned total_commands_size =
 237          sizeof(*invalidate_cmd) + numBoxes * sizeof(*whole_update_cmd);
 238
 239       /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
 240        * 'numBoxes' UPDATE_GB_IMAGE commands.  Allocate all at once rather
 241        * than with separate commands because we need to properly deal with
 242        * filling the command buffer.
 243        */
 244       invalidate_cmd = SVGA3D_FIFOReserve(swc,
 245                                           SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
 246                                           total_commands_size, 1 + numBoxes);
 247       if (!invalidate_cmd)
 248          return PIPE_ERROR_OUT_OF_MEMORY;
 249
 250       cicmd = container_of(invalidate_cmd, cicmd, body);
 251       cicmd->header.size = sizeof(*invalidate_cmd);
 252       swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL, sbuf->handle,
 253                               (SVGA_RELOC_WRITE |
 254                                SVGA_RELOC_INTERNAL |
 255                                SVGA_RELOC_DMA));
 256       invalidate_cmd->image.face = 0;
 257       invalidate_cmd->image.mipmap = 0;
 258
 259       /* The whole_update_command is a SVGA3dCmdHeader plus the
 260        * SVGA3dCmdUpdateGBImage command.
 261        */
 262       whole_update_cmd = (struct svga_3d_update_gb_image *) &invalidate_cmd[1];
 263       /* initialize the first UPDATE_GB_IMAGE command */
 264       whole_update_cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
 265       update_cmd = &whole_update_cmd->body;
 266
 267    } else {
 268       /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
 269       const unsigned total_commands_size =
 270          sizeof(*update_cmd) + (numBoxes - 1) * sizeof(*whole_update_cmd);
 271
 272       update_cmd = SVGA3D_FIFOReserve(swc,
 273                                       SVGA_3D_CMD_UPDATE_GB_IMAGE,
 274                                       total_commands_size, numBoxes);
 275       if (!update_cmd)
 276          return PIPE_ERROR_OUT_OF_MEMORY;
 277
 278       /* The whole_update_command is a SVGA3dCmdHeader plus the
 279        * SVGA3dCmdUpdateGBImage command.
 280        */
 281       whole_update_cmd = container_of(update_cmd, whole_update_cmd, body);
 282    }
 283
 284    /* Init the first UPDATE_GB_IMAGE command */
 285    whole_update_cmd->header.size = sizeof(*update_cmd);
 286    swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
 287                            SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 288    update_cmd->image.face = 0;
 289    update_cmd->image.mipmap = 0;
 290
 291    /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
 292     * fill in the box info below.
 293     */
 294    sbuf->dma.updates = whole_update_cmd;
 295
 296    /*
 297     * Copy the face, mipmap, etc. info to all subsequent commands.
 298     * Also do the surface relocation for each subsequent command.
 299     */
 300    for (i = 1; i < numBoxes; ++i) {
 301       whole_update_cmd++;
 302       memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd));
 303
 304       swc->surface_relocation(swc, &whole_update_cmd->body.image.sid, NULL,
 305                               sbuf->handle,
 306                               SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
 307    }
 308
 309    /* Increment reference count */
 310    sbuf->dma.svga = svga;
 311    dummy = NULL;
 312    pipe_resource_reference(&dummy, &sbuf->b.b);
 313    SVGA_FIFOCommitAll(swc);
 314
 315    swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
 316    sbuf->dma.flags.discard = FALSE;
 317
 318    svga->hud.num_resource_updates++;
 319
 320    return PIPE_OK;
 321 }
 322
 323
 324 /**
 325  * Issue DMA commands to transfer guest memory to the host.
 326  * Note that the memory segments (offset, size) will be patched in
 327  * later in the svga_buffer_upload_flush() function.
 328  */
 329 static enum pipe_error
 330 svga_buffer_upload_hb_command(struct svga_context *svga,
 331                               struct svga_buffer *sbuf)
 332 {
 333    struct svga_winsys_context *swc = svga->swc;
 334    struct svga_winsys_buffer *guest = sbuf->hwbuf;
 335    struct svga_winsys_surface *host = sbuf->handle;
 336    const SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 337    SVGA3dCmdSurfaceDMA *cmd;
 338    const uint32 numBoxes = sbuf->map.num_ranges;
 339    SVGA3dCopyBox *boxes;
 340    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 341    unsigned region_flags;
 342    unsigned surface_flags;
 343    struct pipe_resource *dummy;
 344
 345    assert(!svga_have_gb_objects(svga));
 346
 347    if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 348       region_flags = SVGA_RELOC_READ;
 349       surface_flags = SVGA_RELOC_WRITE;
 350    }
 351    else if (transfer == SVGA3D_READ_HOST_VRAM) {
 352       region_flags = SVGA_RELOC_WRITE;
 353       surface_flags = SVGA_RELOC_READ;
 354    }
 355    else {
 356       assert(0);
 357       return PIPE_ERROR_BAD_INPUT;
 358    }
 359
 360    assert(numBoxes);
 361
 362    cmd = SVGA3D_FIFOReserve(swc,
 363                             SVGA_3D_CMD_SURFACE_DMA,
 364                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 365                             2);
 366    if (!cmd)
 367       return PIPE_ERROR_OUT_OF_MEMORY;
 368
 369    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 370    cmd->guest.pitch = 0;
 371
 372    swc->surface_relocation(swc, &cmd->host.sid, NULL, host, surface_flags);
 373    cmd->host.face = 0;
 374    cmd->host.mipmap = 0;
 375
 376    cmd->transfer = transfer;
 377
 378    sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
 379    sbuf->dma.svga = svga;
 380
 381    /* Increment reference count */
 382    dummy = NULL;
 383    pipe_resource_reference(&dummy, &sbuf->b.b);
 384
 385    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 386    pSuffix->suffixSize = sizeof *pSuffix;
 387    pSuffix->maximumOffset = sbuf->b.b.width0;
 388    pSuffix->flags = sbuf->dma.flags;
 389
 390    SVGA_FIFOCommitAll(swc);
 391
 392    swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
 393    sbuf->dma.flags.discard = FALSE;
 394
 395    svga->hud.num_buffer_uploads++;
 396
 397    return PIPE_OK;
 398 }
 399
 400
 401 /**
 402  * Issue commands to transfer guest memory to the host.
 403  */
 404 static enum pipe_error
 405 svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf)
 406 {
 407    if (svga_have_gb_objects(svga)) {
 408       return svga_buffer_upload_gb_command(svga, sbuf);
 409    } else {
 410       return svga_buffer_upload_hb_command(svga, sbuf);
 411    }
 412 }
 413
 414
 415 /**
 416  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 417  * with the final ranges.
 418  */
 419 void
 420 svga_buffer_upload_flush(struct svga_context *svga,
 421                          struct svga_buffer *sbuf)
 422 {
 423    unsigned i;
 424    struct pipe_resource *dummy;
 425
 426    if (!sbuf->dma.pending) {
 427       //debug_printf("no dma pending on buffer\n");
 428       return;
 429    }
 430
 431    assert(sbuf->handle);
 432    assert(sbuf->map.num_ranges);
 433    assert(sbuf->dma.svga == svga);
 434
 435    /*
 436     * Patch the DMA/update command with the final copy box.
 437     */
 438    if (svga_have_gb_objects(svga)) {
 439       struct svga_3d_update_gb_image *update = sbuf->dma.updates;
 440       assert(update);
 441
 442       for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
 443          SVGA3dBox *box = &update->body.box;
 444
 445          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 446                   sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 447
 448          box->x = sbuf->map.ranges[i].start;
 449          box->y = 0;
 450          box->z = 0;
 451          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 452          box->h = 1;
 453          box->d = 1;
 454
 455          assert(box->x <= sbuf->b.b.width0);
 456          assert(box->x + box->w <= sbuf->b.b.width0);
 457
 458          svga->hud.num_bytes_uploaded += box->w;
 459          svga->hud.num_buffer_uploads++;
 460       }
 461    }
 462    else {
 463       assert(sbuf->hwbuf);
 464       assert(sbuf->dma.boxes);
 465       SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 466
 467       for (i = 0; i < sbuf->map.num_ranges; ++i) {
 468          SVGA3dCopyBox *box = sbuf->dma.boxes + i;
 469
 470          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 471                sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
 472
 473          box->x = sbuf->map.ranges[i].start;
 474          box->y = 0;
 475          box->z = 0;
 476          box->w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
 477          box->h = 1;
 478          box->d = 1;
 479          box->srcx = sbuf->map.ranges[i].start;
 480          box->srcy = 0;
 481          box->srcz = 0;
 482
 483          assert(box->x <= sbuf->b.b.width0);
 484          assert(box->x + box->w <= sbuf->b.b.width0);
 485
 486          svga->hud.num_bytes_uploaded += box->w;
 487          svga->hud.num_buffer_uploads++;
 488       }
 489    }
 490
 491    /* Reset sbuf for next use/upload */
 492
 493    sbuf->map.num_ranges = 0;
 494
 495    assert(sbuf->head.prev && sbuf->head.next);
 496    LIST_DEL(&sbuf->head);  /* remove from svga->dirty_buffers list */
 497 #ifdef DEBUG
 498    sbuf->head.next = sbuf->head.prev = NULL;
 499 #endif
 500    sbuf->dma.pending = FALSE;
 501    sbuf->dma.flags.discard = FALSE;
 502    sbuf->dma.flags.unsynchronized = FALSE;
 503
 504    sbuf->dma.svga = NULL;
 505    sbuf->dma.boxes = NULL;
 506    sbuf->dma.updates = NULL;
 507
 508    /* Decrement reference count (and potentially destroy) */
 509    dummy = &sbuf->b.b;
 510    pipe_resource_reference(&dummy, NULL);
 511 }
 512
 513
 514 /**
 515  * Note a dirty range.
 516  *
 517  * This function only notes the range down. It doesn't actually emit a DMA
 518  * upload command. That only happens when a context tries to refer to this
 519  * buffer, and the DMA upload command is added to that context's command
 520  * buffer.
 521  *
 522  * We try to lump as many contiguous DMA transfers together as possible.
 523  */
 524 void
 525 svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end)
 526 {
 527    unsigned i;
 528    unsigned nearest_range;
 529    unsigned nearest_dist;
 530
 531    assert(end > start);
 532
 533    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 534       nearest_range = sbuf->map.num_ranges;
 535       nearest_dist = ~0;
 536    } else {
 537       nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
 538       nearest_dist = 0;
 539    }
 540
 541    /*
 542     * Try to grow one of the ranges.
 543     */
 544    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 545       const int left_dist = start - sbuf->map.ranges[i].end;
 546       const int right_dist = sbuf->map.ranges[i].start - end;
 547       const int dist = MAX2(left_dist, right_dist);
 548
 549       if (dist <= 0) {
 550          /*
 551           * Ranges are contiguous or overlapping -- extend this one and return.
 552           *
 553           * Note that it is not this function's task to prevent overlapping
 554           * ranges, as the GMR was already given so it is too late to do
 555           * anything.  If the ranges overlap here it must surely be because
 556           * PIPE_TRANSFER_UNSYNCHRONIZED was set.
 557           */
 558          sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
 559          sbuf->map.ranges[i].end   = MAX2(sbuf->map.ranges[i].end,   end);
 560          return;
 561       }
 562       else {
 563          /*
 564           * Discontiguous ranges -- keep track of the nearest range.
 565           */
 566          if (dist < nearest_dist) {
 567             nearest_range = i;
 568             nearest_dist = dist;
 569          }
 570       }
 571    }
 572
 573    /*
 574     * We cannot add a new range to an existing DMA command, so patch-up the
 575     * pending DMA upload and start clean.
 576     */
 577
 578    svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
 579
 580    assert(!sbuf->dma.pending);
 581    assert(!sbuf->dma.svga);
 582    assert(!sbuf->dma.boxes);
 583
 584    if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
 585       /*
 586        * Add a new range.
 587        */
 588
 589       sbuf->map.ranges[sbuf->map.num_ranges].start = start;
 590       sbuf->map.ranges[sbuf->map.num_ranges].end = end;
 591       ++sbuf->map.num_ranges;
 592    } else {
 593       /*
 594        * Everything else failed, so just extend the nearest range.
 595        *
 596        * It is OK to do this because we always keep a local copy of the
 597        * host buffer data, for SW TNL, and the host never modifies the buffer.
 598        */
 599
 600       assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
 601       assert(nearest_range < sbuf->map.num_ranges);
 602       sbuf->map.ranges[nearest_range].start =
 603          MIN2(sbuf->map.ranges[nearest_range].start, start);
 604       sbuf->map.ranges[nearest_range].end =
 605          MAX2(sbuf->map.ranges[nearest_range].end, end);
 606    }
 607 }
 608
 609
 610
 611 /**
 612  * Copy the contents of the malloc buffer to a hardware buffer.
 613  */
 614 static enum pipe_error
 615 svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf)
 616 {
 617    assert(!sbuf->user);
 618    if (!svga_buffer_has_hw_storage(sbuf)) {
 619       struct svga_screen *ss = svga_screen(sbuf->b.b.screen);
 620       enum pipe_error ret;
 621       boolean retry;
 622       void *map;
 623       unsigned i;
 624
 625       assert(sbuf->swbuf);
 626       if (!sbuf->swbuf)
 627          return PIPE_ERROR;
 628
 629       ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen), sbuf);
 630       if (ret != PIPE_OK)
 631          return ret;
 632
 633       pipe_mutex_lock(ss->swc_mutex);
 634       map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
 635       assert(map);
 636       assert(!retry);
 637       if (!map) {
 638          pipe_mutex_unlock(ss->swc_mutex);
 639          svga_buffer_destroy_hw_storage(ss, sbuf);
 640          return PIPE_ERROR;
 641       }
 642
 643       /* Copy data from malloc'd swbuf to the new hardware buffer */
 644       for (i = 0; i < sbuf->map.num_ranges; i++) {
 645          unsigned start = sbuf->map.ranges[i].start;
 646          unsigned len = sbuf->map.ranges[i].end - start;
 647          memcpy((uint8_t *) map + start, (uint8_t *) sbuf->swbuf + start, len);
 648       }
 649
 650       svga_buffer_hw_storage_unmap(svga, sbuf);
 651
 652       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 653       assert(sbuf->map.count == 0);
 654       if (sbuf->map.count == 0) {
 655          if (sbuf->user)
 656             sbuf->user = FALSE;
 657          else
 658             align_free(sbuf->swbuf);
 659          sbuf->swbuf = NULL;
 660       }
 661
 662       pipe_mutex_unlock(ss->swc_mutex);
 663    }
 664
 665    return PIPE_OK;
 666 }
 667
 668
 669 /**
 670  * Upload the buffer to the host in a piecewise fashion.
 671  *
 672  * Used when the buffer is too big to fit in the GMR aperture.
 673  * This function should never get called in the guest-backed case
 674  * since we always have a full-sized hardware storage backing the
 675  * host surface.
 676  */
 677 static enum pipe_error
 678 svga_buffer_upload_piecewise(struct svga_screen *ss,
 679                              struct svga_context *svga,
 680                              struct svga_buffer *sbuf)
 681 {
 682    struct svga_winsys_screen *sws = ss->sws;
 683    const unsigned alignment = sizeof(void *);
 684    const unsigned usage = 0;
 685    unsigned i;
 686
 687    assert(sbuf->map.num_ranges);
 688    assert(!sbuf->dma.pending);
 689    assert(!svga_have_gb_objects(svga));
 690
 691    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 692
 693    for (i = 0; i < sbuf->map.num_ranges; ++i) {
 694       const struct svga_buffer_range *range = &sbuf->map.ranges[i];
 695       unsigned offset = range->start;
 696       unsigned size = range->end - range->start;
 697
 698       while (offset < range->end) {
 699          struct svga_winsys_buffer *hwbuf;
 700          uint8_t *map;
 701          enum pipe_error ret;
 702
 703          if (offset + size > range->end)
 704             size = range->end - offset;
 705
 706          hwbuf = sws->buffer_create(sws, alignment, usage, size);
 707          while (!hwbuf) {
 708             size /= 2;
 709             if (!size)
 710                return PIPE_ERROR_OUT_OF_MEMORY;
 711             hwbuf = sws->buffer_create(sws, alignment, usage, size);
 712          }
 713
 714          SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 715                   offset, offset + size);
 716
 717          map = sws->buffer_map(sws, hwbuf,
 718                                PIPE_TRANSFER_WRITE |
 719                                PIPE_TRANSFER_DISCARD_RANGE);
 720          assert(map);
 721          if (map) {
 722             memcpy(map, (const char *) sbuf->swbuf + offset, size);
 723             sws->buffer_unmap(sws, hwbuf);
 724          }
 725
 726          ret = SVGA3D_BufferDMA(svga->swc,
 727                                 hwbuf, sbuf->handle,
 728                                 SVGA3D_WRITE_HOST_VRAM,
 729                                 size, 0, offset, sbuf->dma.flags);
 730          if (ret != PIPE_OK) {
 731             svga_context_flush(svga, NULL);
 732             ret =  SVGA3D_BufferDMA(svga->swc,
 733                                     hwbuf, sbuf->handle,
 734                                     SVGA3D_WRITE_HOST_VRAM,
 735                                     size, 0, offset, sbuf->dma.flags);
 736             assert(ret == PIPE_OK);
 737          }
 738
 739          sbuf->dma.flags.discard = FALSE;
 740
 741          sws->buffer_destroy(sws, hwbuf);
 742
 743          offset += size;
 744       }
 745    }
 746
 747    sbuf->map.num_ranges = 0;
 748
 749    return PIPE_OK;
 750 }
 751
 752
 753 /**
 754  * Get (or create/upload) the winsys surface handle so that we can
 755  * refer to this buffer in fifo commands.
 756  * This function will create the host surface, and in the GB case also the
 757  * hardware storage. In the non-GB case, the hardware storage will be created
 758  * if there are mapped ranges and the data is currently in a malloc'ed buffer.
 759  */
 760 struct svga_winsys_surface *
 761 svga_buffer_handle(struct svga_context *svga, struct pipe_resource *buf)
 762 {
 763    struct pipe_screen *screen = svga->pipe.screen;
 764    struct svga_screen *ss = svga_screen(screen);
 765    struct svga_buffer *sbuf;
 766    enum pipe_error ret;
 767
 768    if (!buf)
 769       return NULL;
 770
 771    sbuf = svga_buffer(buf);
 772
 773    assert(!sbuf->user);
 774
 775    if (!sbuf->handle) {
 776       /* This call will set sbuf->handle */
 777       if (svga_have_gb_objects(svga)) {
 778          ret = svga_buffer_update_hw(svga, sbuf);
 779       } else {
 780          ret = svga_buffer_create_host_surface(ss, sbuf);
 781       }
 782       if (ret != PIPE_OK)
 783          return NULL;
 784    }
 785
 786    assert(sbuf->handle);
 787
 788    if (sbuf->map.num_ranges) {
 789       if (!sbuf->dma.pending) {
 790          /* No pending DMA/update commands yet. */
 791
 792          /* Migrate the data from swbuf -> hwbuf if necessary */
 793          ret = svga_buffer_update_hw(svga, sbuf);
 794          if (ret == PIPE_OK) {
 795             /* Emit DMA or UpdateGBImage commands */
 796             ret = svga_buffer_upload_command(svga, sbuf);
 797             if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 798                svga_context_flush(svga, NULL);
 799                ret = svga_buffer_upload_command(svga, sbuf);
 800                assert(ret == PIPE_OK);
 801             }
 802             if (ret == PIPE_OK) {
 803                sbuf->dma.pending = TRUE;
 804                assert(!sbuf->head.prev && !sbuf->head.next);
 805                LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 806             }
 807          }
 808          else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
 809             /*
 810              * The buffer is too big to fit in the GMR aperture, so break it in
 811              * smaller pieces.
 812              */
 813             ret = svga_buffer_upload_piecewise(ss, svga, sbuf);
 814          }
 815
 816          if (ret != PIPE_OK) {
 817             /*
 818              * Something unexpected happened above. There is very little that
 819              * we can do other than proceeding while ignoring the dirty ranges.
 820              */
 821             assert(0);
 822             sbuf->map.num_ranges = 0;
 823          }
 824       }
 825       else {
 826          /*
 827           * There a pending dma already. Make sure it is from this context.
 828           */
 829          assert(sbuf->dma.svga == svga);
 830       }
 831    }
 832
 833    assert(sbuf->map.num_ranges == 0 || sbuf->dma.pending);
 834
 835    return sbuf->handle;
 836 }
 837
 838
 839
 840 void
 841 svga_context_flush_buffers(struct svga_context *svga)
 842 {
 843    struct list_head *curr, *next;
 844
 845    SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERSFLUSH);
 846
 847    curr = svga->dirty_buffers.next;
 848    next = curr->next;
 849    while (curr != &svga->dirty_buffers) {
 850       struct svga_buffer *sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 851
 852       assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
 853       assert(sbuf->dma.pending);
 854
 855       svga_buffer_upload_flush(svga, sbuf);
 856
 857       curr = next;
 858       next = curr->next;
 859    }
 860
 861    SVGA_STATS_TIME_POP(svga_sws(svga));
 862 }