1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
27 #include "os/os_thread.h"
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "util/u_math.h"
32 #include "util/u_memory.h"
35 #include "svga_context.h"
36 #include "svga_debug.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_buffer_upload.h"
39 #include "svga_screen.h"
40 #include "svga_winsys.h"
43 * Describes a complete SVGA_3D_CMD_UPDATE_GB_IMAGE command
46 struct svga_3d_update_gb_image
{
47 SVGA3dCmdHeader header
;
48 SVGA3dCmdUpdateGBImage body
;
51 struct svga_3d_invalidate_gb_image
{
52 SVGA3dCmdHeader header
;
53 SVGA3dCmdInvalidateGBImage body
;
58 * Allocate a winsys_buffer (ie. DMA, aka GMR memory).
60 * It will flush and retry in case the first attempt to create a DMA buffer
61 * fails, so it should not be called from any function involved in flushing
64 struct svga_winsys_buffer
*
65 svga_winsys_buffer_create( struct svga_context
*svga
,
70 struct svga_screen
*svgascreen
= svga_screen(svga
->pipe
.screen
);
71 struct svga_winsys_screen
*sws
= svgascreen
->sws
;
72 struct svga_winsys_buffer
*buf
;
75 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
77 SVGA_DBG(DEBUG_DMA
|DEBUG_PERF
, "flushing context to find %d bytes GMR\n",
80 /* Try flushing all pending DMAs */
81 svga_context_flush(svga
, NULL
);
82 buf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
90 * Destroy HW storage if separate from the host surface.
91 * In the GB case, the HW storage is associated with the host surface
92 * and is therefore a No-op.
95 svga_buffer_destroy_hw_storage(struct svga_screen
*ss
, struct svga_buffer
*sbuf
)
97 struct svga_winsys_screen
*sws
= ss
->sws
;
99 assert(!sbuf
->map
.count
);
102 sws
->buffer_destroy(sws
, sbuf
->hwbuf
);
110 * Allocate DMA'ble or Updatable storage for the buffer.
112 * Called before mapping a buffer.
115 svga_buffer_create_hw_storage(struct svga_screen
*ss
,
116 struct svga_buffer
*sbuf
)
120 if (ss
->sws
->have_gb_objects
) {
121 assert(sbuf
->handle
|| !sbuf
->dma
.pending
);
122 return svga_buffer_create_host_surface(ss
, sbuf
);
125 struct svga_winsys_screen
*sws
= ss
->sws
;
126 unsigned alignment
= 16;
128 unsigned size
= sbuf
->b
.b
.width0
;
130 sbuf
->hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
132 return PIPE_ERROR_OUT_OF_MEMORY
;
134 assert(!sbuf
->dma
.pending
);
143 svga_buffer_create_host_surface(struct svga_screen
*ss
,
144 struct svga_buffer
*sbuf
)
151 sbuf
->key
.format
= SVGA3D_BUFFER
;
152 if (sbuf
->bind_flags
& PIPE_BIND_VERTEX_BUFFER
) {
153 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_VERTEXBUFFER
;
154 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_VERTEX_BUFFER
;
156 if (sbuf
->bind_flags
& PIPE_BIND_INDEX_BUFFER
) {
157 sbuf
->key
.flags
|= SVGA3D_SURFACE_HINT_INDEXBUFFER
;
158 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_INDEX_BUFFER
;
160 if (sbuf
->bind_flags
& PIPE_BIND_CONSTANT_BUFFER
)
161 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
;
163 if (sbuf
->bind_flags
& PIPE_BIND_STREAM_OUTPUT
)
164 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_STREAM_OUTPUT
;
166 if (sbuf
->bind_flags
& PIPE_BIND_SAMPLER_VIEW
)
167 sbuf
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
169 sbuf
->key
.size
.width
= sbuf
->b
.b
.width0
;
170 sbuf
->key
.size
.height
= 1;
171 sbuf
->key
.size
.depth
= 1;
173 sbuf
->key
.numFaces
= 1;
174 sbuf
->key
.numMipLevels
= 1;
175 sbuf
->key
.cachable
= 1;
176 sbuf
->key
.arraySize
= 1;
178 SVGA_DBG(DEBUG_DMA
, "surface_create for buffer sz %d\n", sbuf
->b
.b
.width0
);
180 sbuf
->handle
= svga_screen_surface_create(ss
, sbuf
->b
.b
.bind
,
181 sbuf
->b
.b
.usage
, &sbuf
->key
);
183 return PIPE_ERROR_OUT_OF_MEMORY
;
185 /* Always set the discard flag on the first time the buffer is written
186 * as svga_screen_surface_create might have passed a recycled host
189 sbuf
->dma
.flags
.discard
= TRUE
;
191 SVGA_DBG(DEBUG_DMA
, " --> got sid %p sz %d (buffer)\n", sbuf
->handle
, sbuf
->b
.b
.width0
);
199 svga_buffer_destroy_host_surface(struct svga_screen
*ss
,
200 struct svga_buffer
*sbuf
)
203 SVGA_DBG(DEBUG_DMA
, " ungrab sid %p sz %d\n", sbuf
->handle
, sbuf
->b
.b
.width0
);
204 svga_screen_surface_destroy(ss
, &sbuf
->key
, &sbuf
->handle
);
210 * Insert a number of preliminary UPDATE_GB_IMAGE commands in the
211 * command buffer, equal to the current number of mapped ranges.
212 * The UPDATE_GB_IMAGE commands will be patched with the
213 * actual ranges just before flush.
215 static enum pipe_error
216 svga_buffer_upload_gb_command(struct svga_context
*svga
,
217 struct svga_buffer
*sbuf
)
219 struct svga_winsys_context
*swc
= svga
->swc
;
220 SVGA3dCmdUpdateGBImage
*update_cmd
;
221 struct svga_3d_update_gb_image
*whole_update_cmd
= NULL
;
222 uint32 numBoxes
= sbuf
->map
.num_ranges
;
223 struct pipe_resource
*dummy
;
227 assert(sbuf
->dma
.updates
== NULL
);
229 if (sbuf
->dma
.flags
.discard
) {
230 struct svga_3d_invalidate_gb_image
*cicmd
= NULL
;
231 SVGA3dCmdInvalidateGBImage
*invalidate_cmd
;
232 const unsigned total_commands_size
=
233 sizeof(*invalidate_cmd
) + numBoxes
* sizeof(*whole_update_cmd
);
235 /* Allocate FIFO space for one INVALIDATE_GB_IMAGE command followed by
236 * 'numBoxes' UPDATE_GB_IMAGE commands. Allocate all at once rather
237 * than with separate commands because we need to properly deal with
238 * filling the command buffer.
240 invalidate_cmd
= SVGA3D_FIFOReserve(swc
,
241 SVGA_3D_CMD_INVALIDATE_GB_IMAGE
,
242 total_commands_size
, 1 + numBoxes
);
244 return PIPE_ERROR_OUT_OF_MEMORY
;
246 cicmd
= container_of(invalidate_cmd
, cicmd
, body
);
247 cicmd
->header
.size
= sizeof(*invalidate_cmd
);
248 swc
->surface_relocation(swc
, &invalidate_cmd
->image
.sid
, NULL
, sbuf
->handle
,
250 SVGA_RELOC_INTERNAL
|
252 invalidate_cmd
->image
.face
= 0;
253 invalidate_cmd
->image
.mipmap
= 0;
255 /* The whole_update_command is a SVGA3dCmdHeader plus the
256 * SVGA3dCmdUpdateGBImage command.
258 whole_update_cmd
= (struct svga_3d_update_gb_image
*) &invalidate_cmd
[1];
259 /* initialize the first UPDATE_GB_IMAGE command */
260 whole_update_cmd
->header
.id
= SVGA_3D_CMD_UPDATE_GB_IMAGE
;
261 update_cmd
= &whole_update_cmd
->body
;
264 /* Allocate FIFO space for 'numBoxes' UPDATE_GB_IMAGE commands */
265 const unsigned total_commands_size
=
266 sizeof(*update_cmd
) + (numBoxes
- 1) * sizeof(*whole_update_cmd
);
268 update_cmd
= SVGA3D_FIFOReserve(swc
,
269 SVGA_3D_CMD_UPDATE_GB_IMAGE
,
270 total_commands_size
, numBoxes
);
272 return PIPE_ERROR_OUT_OF_MEMORY
;
274 /* The whole_update_command is a SVGA3dCmdHeader plus the
275 * SVGA3dCmdUpdateGBImage command.
277 whole_update_cmd
= container_of(update_cmd
, whole_update_cmd
, body
);
280 /* Init the first UPDATE_GB_IMAGE command */
281 whole_update_cmd
->header
.size
= sizeof(*update_cmd
);
282 swc
->surface_relocation(swc
, &update_cmd
->image
.sid
, NULL
, sbuf
->handle
,
283 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
284 update_cmd
->image
.face
= 0;
285 update_cmd
->image
.mipmap
= 0;
287 /* Save pointer to the first UPDATE_GB_IMAGE command so that we can
288 * fill in the box info below.
290 sbuf
->dma
.updates
= whole_update_cmd
;
293 * Copy the face, mipmap, etc. info to all subsequent commands.
294 * Also do the surface relocation for each subsequent command.
296 for (i
= 1; i
< numBoxes
; ++i
) {
298 memcpy(whole_update_cmd
, sbuf
->dma
.updates
, sizeof(*whole_update_cmd
));
300 swc
->surface_relocation(swc
, &whole_update_cmd
->body
.image
.sid
, NULL
,
302 SVGA_RELOC_WRITE
| SVGA_RELOC_INTERNAL
);
305 /* Increment reference count */
306 sbuf
->dma
.svga
= svga
;
308 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
309 SVGA_FIFOCommitAll(swc
);
311 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
312 sbuf
->dma
.flags
.discard
= FALSE
;
319 * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
321 static enum pipe_error
322 svga_buffer_upload_command(struct svga_context
*svga
,
323 struct svga_buffer
*sbuf
)
325 struct svga_winsys_context
*swc
= svga
->swc
;
326 struct svga_winsys_buffer
*guest
= sbuf
->hwbuf
;
327 struct svga_winsys_surface
*host
= sbuf
->handle
;
328 SVGA3dTransferType transfer
= SVGA3D_WRITE_HOST_VRAM
;
329 SVGA3dCmdSurfaceDMA
*cmd
;
330 uint32 numBoxes
= sbuf
->map
.num_ranges
;
331 SVGA3dCopyBox
*boxes
;
332 SVGA3dCmdSurfaceDMASuffix
*pSuffix
;
333 unsigned region_flags
;
334 unsigned surface_flags
;
335 struct pipe_resource
*dummy
;
337 if (svga_have_gb_objects(svga
))
338 return svga_buffer_upload_gb_command(svga
, sbuf
);
340 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
341 region_flags
= SVGA_RELOC_READ
;
342 surface_flags
= SVGA_RELOC_WRITE
;
344 else if (transfer
== SVGA3D_READ_HOST_VRAM
) {
345 region_flags
= SVGA_RELOC_WRITE
;
346 surface_flags
= SVGA_RELOC_READ
;
350 return PIPE_ERROR_BAD_INPUT
;
355 cmd
= SVGA3D_FIFOReserve(swc
,
356 SVGA_3D_CMD_SURFACE_DMA
,
357 sizeof *cmd
+ numBoxes
* sizeof *boxes
+ sizeof *pSuffix
,
360 return PIPE_ERROR_OUT_OF_MEMORY
;
362 swc
->region_relocation(swc
, &cmd
->guest
.ptr
, guest
, 0, region_flags
);
363 cmd
->guest
.pitch
= 0;
365 swc
->surface_relocation(swc
, &cmd
->host
.sid
, NULL
, host
, surface_flags
);
367 cmd
->host
.mipmap
= 0;
369 cmd
->transfer
= transfer
;
371 sbuf
->dma
.boxes
= (SVGA3dCopyBox
*)&cmd
[1];
372 sbuf
->dma
.svga
= svga
;
374 /* Increment reference count */
376 pipe_resource_reference(&dummy
, &sbuf
->b
.b
);
378 pSuffix
= (SVGA3dCmdSurfaceDMASuffix
*)((uint8_t*)cmd
+ sizeof *cmd
+ numBoxes
* sizeof *boxes
);
379 pSuffix
->suffixSize
= sizeof *pSuffix
;
380 pSuffix
->maximumOffset
= sbuf
->b
.b
.width0
;
381 pSuffix
->flags
= sbuf
->dma
.flags
;
383 SVGA_FIFOCommitAll(swc
);
385 swc
->hints
|= SVGA_HINT_FLAG_CAN_PRE_FLUSH
;
386 sbuf
->dma
.flags
.discard
= FALSE
;
393 * Patch up the upload DMA command reserved by svga_buffer_upload_command
394 * with the final ranges.
397 svga_buffer_upload_flush(struct svga_context
*svga
,
398 struct svga_buffer
*sbuf
)
401 struct pipe_resource
*dummy
;
403 if (!sbuf
->dma
.pending
) {
404 //debug_printf("no dma pending on buffer\n");
408 assert(sbuf
->handle
);
409 assert(sbuf
->map
.num_ranges
);
410 assert(sbuf
->dma
.svga
== svga
);
413 * Patch the DMA/update command with the final copy box.
415 if (svga_have_gb_objects(svga
)) {
416 struct svga_3d_update_gb_image
*update
= sbuf
->dma
.updates
;
419 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
, ++update
) {
420 SVGA3dBox
*box
= &update
->body
.box
;
422 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
423 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
425 box
->x
= sbuf
->map
.ranges
[i
].start
;
428 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
432 assert(box
->x
<= sbuf
->b
.b
.width0
);
433 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
435 svga
->hud
.num_bytes_uploaded
+= box
->w
;
440 assert(sbuf
->dma
.boxes
);
441 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
443 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
444 SVGA3dCopyBox
*box
= sbuf
->dma
.boxes
+ i
;
446 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
447 sbuf
->map
.ranges
[i
].start
, sbuf
->map
.ranges
[i
].end
);
449 box
->x
= sbuf
->map
.ranges
[i
].start
;
452 box
->w
= sbuf
->map
.ranges
[i
].end
- sbuf
->map
.ranges
[i
].start
;
455 box
->srcx
= sbuf
->map
.ranges
[i
].start
;
459 assert(box
->x
<= sbuf
->b
.b
.width0
);
460 assert(box
->x
+ box
->w
<= sbuf
->b
.b
.width0
);
462 svga
->hud
.num_bytes_uploaded
+= box
->w
;
466 /* Reset sbuf for next use/upload */
468 sbuf
->map
.num_ranges
= 0;
470 assert(sbuf
->head
.prev
&& sbuf
->head
.next
);
471 LIST_DEL(&sbuf
->head
); /* remove from svga->dirty_buffers list */
473 sbuf
->head
.next
= sbuf
->head
.prev
= NULL
;
475 sbuf
->dma
.pending
= FALSE
;
476 sbuf
->dma
.flags
.discard
= FALSE
;
477 sbuf
->dma
.flags
.unsynchronized
= FALSE
;
479 sbuf
->dma
.svga
= NULL
;
480 sbuf
->dma
.boxes
= NULL
;
481 sbuf
->dma
.updates
= NULL
;
483 /* Decrement reference count (and potentially destroy) */
485 pipe_resource_reference(&dummy
, NULL
);
490 * Note a dirty range.
492 * This function only notes the range down. It doesn't actually emit a DMA
493 * upload command. That only happens when a context tries to refer to this
494 * buffer, and the DMA upload command is added to that context's command
497 * We try to lump as many contiguous DMA transfers together as possible.
500 svga_buffer_add_range(struct svga_buffer
*sbuf
,
505 unsigned nearest_range
;
506 unsigned nearest_dist
;
510 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
511 nearest_range
= sbuf
->map
.num_ranges
;
514 nearest_range
= SVGA_BUFFER_MAX_RANGES
- 1;
519 * Try to grow one of the ranges.
522 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
527 left_dist
= start
- sbuf
->map
.ranges
[i
].end
;
528 right_dist
= sbuf
->map
.ranges
[i
].start
- end
;
529 dist
= MAX2(left_dist
, right_dist
);
533 * Ranges are contiguous or overlapping -- extend this one and return.
535 * Note that it is not this function's task to prevent overlapping
536 * ranges, as the GMR was already given so it is too late to do
537 * anything. If the ranges overlap here it must surely be because
538 * PIPE_TRANSFER_UNSYNCHRONIZED was set.
541 sbuf
->map
.ranges
[i
].start
= MIN2(sbuf
->map
.ranges
[i
].start
, start
);
542 sbuf
->map
.ranges
[i
].end
= MAX2(sbuf
->map
.ranges
[i
].end
, end
);
547 * Discontiguous ranges -- keep track of the nearest range.
550 if (dist
< nearest_dist
) {
558 * We cannot add a new range to an existing DMA command, so patch-up the
559 * pending DMA upload and start clean.
562 svga_buffer_upload_flush(sbuf
->dma
.svga
, sbuf
);
564 assert(!sbuf
->dma
.pending
);
565 assert(!sbuf
->dma
.svga
);
566 assert(!sbuf
->dma
.boxes
);
568 if (sbuf
->map
.num_ranges
< SVGA_BUFFER_MAX_RANGES
) {
573 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].start
= start
;
574 sbuf
->map
.ranges
[sbuf
->map
.num_ranges
].end
= end
;
575 ++sbuf
->map
.num_ranges
;
578 * Everything else failed, so just extend the nearest range.
580 * It is OK to do this because we always keep a local copy of the
581 * host buffer data, for SW TNL, and the host never modifies the buffer.
584 assert(nearest_range
< SVGA_BUFFER_MAX_RANGES
);
585 assert(nearest_range
< sbuf
->map
.num_ranges
);
586 sbuf
->map
.ranges
[nearest_range
].start
= MIN2(sbuf
->map
.ranges
[nearest_range
].start
, start
);
587 sbuf
->map
.ranges
[nearest_range
].end
= MAX2(sbuf
->map
.ranges
[nearest_range
].end
, end
);
594 * Copy the contents of the malloc buffer to a hardware buffer.
596 static enum pipe_error
597 svga_buffer_update_hw(struct svga_context
*svga
, struct svga_buffer
*sbuf
)
600 if (!svga_buffer_has_hw_storage(sbuf
)) {
601 struct svga_screen
*ss
= svga_screen(sbuf
->b
.b
.screen
);
610 ret
= svga_buffer_create_hw_storage(svga_screen(sbuf
->b
.b
.screen
),
615 pipe_mutex_lock(ss
->swc_mutex
);
616 map
= svga_buffer_hw_storage_map(svga
, sbuf
, PIPE_TRANSFER_WRITE
, &retry
);
620 pipe_mutex_unlock(ss
->swc_mutex
);
621 svga_buffer_destroy_hw_storage(ss
, sbuf
);
625 memcpy(map
, sbuf
->swbuf
, sbuf
->b
.b
.width0
);
626 svga_buffer_hw_storage_unmap(svga
, sbuf
);
628 /* This user/malloc buffer is now indistinguishable from a gpu buffer */
629 assert(!sbuf
->map
.count
);
630 if (!sbuf
->map
.count
) {
634 align_free(sbuf
->swbuf
);
638 pipe_mutex_unlock(ss
->swc_mutex
);
646 * Upload the buffer to the host in a piecewise fashion.
648 * Used when the buffer is too big to fit in the GMR aperture.
649 * This function should never get called in the guest-backed case
650 * since we always have a full-sized hardware storage backing the
653 static enum pipe_error
654 svga_buffer_upload_piecewise(struct svga_screen
*ss
,
655 struct svga_context
*svga
,
656 struct svga_buffer
*sbuf
)
658 struct svga_winsys_screen
*sws
= ss
->sws
;
659 const unsigned alignment
= sizeof(void *);
660 const unsigned usage
= 0;
663 assert(sbuf
->map
.num_ranges
);
664 assert(!sbuf
->dma
.pending
);
665 assert(!svga_have_gb_objects(svga
));
667 SVGA_DBG(DEBUG_DMA
, "dma to sid %p\n", sbuf
->handle
);
669 for (i
= 0; i
< sbuf
->map
.num_ranges
; ++i
) {
670 struct svga_buffer_range
*range
= &sbuf
->map
.ranges
[i
];
671 unsigned offset
= range
->start
;
672 unsigned size
= range
->end
- range
->start
;
674 while (offset
< range
->end
) {
675 struct svga_winsys_buffer
*hwbuf
;
679 if (offset
+ size
> range
->end
)
680 size
= range
->end
- offset
;
682 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
686 return PIPE_ERROR_OUT_OF_MEMORY
;
687 hwbuf
= sws
->buffer_create(sws
, alignment
, usage
, size
);
690 SVGA_DBG(DEBUG_DMA
, " bytes %u - %u\n",
691 offset
, offset
+ size
);
693 map
= sws
->buffer_map(sws
, hwbuf
,
694 PIPE_TRANSFER_WRITE
|
695 PIPE_TRANSFER_DISCARD_RANGE
);
698 memcpy(map
, (const char *) sbuf
->swbuf
+ offset
, size
);
699 sws
->buffer_unmap(sws
, hwbuf
);
702 ret
= SVGA3D_BufferDMA(svga
->swc
,
704 SVGA3D_WRITE_HOST_VRAM
,
705 size
, 0, offset
, sbuf
->dma
.flags
);
706 if (ret
!= PIPE_OK
) {
707 svga_context_flush(svga
, NULL
);
708 ret
= SVGA3D_BufferDMA(svga
->swc
,
710 SVGA3D_WRITE_HOST_VRAM
,
711 size
, 0, offset
, sbuf
->dma
.flags
);
712 assert(ret
== PIPE_OK
);
715 sbuf
->dma
.flags
.discard
= FALSE
;
717 sws
->buffer_destroy(sws
, hwbuf
);
723 sbuf
->map
.num_ranges
= 0;
730 * Get (or create/upload) the winsys surface handle so that we can
731 * refer to this buffer in fifo commands.
732 * This function will create the host surface, and in the GB case also the
733 * hardware storage. In the non-GB case, the hardware storage will be created
734 * if there are mapped ranges and the data is currently in a malloc'ed buffer.
736 struct svga_winsys_surface
*
737 svga_buffer_handle(struct svga_context
*svga
,
738 struct pipe_resource
*buf
)
740 struct pipe_screen
*screen
= svga
->pipe
.screen
;
741 struct svga_screen
*ss
= svga_screen(screen
);
742 struct svga_buffer
*sbuf
;
748 sbuf
= svga_buffer(buf
);
753 /* This call will set sbuf->handle */
754 if (svga_have_gb_objects(svga
)) {
755 ret
= svga_buffer_update_hw(svga
, sbuf
);
757 ret
= svga_buffer_create_host_surface(ss
, sbuf
);
763 assert(sbuf
->handle
);
765 if (sbuf
->map
.num_ranges
) {
766 if (!sbuf
->dma
.pending
) {
768 * No pending DMA upload yet, so insert a DMA upload command now.
772 * Migrate the data from swbuf -> hwbuf if necessary.
774 ret
= svga_buffer_update_hw(svga
, sbuf
);
775 if (ret
== PIPE_OK
) {
777 * Queue a dma command.
780 ret
= svga_buffer_upload_command(svga
, sbuf
);
781 if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
782 svga_context_flush(svga
, NULL
);
783 ret
= svga_buffer_upload_command(svga
, sbuf
);
784 assert(ret
== PIPE_OK
);
786 if (ret
== PIPE_OK
) {
787 sbuf
->dma
.pending
= TRUE
;
788 assert(!sbuf
->head
.prev
&& !sbuf
->head
.next
);
789 LIST_ADDTAIL(&sbuf
->head
, &svga
->dirty_buffers
);
792 else if (ret
== PIPE_ERROR_OUT_OF_MEMORY
) {
794 * The buffer is too big to fit in the GMR aperture, so break it in
797 ret
= svga_buffer_upload_piecewise(ss
, svga
, sbuf
);
800 if (ret
!= PIPE_OK
) {
802 * Something unexpected happened above. There is very little that
803 * we can do other than proceeding while ignoring the dirty ranges.
806 sbuf
->map
.num_ranges
= 0;
811 * There a pending dma already. Make sure it is from this context.
813 assert(sbuf
->dma
.svga
== svga
);
817 assert(!sbuf
->map
.num_ranges
|| sbuf
->dma
.pending
);
825 svga_context_flush_buffers(struct svga_context
*svga
)
827 struct list_head
*curr
, *next
;
828 struct svga_buffer
*sbuf
;
830 curr
= svga
->dirty_buffers
.next
;
832 while(curr
!= &svga
->dirty_buffers
) {
833 sbuf
= LIST_ENTRY(struct svga_buffer
, curr
, head
);
835 assert(p_atomic_read(&sbuf
->b
.b
.reference
.count
) != 0);
836 assert(sbuf
->dma
.pending
);
838 svga_buffer_upload_flush(svga
, sbuf
);