Added few more stubs so that control reaches to DestroyDevice().
[mesa.git] / src / gallium / drivers / svga / svga_resource_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
28
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/format/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
38
39 #include "svga_cmd.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
48
49
50 static void
51 svga_transfer_dma_band(struct svga_context *svga,
52 struct svga_transfer *st,
53 SVGA3dTransferType transfer,
54 unsigned x, unsigned y, unsigned z,
55 unsigned w, unsigned h, unsigned d,
56 unsigned srcx, unsigned srcy, unsigned srcz,
57 SVGA3dSurfaceDMAFlags flags)
58 {
59 struct svga_texture *texture = svga_texture(st->base.resource);
60 SVGA3dCopyBox box;
61
62 assert(!st->use_direct_map);
63
64 box.x = x;
65 box.y = y;
66 box.z = z;
67 box.w = w;
68 box.h = h;
69 box.d = d;
70 box.srcx = srcx;
71 box.srcy = srcy;
72 box.srcz = srcz;
73
74 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
75 "(%u, %u, %u), %ubpp\n",
76 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
77 texture->handle,
78 st->slice,
79 x,
80 y,
81 z,
82 x + w,
83 y + h,
84 z + 1,
85 util_format_get_blocksize(texture->b.b.format) * 8 /
86 (util_format_get_blockwidth(texture->b.b.format)
87 * util_format_get_blockheight(texture->b.b.format)));
88
89 SVGA_RETRY(svga, SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags));
90 }
91
92
93 static void
94 svga_transfer_dma(struct svga_context *svga,
95 struct svga_transfer *st,
96 SVGA3dTransferType transfer,
97 SVGA3dSurfaceDMAFlags flags)
98 {
99 struct svga_texture *texture = svga_texture(st->base.resource);
100 struct svga_screen *screen = svga_screen(texture->b.b.screen);
101 struct svga_winsys_screen *sws = screen->sws;
102 struct pipe_fence_handle *fence = NULL;
103
104 assert(!st->use_direct_map);
105
106 if (transfer == SVGA3D_READ_HOST_VRAM) {
107 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
108 }
109
110 /* Ensure any pending operations on host surfaces are queued on the command
111 * buffer first.
112 */
113 svga_surfaces_flush(svga);
114
115 if (!st->swbuf) {
116 /* Do the DMA transfer in a single go */
117 svga_transfer_dma_band(svga, st, transfer,
118 st->box.x, st->box.y, st->box.z,
119 st->box.w, st->box.h, st->box.d,
120 0, 0, 0,
121 flags);
122
123 if (transfer == SVGA3D_READ_HOST_VRAM) {
124 svga_context_flush(svga, &fence);
125 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
126 sws->fence_reference(sws, &fence, NULL);
127 }
128 }
129 else {
130 int y, h, srcy;
131 unsigned blockheight =
132 util_format_get_blockheight(st->base.resource->format);
133
134 h = st->hw_nblocksy * blockheight;
135 srcy = 0;
136
137 for (y = 0; y < st->box.h; y += h) {
138 unsigned offset, length;
139 void *hw, *sw;
140
141 if (y + h > st->box.h)
142 h = st->box.h - y;
143
144 /* Transfer band must be aligned to pixel block boundaries */
145 assert(y % blockheight == 0);
146 assert(h % blockheight == 0);
147
148 offset = y * st->base.stride / blockheight;
149 length = h * st->base.stride / blockheight;
150
151 sw = (uint8_t *) st->swbuf + offset;
152
153 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
154 unsigned usage = PIPE_TRANSFER_WRITE;
155
156 /* Wait for the previous DMAs to complete */
157 /* TODO: keep one DMA (at half the size) in the background */
158 if (y) {
159 svga_context_flush(svga, NULL);
160 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
161 }
162
163 hw = sws->buffer_map(sws, st->hwbuf, usage);
164 assert(hw);
165 if (hw) {
166 memcpy(hw, sw, length);
167 sws->buffer_unmap(sws, st->hwbuf);
168 }
169 }
170
171 svga_transfer_dma_band(svga, st, transfer,
172 st->box.x, y, st->box.z,
173 st->box.w, h, st->box.d,
174 0, srcy, 0, flags);
175
176 /*
177 * Prevent the texture contents to be discarded on the next band
178 * upload.
179 */
180 flags.discard = FALSE;
181
182 if (transfer == SVGA3D_READ_HOST_VRAM) {
183 svga_context_flush(svga, &fence);
184 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
185
186 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
187 assert(hw);
188 if (hw) {
189 memcpy(sw, hw, length);
190 sws->buffer_unmap(sws, st->hwbuf);
191 }
192 }
193 }
194 }
195 }
196
197
198
199 static bool
200 svga_texture_get_handle(struct pipe_screen *screen,
201 struct pipe_resource *texture,
202 struct winsys_handle *whandle)
203 {
204 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
205 unsigned stride;
206
207 assert(svga_texture(texture)->key.cachable == 0);
208 svga_texture(texture)->key.cachable = 0;
209
210 stride = util_format_get_nblocksx(texture->format, texture->width0) *
211 util_format_get_blocksize(texture->format);
212
213 return sws->surface_get_handle(sws, svga_texture(texture)->handle,
214 stride, whandle);
215 }
216
217
218 static void
219 svga_texture_destroy(struct pipe_screen *screen,
220 struct pipe_resource *pt)
221 {
222 struct svga_screen *ss = svga_screen(screen);
223 struct svga_texture *tex = svga_texture(pt);
224
225 ss->texture_timestamp++;
226
227 svga_sampler_view_reference(&tex->cached_view, NULL);
228
229 /*
230 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
231 */
232 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
233 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
234
235 /* Destroy the backed surface handle if exists */
236 if (tex->backed_handle)
237 svga_screen_surface_destroy(ss, &tex->backed_key, &tex->backed_handle);
238
239 ss->hud.total_resource_bytes -= tex->size;
240
241 FREE(tex->defined);
242 FREE(tex->rendered_to);
243 FREE(tex->dirty);
244 FREE(tex);
245
246 assert(ss->hud.num_resources > 0);
247 if (ss->hud.num_resources > 0)
248 ss->hud.num_resources--;
249 }
250
251
252 /**
253 * Determine if we need to read back a texture image before mapping it.
254 */
255 static inline boolean
256 need_tex_readback(struct svga_transfer *st)
257 {
258 if (st->base.usage & PIPE_TRANSFER_READ)
259 return TRUE;
260
261 if ((st->base.usage & PIPE_TRANSFER_WRITE) &&
262 ((st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
263 return svga_was_texture_rendered_to(svga_texture(st->base.resource),
264 st->slice, st->base.level);
265 }
266
267 return FALSE;
268 }
269
270
271 static void
272 readback_image_vgpu9(struct svga_context *svga,
273 struct svga_winsys_surface *surf,
274 unsigned slice,
275 unsigned level)
276 {
277 SVGA_RETRY(svga, SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level));
278 }
279
280
281 static void
282 readback_image_vgpu10(struct svga_context *svga,
283 struct svga_winsys_surface *surf,
284 unsigned slice,
285 unsigned level,
286 unsigned numMipLevels)
287 {
288 unsigned subResource;
289
290 subResource = slice * numMipLevels + level;
291 SVGA_RETRY(svga, SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf,
292 subResource));
293 }
294
295
296 /**
297 * Use DMA for the transfer request
298 */
299 static void *
300 svga_texture_transfer_map_dma(struct svga_context *svga,
301 struct svga_transfer *st)
302 {
303 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
304 struct pipe_resource *texture = st->base.resource;
305 unsigned nblocksx, nblocksy;
306 unsigned d;
307 unsigned usage = st->base.usage;
308
309 /* we'll put the data into a tightly packed buffer */
310 nblocksx = util_format_get_nblocksx(texture->format, st->box.w);
311 nblocksy = util_format_get_nblocksy(texture->format, st->box.h);
312 d = st->box.d;
313
314 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
315 st->base.layer_stride = st->base.stride * nblocksy;
316 st->hw_nblocksy = nblocksy;
317
318 st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
319 st->hw_nblocksy * st->base.stride * d);
320
321 while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
322 st->hwbuf =
323 svga_winsys_buffer_create(svga, 1, 0,
324 st->hw_nblocksy * st->base.stride * d);
325 }
326
327 if (!st->hwbuf)
328 return NULL;
329
330 if (st->hw_nblocksy < nblocksy) {
331 /* We couldn't allocate a hardware buffer big enough for the transfer,
332 * so allocate regular malloc memory instead
333 */
334 if (0) {
335 debug_printf("%s: failed to allocate %u KB of DMA, "
336 "splitting into %u x %u KB DMA transfers\n",
337 __FUNCTION__,
338 (nblocksy * st->base.stride + 1023) / 1024,
339 (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
340 (st->hw_nblocksy * st->base.stride + 1023) / 1024);
341 }
342
343 st->swbuf = MALLOC(nblocksy * st->base.stride * d);
344 if (!st->swbuf) {
345 sws->buffer_destroy(sws, st->hwbuf);
346 return NULL;
347 }
348 }
349
350 if (usage & PIPE_TRANSFER_READ) {
351 SVGA3dSurfaceDMAFlags flags;
352 memset(&flags, 0, sizeof flags);
353 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
354 }
355
356 if (st->swbuf) {
357 return st->swbuf;
358 }
359 else {
360 return sws->buffer_map(sws, st->hwbuf, usage);
361 }
362 }
363
364
365 /**
366 * Use direct map for the transfer request
367 */
368 static void *
369 svga_texture_transfer_map_direct(struct svga_context *svga,
370 struct svga_transfer *st)
371 {
372 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
373 struct pipe_transfer *transfer = &st->base;
374 struct pipe_resource *texture = transfer->resource;
375 struct svga_texture *tex = svga_texture(texture);
376 struct svga_winsys_surface *surf = tex->handle;
377 unsigned level = st->base.level;
378 unsigned w, h, nblocksx, nblocksy, i;
379 unsigned usage = st->base.usage;
380
381 if (need_tex_readback(st)) {
382 svga_surfaces_flush(svga);
383
384 if (!svga->swc->force_coherent || tex->imported) {
385 for (i = 0; i < st->box.d; i++) {
386 if (svga_have_vgpu10(svga)) {
387 readback_image_vgpu10(svga, surf, st->slice + i, level,
388 tex->b.b.last_level + 1);
389 } else {
390 readback_image_vgpu9(svga, surf, st->slice + i, level);
391 }
392 }
393 svga->hud.num_readbacks++;
394 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
395
396 svga_context_flush(svga, NULL);
397 }
398 /*
399 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
400 * we could potentially clear the flag for all faces/layers/mips.
401 */
402 svga_clear_texture_rendered_to(tex, st->slice, level);
403 }
404 else {
405 assert(usage & PIPE_TRANSFER_WRITE);
406 if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
407 if (svga_is_texture_dirty(tex, st->slice, level)) {
408 /*
409 * do a surface flush if the subresource has been modified
410 * in this command buffer.
411 */
412 svga_surfaces_flush(svga);
413 if (!sws->surface_is_flushed(sws, surf)) {
414 svga->hud.surface_write_flushes++;
415 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
416 svga_context_flush(svga, NULL);
417 }
418 }
419 }
420 }
421
422 /* we'll directly access the guest-backed surface */
423 w = u_minify(texture->width0, level);
424 h = u_minify(texture->height0, level);
425 nblocksx = util_format_get_nblocksx(texture->format, w);
426 nblocksy = util_format_get_nblocksy(texture->format, h);
427 st->hw_nblocksy = nblocksy;
428 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
429 st->base.layer_stride = st->base.stride * nblocksy;
430
431 /*
432 * Begin mapping code
433 */
434 {
435 SVGA3dSize baseLevelSize;
436 uint8_t *map;
437 boolean retry, rebind;
438 unsigned offset, mip_width, mip_height;
439 struct svga_winsys_context *swc = svga->swc;
440
441 if (swc->force_coherent) {
442 usage |= PIPE_TRANSFER_PERSISTENT | PIPE_TRANSFER_COHERENT;
443 }
444
445 map = SVGA_TRY_MAP(svga->swc->surface_map
446 (svga->swc, surf, usage, &retry, &rebind), retry);
447
448 if (map == NULL && retry) {
449 /*
450 * At this point, the svga_surfaces_flush() should already have
451 * called in svga_texture_get_transfer().
452 */
453 svga->hud.surface_write_flushes++;
454 svga_retry_enter(svga);
455 svga_context_flush(svga, NULL);
456 map = svga->swc->surface_map(svga->swc, surf, usage, &retry, &rebind);
457 svga_retry_exit(svga);
458 }
459
460 if (map && rebind) {
461 enum pipe_error ret;
462
463 ret = SVGA3D_BindGBSurface(swc, surf);
464 if (ret != PIPE_OK) {
465 svga_context_flush(svga, NULL);
466 ret = SVGA3D_BindGBSurface(swc, surf);
467 assert(ret == PIPE_OK);
468 }
469 svga_context_flush(svga, NULL);
470 }
471
472 /*
473 * Make sure we return NULL if the map fails
474 */
475 if (!map) {
476 return NULL;
477 }
478
479 /**
480 * Compute the offset to the specific texture slice in the buffer.
481 */
482 baseLevelSize.width = tex->b.b.width0;
483 baseLevelSize.height = tex->b.b.height0;
484 baseLevelSize.depth = tex->b.b.depth0;
485
486 if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
487 (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY) ||
488 (tex->b.b.target == PIPE_TEXTURE_CUBE_ARRAY)) {
489 st->base.layer_stride =
490 svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
491 tex->b.b.last_level + 1, 1, 0);
492 }
493
494 offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
495 tex->b.b.last_level + 1, /* numMips */
496 st->slice, level);
497 if (level > 0) {
498 assert(offset > 0);
499 }
500
501 mip_width = u_minify(tex->b.b.width0, level);
502 mip_height = u_minify(tex->b.b.height0, level);
503
504 offset += svga3dsurface_get_pixel_offset(tex->key.format,
505 mip_width, mip_height,
506 st->box.x,
507 st->box.y,
508 st->box.z);
509
510 return (void *) (map + offset);
511 }
512 }
513
514
515 /**
516 * Request a transfer map to the texture resource
517 */
518 static void *
519 svga_texture_transfer_map(struct pipe_context *pipe,
520 struct pipe_resource *texture,
521 unsigned level,
522 unsigned usage,
523 const struct pipe_box *box,
524 struct pipe_transfer **ptransfer)
525 {
526 struct svga_context *svga = svga_context(pipe);
527 struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
528 struct svga_texture *tex = svga_texture(texture);
529 struct svga_transfer *st;
530 struct svga_winsys_surface *surf = tex->handle;
531 boolean use_direct_map = svga_have_gb_objects(svga) &&
532 (!svga_have_gb_dma(svga) || (usage & PIPE_TRANSFER_WRITE));
533 void *map = NULL;
534 int64_t begin = svga_get_time(svga);
535
536 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
537
538 if (!surf)
539 goto done;
540
541 /* We can't map texture storage directly unless we have GB objects */
542 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
543 if (svga_have_gb_objects(svga))
544 use_direct_map = TRUE;
545 else
546 goto done;
547 }
548
549 st = CALLOC_STRUCT(svga_transfer);
550 if (!st)
551 goto done;
552
553 st->base.level = level;
554 st->base.usage = usage;
555 st->base.box = *box;
556
557 /* The modified transfer map box with the array index removed from z.
558 * The array index is specified in slice.
559 */
560 st->box.x = box->x;
561 st->box.y = box->y;
562 st->box.z = box->z;
563 st->box.w = box->width;
564 st->box.h = box->height;
565 st->box.d = box->depth;
566
567 switch (tex->b.b.target) {
568 case PIPE_TEXTURE_CUBE:
569 st->slice = st->base.box.z;
570 st->box.z = 0; /* so we don't apply double offsets below */
571 break;
572 case PIPE_TEXTURE_1D_ARRAY:
573 case PIPE_TEXTURE_2D_ARRAY:
574 case PIPE_TEXTURE_CUBE_ARRAY:
575 st->slice = st->base.box.z;
576 st->box.z = 0; /* so we don't apply double offsets below */
577
578 /* Force direct map for transfering multiple slices */
579 if (st->base.box.depth > 1)
580 use_direct_map = svga_have_gb_objects(svga);
581
582 break;
583 default:
584 st->slice = 0;
585 break;
586 }
587
588 /* Force direct map for multisample surface */
589 if (texture->nr_samples > 1) {
590 assert(svga_have_gb_objects(svga));
591 assert(sws->have_sm4_1);
592 use_direct_map = TRUE;
593 }
594
595 st->use_direct_map = use_direct_map;
596 pipe_resource_reference(&st->base.resource, texture);
597
598 /* If this is the first time mapping to the surface in this
599 * command buffer and there is no pending primitives, clear
600 * the dirty masks of this surface.
601 */
602 if (sws->surface_is_flushed(sws, surf) &&
603 (svga_have_vgpu10(svga) ||
604 !svga_hwtnl_has_pending_prim(svga->hwtnl))) {
605 svga_clear_texture_dirty(tex);
606 }
607
608 if (!use_direct_map) {
609 /* upload to the DMA buffer */
610 map = svga_texture_transfer_map_dma(svga, st);
611 }
612 else {
613 boolean can_use_upload = tex->can_use_upload &&
614 !(st->base.usage & PIPE_TRANSFER_READ);
615 boolean was_rendered_to =
616 svga_was_texture_rendered_to(svga_texture(texture),
617 st->slice, st->base.level);
618
619 /* If the texture was already rendered to and upload buffer
620 * is supported, then we will use upload buffer to
621 * avoid the need to read back the texture content; otherwise,
622 * we'll first try to map directly to the GB surface, if it is blocked,
623 * then we'll try the upload buffer.
624 */
625 if (was_rendered_to && can_use_upload) {
626 map = svga_texture_transfer_map_upload(svga, st);
627 }
628 else {
629 unsigned orig_usage = st->base.usage;
630
631 /* First try directly map to the GB surface */
632 if (can_use_upload)
633 st->base.usage |= PIPE_TRANSFER_DONTBLOCK;
634 map = svga_texture_transfer_map_direct(svga, st);
635 st->base.usage = orig_usage;
636
637 if (!map && can_use_upload) {
638 /* if direct map with DONTBLOCK fails, then try upload to the
639 * texture upload buffer.
640 */
641 map = svga_texture_transfer_map_upload(svga, st);
642 }
643 }
644
645 /* If upload fails, then try direct map again without forcing it
646 * to DONTBLOCK.
647 */
648 if (!map) {
649 map = svga_texture_transfer_map_direct(svga, st);
650 }
651 }
652
653 if (!map) {
654 FREE(st);
655 }
656 else {
657 *ptransfer = &st->base;
658 svga->hud.num_textures_mapped++;
659 if (usage & PIPE_TRANSFER_WRITE) {
660 /* record texture upload for HUD */
661 svga->hud.num_bytes_uploaded +=
662 st->base.layer_stride * st->box.d;
663
664 /* mark this texture level as dirty */
665 svga_set_texture_dirty(tex, st->slice, level);
666 }
667 }
668
669 done:
670 svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
671 SVGA_STATS_TIME_POP(sws);
672 (void) sws;
673
674 return map;
675 }
676
677 /**
678 * Unmap a GB texture surface.
679 */
680 static void
681 svga_texture_surface_unmap(struct svga_context *svga,
682 struct pipe_transfer *transfer)
683 {
684 struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
685 struct svga_winsys_context *swc = svga->swc;
686 boolean rebind;
687
688 assert(surf);
689
690 swc->surface_unmap(swc, surf, &rebind);
691 if (rebind) {
692 SVGA_RETRY(svga, SVGA3D_BindGBSurface(swc, surf));
693 }
694 }
695
696
697 static void
698 update_image_vgpu9(struct svga_context *svga,
699 struct svga_winsys_surface *surf,
700 const SVGA3dBox *box,
701 unsigned slice,
702 unsigned level)
703 {
704 SVGA_RETRY(svga, SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level));
705 }
706
707
708 static void
709 update_image_vgpu10(struct svga_context *svga,
710 struct svga_winsys_surface *surf,
711 const SVGA3dBox *box,
712 unsigned slice,
713 unsigned level,
714 unsigned numMipLevels)
715 {
716 unsigned subResource;
717
718 subResource = slice * numMipLevels + level;
719
720 SVGA_RETRY(svga, SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box,
721 subResource));
722 }
723
724
725 /**
726 * unmap DMA transfer request
727 */
728 static void
729 svga_texture_transfer_unmap_dma(struct svga_context *svga,
730 struct svga_transfer *st)
731 {
732 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
733
734 if (!st->swbuf)
735 sws->buffer_unmap(sws, st->hwbuf);
736
737 if (st->base.usage & PIPE_TRANSFER_WRITE) {
738 /* Use DMA to transfer texture data */
739 SVGA3dSurfaceDMAFlags flags;
740 struct pipe_resource *texture = st->base.resource;
741 struct svga_texture *tex = svga_texture(texture);
742
743
744 memset(&flags, 0, sizeof flags);
745 if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
746 flags.discard = TRUE;
747 }
748 if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
749 flags.unsynchronized = TRUE;
750 }
751
752 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
753 svga_set_texture_rendered_to(tex, st->slice, st->base.level);
754 }
755
756 FREE(st->swbuf);
757 sws->buffer_destroy(sws, st->hwbuf);
758 }
759
760
761 /**
762 * unmap direct map transfer request
763 */
764 static void
765 svga_texture_transfer_unmap_direct(struct svga_context *svga,
766 struct svga_transfer *st)
767 {
768 struct pipe_transfer *transfer = &st->base;
769 struct svga_texture *tex = svga_texture(transfer->resource);
770
771 svga_texture_surface_unmap(svga, transfer);
772
773 /* Now send an update command to update the content in the backend. */
774 if (st->base.usage & PIPE_TRANSFER_WRITE) {
775 struct svga_winsys_surface *surf = tex->handle;
776
777 assert(svga_have_gb_objects(svga));
778
779 /* update the effected region */
780 SVGA3dBox box = st->box;
781 unsigned nlayers;
782
783 switch (tex->b.b.target) {
784 case PIPE_TEXTURE_2D_ARRAY:
785 case PIPE_TEXTURE_CUBE_ARRAY:
786 case PIPE_TEXTURE_1D_ARRAY:
787 nlayers = box.d;
788 box.d = 1;
789 break;
790 default:
791 nlayers = 1;
792 break;
793 }
794
795
796 if (0)
797 debug_printf("%s %d, %d, %d %d x %d x %d\n",
798 __FUNCTION__,
799 box.x, box.y, box.z,
800 box.w, box.h, box.d);
801
802 if (!svga->swc->force_coherent || tex->imported) {
803 if (svga_have_vgpu10(svga)) {
804 unsigned i;
805
806 for (i = 0; i < nlayers; i++) {
807 update_image_vgpu10(svga, surf, &box,
808 st->slice + i, transfer->level,
809 tex->b.b.last_level + 1);
810 }
811 } else {
812 assert(nlayers == 1);
813 update_image_vgpu9(svga, surf, &box, st->slice,
814 transfer->level);
815 }
816 }
817 }
818 }
819
820
821 static void
822 svga_texture_transfer_unmap(struct pipe_context *pipe,
823 struct pipe_transfer *transfer)
824 {
825 struct svga_context *svga = svga_context(pipe);
826 struct svga_screen *ss = svga_screen(pipe->screen);
827 struct svga_winsys_screen *sws = ss->sws;
828 struct svga_transfer *st = svga_transfer(transfer);
829 struct svga_texture *tex = svga_texture(transfer->resource);
830
831 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
832
833 if (!st->use_direct_map) {
834 svga_texture_transfer_unmap_dma(svga, st);
835 }
836 else if (st->upload.buf) {
837 svga_texture_transfer_unmap_upload(svga, st);
838 }
839 else {
840 svga_texture_transfer_unmap_direct(svga, st);
841 }
842
843 if (st->base.usage & PIPE_TRANSFER_WRITE) {
844 svga->hud.num_resource_updates++;
845
846 /* Mark the texture level as dirty */
847 ss->texture_timestamp++;
848 svga_age_texture_view(tex, transfer->level);
849 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
850 svga_define_texture_level(tex, st->slice, transfer->level);
851 else
852 svga_define_texture_level(tex, 0, transfer->level);
853 }
854
855 pipe_resource_reference(&st->base.resource, NULL);
856 FREE(st);
857 SVGA_STATS_TIME_POP(sws);
858 (void) sws;
859 }
860
861
862 /**
863 * Does format store depth values?
864 */
865 static inline boolean
866 format_has_depth(enum pipe_format format)
867 {
868 const struct util_format_description *desc = util_format_description(format);
869 return util_format_has_depth(desc);
870 }
871
872
873 struct u_resource_vtbl svga_texture_vtbl =
874 {
875 svga_texture_get_handle, /* get_handle */
876 svga_texture_destroy, /* resource_destroy */
877 svga_texture_transfer_map, /* transfer_map */
878 u_default_transfer_flush_region, /* transfer_flush_region */
879 svga_texture_transfer_unmap, /* transfer_unmap */
880 };
881
882
883 struct pipe_resource *
884 svga_texture_create(struct pipe_screen *screen,
885 const struct pipe_resource *template)
886 {
887 struct svga_screen *svgascreen = svga_screen(screen);
888 struct svga_texture *tex;
889 unsigned bindings = template->bind;
890
891 SVGA_STATS_TIME_PUSH(svgascreen->sws,
892 SVGA_STATS_TIME_CREATETEXTURE);
893
894 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
895 if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
896 goto fail_notex;
897 }
898
899 /* Verify the number of mipmap levels isn't impossibly large. For example,
900 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
901 * the gallium frontend should never ask us to create a resource with invalid
902 * parameters.
903 */
904 {
905 unsigned max_dim = template->width0;
906
907 switch (template->target) {
908 case PIPE_TEXTURE_1D:
909 case PIPE_TEXTURE_1D_ARRAY:
910 // nothing
911 break;
912 case PIPE_TEXTURE_2D:
913 case PIPE_TEXTURE_CUBE:
914 case PIPE_TEXTURE_CUBE_ARRAY:
915 case PIPE_TEXTURE_2D_ARRAY:
916 max_dim = MAX2(max_dim, template->height0);
917 break;
918 case PIPE_TEXTURE_3D:
919 max_dim = MAX3(max_dim, template->height0, template->depth0);
920 break;
921 case PIPE_TEXTURE_RECT:
922 case PIPE_BUFFER:
923 assert(template->last_level == 0);
924 /* the assertion below should always pass */
925 break;
926 default:
927 debug_printf("Unexpected texture target type\n");
928 }
929 assert(1 << template->last_level <= max_dim);
930 }
931
932 tex = CALLOC_STRUCT(svga_texture);
933 if (!tex) {
934 goto fail_notex;
935 }
936
937 tex->defined = CALLOC(template->depth0 * template->array_size,
938 sizeof(tex->defined[0]));
939 if (!tex->defined) {
940 FREE(tex);
941 goto fail_notex;
942 }
943
944 tex->rendered_to = CALLOC(template->depth0 * template->array_size,
945 sizeof(tex->rendered_to[0]));
946 if (!tex->rendered_to) {
947 goto fail;
948 }
949
950 tex->dirty = CALLOC(template->depth0 * template->array_size,
951 sizeof(tex->dirty[0]));
952 if (!tex->dirty) {
953 goto fail;
954 }
955
956 tex->b.b = *template;
957 tex->b.vtbl = &svga_texture_vtbl;
958 pipe_reference_init(&tex->b.b.reference, 1);
959 tex->b.b.screen = screen;
960
961 tex->key.flags = 0;
962 tex->key.size.width = template->width0;
963 tex->key.size.height = template->height0;
964 tex->key.size.depth = template->depth0;
965 tex->key.arraySize = 1;
966 tex->key.numFaces = 1;
967
968 /* nr_samples=1 must be treated as a non-multisample texture */
969 if (tex->b.b.nr_samples == 1) {
970 tex->b.b.nr_samples = 0;
971 }
972 else if (tex->b.b.nr_samples > 1) {
973 assert(svgascreen->sws->have_sm4_1);
974 tex->key.flags |= SVGA3D_SURFACE_MULTISAMPLE;
975 }
976
977 tex->key.sampleCount = tex->b.b.nr_samples;
978
979 if (svgascreen->sws->have_vgpu10) {
980 switch (template->target) {
981 case PIPE_TEXTURE_1D:
982 tex->key.flags |= SVGA3D_SURFACE_1D;
983 break;
984 case PIPE_TEXTURE_1D_ARRAY:
985 tex->key.flags |= SVGA3D_SURFACE_1D;
986 /* fall-through */
987 case PIPE_TEXTURE_2D_ARRAY:
988 tex->key.flags |= SVGA3D_SURFACE_ARRAY;
989 tex->key.arraySize = template->array_size;
990 break;
991 case PIPE_TEXTURE_3D:
992 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
993 break;
994 case PIPE_TEXTURE_CUBE:
995 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
996 tex->key.numFaces = 6;
997 break;
998 case PIPE_TEXTURE_CUBE_ARRAY:
999 assert(svgascreen->sws->have_sm4_1);
1000 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1001 tex->key.numFaces = 1; // arraySize already includes the 6 faces
1002 tex->key.arraySize = template->array_size;
1003 break;
1004 default:
1005 break;
1006 }
1007 }
1008 else {
1009 switch (template->target) {
1010 case PIPE_TEXTURE_3D:
1011 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1012 break;
1013 case PIPE_TEXTURE_CUBE:
1014 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
1015 tex->key.numFaces = 6;
1016 break;
1017 default:
1018 break;
1019 }
1020 }
1021
1022 tex->key.cachable = 1;
1023
1024 if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
1025 !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
1026 /* Also check if the format can be sampled from */
1027 if (screen->is_format_supported(screen, template->format,
1028 template->target,
1029 template->nr_samples,
1030 template->nr_storage_samples,
1031 PIPE_BIND_SAMPLER_VIEW)) {
1032 bindings |= PIPE_BIND_SAMPLER_VIEW;
1033 }
1034 }
1035
1036 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
1037 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
1038 tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
1039
1040 if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
1041 /* Also check if the format is color renderable */
1042 if (screen->is_format_supported(screen, template->format,
1043 template->target,
1044 template->nr_samples,
1045 template->nr_storage_samples,
1046 PIPE_BIND_RENDER_TARGET)) {
1047 bindings |= PIPE_BIND_RENDER_TARGET;
1048 }
1049 }
1050
1051 if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) {
1052 /* Also check if the format is depth/stencil renderable */
1053 if (screen->is_format_supported(screen, template->format,
1054 template->target,
1055 template->nr_samples,
1056 template->nr_storage_samples,
1057 PIPE_BIND_DEPTH_STENCIL)) {
1058 bindings |= PIPE_BIND_DEPTH_STENCIL;
1059 }
1060 }
1061 }
1062
1063 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
1064 tex->key.cachable = 0;
1065 }
1066
1067 if (bindings & PIPE_BIND_SHARED) {
1068 tex->key.cachable = 0;
1069 }
1070
1071 if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
1072 tex->key.scanout = 1;
1073 tex->key.cachable = 0;
1074 }
1075
1076 /*
1077 * Note: Previously we never passed the
1078 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1079 * know beforehand whether a texture will be used as a rendertarget or not
1080 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1081 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1082 *
1083 * However, this was changed since other gallium frontends
1084 * (XA for example) uses it accurately and certain device versions
1085 * relies on it in certain situations to render correctly.
1086 */
1087 if ((bindings & PIPE_BIND_RENDER_TARGET) &&
1088 !util_format_is_s3tc(template->format)) {
1089 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1090 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1091 }
1092
1093 if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1094 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1095 tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1096 }
1097
1098 tex->key.numMipLevels = template->last_level + 1;
1099
1100 tex->key.format = svga_translate_format(svgascreen, template->format,
1101 bindings);
1102 if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1103 goto fail;
1104 }
1105
1106 /* Use typeless formats for sRGB and depth resources. Typeless
1107 * formats can be reinterpreted as other formats. For example,
1108 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1109 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1110 */
1111 if (svgascreen->sws->have_vgpu10 &&
1112 (util_format_is_srgb(template->format) ||
1113 format_has_depth(template->format))) {
1114 SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1115 if (0) {
1116 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1117 svga_format_name(tex->key.format),
1118 svga_format_name(typeless),
1119 bindings);
1120 }
1121
1122 if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1123 /* We can't normally render to snorm surfaces, but once we
1124 * substitute a typeless format, we can if the rendertarget view
1125 * is unorm. This can happen with GL_ARB_copy_image.
1126 */
1127 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1128 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1129 }
1130
1131 tex->key.format = typeless;
1132 }
1133
1134 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1135 tex->handle = svga_screen_surface_create(svgascreen, bindings,
1136 tex->b.b.usage,
1137 &tex->validated, &tex->key);
1138 if (!tex->handle) {
1139 goto fail;
1140 }
1141
1142 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
1143
1144 debug_reference(&tex->b.b.reference,
1145 (debug_reference_descriptor)debug_describe_resource, 0);
1146
1147 tex->size = util_resource_size(template);
1148
1149 /* Determine if texture upload buffer can be used to upload this texture */
1150 tex->can_use_upload = svga_texture_transfer_map_can_upload(svgascreen,
1151 &tex->b.b);
1152
1153 /* Initialize the backing resource cache */
1154 tex->backed_handle = NULL;
1155
1156 svgascreen->hud.total_resource_bytes += tex->size;
1157 svgascreen->hud.num_resources++;
1158
1159 SVGA_STATS_TIME_POP(svgascreen->sws);
1160
1161 return &tex->b.b;
1162
1163 fail:
1164 if (tex->dirty)
1165 FREE(tex->dirty);
1166 if (tex->rendered_to)
1167 FREE(tex->rendered_to);
1168 if (tex->defined)
1169 FREE(tex->defined);
1170 FREE(tex);
1171 fail_notex:
1172 SVGA_STATS_TIME_POP(svgascreen->sws);
1173 return NULL;
1174 }
1175
1176
1177 struct pipe_resource *
1178 svga_texture_from_handle(struct pipe_screen *screen,
1179 const struct pipe_resource *template,
1180 struct winsys_handle *whandle)
1181 {
1182 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1183 struct svga_screen *ss = svga_screen(screen);
1184 struct svga_winsys_surface *srf;
1185 struct svga_texture *tex;
1186 enum SVGA3dSurfaceFormat format = 0;
1187 assert(screen);
1188
1189 /* Only supports one type */
1190 if ((template->target != PIPE_TEXTURE_2D &&
1191 template->target != PIPE_TEXTURE_RECT) ||
1192 template->last_level != 0 ||
1193 template->depth0 != 1) {
1194 return NULL;
1195 }
1196
1197 srf = sws->surface_from_handle(sws, whandle, &format);
1198
1199 if (!srf)
1200 return NULL;
1201
1202 if (!svga_format_is_shareable(ss, template->format, format,
1203 template->bind, true))
1204 goto out_unref;
1205
1206 tex = CALLOC_STRUCT(svga_texture);
1207 if (!tex)
1208 goto out_unref;
1209
1210 tex->defined = CALLOC(template->depth0 * template->array_size,
1211 sizeof(tex->defined[0]));
1212 if (!tex->defined)
1213 goto out_no_defined;
1214
1215 tex->b.b = *template;
1216 tex->b.vtbl = &svga_texture_vtbl;
1217 pipe_reference_init(&tex->b.b.reference, 1);
1218 tex->b.b.screen = screen;
1219
1220 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1221
1222 tex->key.cachable = 0;
1223 tex->key.format = format;
1224 tex->handle = srf;
1225
1226 tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1227 if (!tex->rendered_to)
1228 goto out_no_rendered_to;
1229
1230 tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1231 if (!tex->dirty)
1232 goto out_no_dirty;
1233
1234 tex->imported = TRUE;
1235
1236 ss->hud.num_resources++;
1237
1238 return &tex->b.b;
1239
1240 out_no_dirty:
1241 FREE(tex->rendered_to);
1242 out_no_rendered_to:
1243 FREE(tex->defined);
1244 out_no_defined:
1245 FREE(tex);
1246 out_unref:
1247 sws->surface_reference(sws, &srf, NULL);
1248 return NULL;
1249 }
1250
1251 bool
1252 svga_texture_generate_mipmap(struct pipe_context *pipe,
1253 struct pipe_resource *pt,
1254 enum pipe_format format,
1255 unsigned base_level,
1256 unsigned last_level,
1257 unsigned first_layer,
1258 unsigned last_layer)
1259 {
1260 struct pipe_sampler_view templ, *psv;
1261 struct svga_pipe_sampler_view *sv;
1262 struct svga_context *svga = svga_context(pipe);
1263 struct svga_texture *tex = svga_texture(pt);
1264
1265 assert(svga_have_vgpu10(svga));
1266
1267 /* Only support 2D texture for now */
1268 if (pt->target != PIPE_TEXTURE_2D)
1269 return false;
1270
1271 /* Fallback to the mipmap generation utility for those formats that
1272 * do not support hw generate mipmap
1273 */
1274 if (!svga_format_support_gen_mips(format))
1275 return false;
1276
1277 /* Make sure the texture surface was created with
1278 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1279 */
1280 if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1281 return false;
1282
1283 templ.format = format;
1284 templ.u.tex.first_layer = first_layer;
1285 templ.u.tex.last_layer = last_layer;
1286 templ.u.tex.first_level = base_level;
1287 templ.u.tex.last_level = last_level;
1288
1289 psv = pipe->create_sampler_view(pipe, pt, &templ);
1290 if (psv == NULL)
1291 return false;
1292
1293 sv = svga_pipe_sampler_view(psv);
1294 SVGA_RETRY(svga, svga_validate_pipe_sampler_view(svga, sv));
1295
1296 SVGA_RETRY(svga, SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle));
1297 pipe_sampler_view_reference(&psv, NULL);
1298
1299 svga->hud.num_generate_mipmap++;
1300
1301 return true;
1302 }
1303
1304
1305 /* texture upload buffer default size in bytes */
1306 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1307
1308 /**
1309 * Create a texture upload buffer
1310 */
1311 boolean
1312 svga_texture_transfer_map_upload_create(struct svga_context *svga)
1313 {
1314 svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE,
1315 PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING, 0);
1316 if (svga->tex_upload)
1317 u_upload_disable_persistent(svga->tex_upload);
1318
1319 return svga->tex_upload != NULL;
1320 }
1321
1322
1323 /**
1324 * Destroy the texture upload buffer
1325 */
1326 void
1327 svga_texture_transfer_map_upload_destroy(struct svga_context *svga)
1328 {
1329 u_upload_destroy(svga->tex_upload);
1330 }
1331
1332
1333 /**
1334 * Returns true if this transfer map request can use the upload buffer.
1335 */
1336 boolean
1337 svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
1338 const struct pipe_resource *texture)
1339 {
1340 if (svgascreen->sws->have_transfer_from_buffer_cmd == FALSE)
1341 return FALSE;
1342
1343 /* TransferFromBuffer command is not well supported with multi-samples surface */
1344 if (texture->nr_samples > 1)
1345 return FALSE;
1346
1347 if (util_format_is_compressed(texture->format)) {
1348 /* XXX Need to take a closer look to see why texture upload
1349 * with 3D texture with compressed format fails
1350 */
1351 if (texture->target == PIPE_TEXTURE_3D)
1352 return FALSE;
1353 }
1354 else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
1355 return FALSE;
1356 }
1357
1358 return TRUE;
1359 }
1360
1361
1362 /**
1363 * Use upload buffer for the transfer map request.
1364 */
1365 void *
1366 svga_texture_transfer_map_upload(struct svga_context *svga,
1367 struct svga_transfer *st)
1368 {
1369 struct pipe_resource *texture = st->base.resource;
1370 struct pipe_resource *tex_buffer = NULL;
1371 void *tex_map;
1372 unsigned nblocksx, nblocksy;
1373 unsigned offset;
1374 unsigned upload_size;
1375
1376 assert(svga->tex_upload);
1377
1378 st->upload.box.x = st->base.box.x;
1379 st->upload.box.y = st->base.box.y;
1380 st->upload.box.z = st->base.box.z;
1381 st->upload.box.w = st->base.box.width;
1382 st->upload.box.h = st->base.box.height;
1383 st->upload.box.d = st->base.box.depth;
1384 st->upload.nlayers = 1;
1385
1386 switch (texture->target) {
1387 case PIPE_TEXTURE_CUBE:
1388 st->upload.box.z = 0;
1389 break;
1390 case PIPE_TEXTURE_2D_ARRAY:
1391 case PIPE_TEXTURE_CUBE_ARRAY:
1392 st->upload.nlayers = st->base.box.depth;
1393 st->upload.box.z = 0;
1394 st->upload.box.d = 1;
1395 break;
1396 case PIPE_TEXTURE_1D_ARRAY:
1397 st->upload.nlayers = st->base.box.depth;
1398 st->upload.box.y = st->upload.box.z = 0;
1399 st->upload.box.d = 1;
1400 break;
1401 default:
1402 break;
1403 }
1404
1405 nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
1406 nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
1407
1408 st->base.stride = nblocksx * util_format_get_blocksize(texture->format);
1409 st->base.layer_stride = st->base.stride * nblocksy;
1410
1411 /* In order to use the TransferFromBuffer command to update the
1412 * texture content from the buffer, the layer stride for a multi-layers
1413 * surface needs to be in multiples of 16 bytes.
1414 */
1415 if (st->upload.nlayers > 1 && st->base.layer_stride & 15)
1416 return NULL;
1417
1418 upload_size = st->base.layer_stride * st->base.box.depth;
1419 upload_size = align(upload_size, 16);
1420
1421 #ifdef DEBUG
1422 if (util_format_is_compressed(texture->format)) {
1423 struct svga_texture *tex = svga_texture(texture);
1424 unsigned blockw, blockh, bytesPerBlock;
1425
1426 svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock);
1427
1428 /* dest box must start on block boundary */
1429 assert((st->base.box.x % blockw) == 0);
1430 assert((st->base.box.y % blockh) == 0);
1431 }
1432 #endif
1433
1434 /* If the upload size exceeds the default buffer size, the
1435 * upload buffer manager code will try to allocate a new buffer
1436 * with the new buffer size.
1437 */
1438 u_upload_alloc(svga->tex_upload, 0, upload_size, 16,
1439 &offset, &tex_buffer, &tex_map);
1440
1441 if (!tex_map) {
1442 return NULL;
1443 }
1444
1445 st->upload.buf = tex_buffer;
1446 st->upload.map = tex_map;
1447 st->upload.offset = offset;
1448
1449 return tex_map;
1450 }
1451
1452
1453 /**
1454 * Unmap upload map transfer request
1455 */
1456 void
1457 svga_texture_transfer_unmap_upload(struct svga_context *svga,
1458 struct svga_transfer *st)
1459 {
1460 struct svga_winsys_surface *srcsurf;
1461 struct svga_winsys_surface *dstsurf;
1462 struct pipe_resource *texture = st->base.resource;
1463 struct svga_texture *tex = svga_texture(texture);
1464 unsigned subResource;
1465 unsigned numMipLevels;
1466 unsigned i, layer;
1467 unsigned offset = st->upload.offset;
1468
1469 assert(svga->tex_upload);
1470 assert(st->upload.buf);
1471
1472 /* unmap the texture upload buffer */
1473 u_upload_unmap(svga->tex_upload);
1474
1475 srcsurf = svga_buffer_handle(svga, st->upload.buf, 0);
1476 dstsurf = svga_texture(texture)->handle;
1477 assert(dstsurf);
1478
1479 numMipLevels = texture->last_level + 1;
1480
1481 for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) {
1482 subResource = layer * numMipLevels + st->base.level;
1483
1484 /* send a transferFromBuffer command to update the host texture surface */
1485 assert((offset & 15) == 0);
1486
1487 SVGA_RETRY(svga, SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1488 offset,
1489 st->base.stride,
1490 st->base.layer_stride,
1491 dstsurf, subResource,
1492 &st->upload.box));
1493 offset += st->base.layer_stride;
1494
1495 /* Set rendered-to flag */
1496 svga_set_texture_rendered_to(tex, layer, st->base.level);
1497 }
1498
1499 pipe_resource_reference(&st->upload.buf, NULL);
1500 }
1501
1502 /**
1503 * Does the device format backing this surface have an
1504 * alpha channel?
1505 *
1506 * \param texture[in] The texture whose format we're querying
1507 * \return TRUE if the format has an alpha channel, FALSE otherwise
1508 *
1509 * For locally created textures, the device (svga) format is typically
1510 * identical to svga_format(texture->format), and we can use the gallium
1511 * format tests to determine whether the device format has an alpha channel
1512 * or not. However, for textures backed by imported svga surfaces that is
1513 * not always true, and we have to look at the SVGA3D utilities.
1514 */
1515 boolean
1516 svga_texture_device_format_has_alpha(struct pipe_resource *texture)
1517 {
1518 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1519 assert(texture->target != PIPE_BUFFER);
1520
1521 enum svga3d_block_desc block_desc =
1522 svga3dsurface_get_desc(svga_texture(texture)->key.format)->block_desc;
1523
1524 return !!(block_desc & SVGA3DBLOCKDESC_ALPHA);
1525 }