src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35
  36 #include "svga_screen.h"
  37 #include "svga_context.h"
  38 #include "svga_resource_texture.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_sampler_view.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
  46  * know about primary surfaces. Find a better way to accomplish this.
  47  */
  48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
  49
  50
  51 static unsigned int
  52 svga_texture_is_referenced( struct pipe_context *pipe,
  53                             struct pipe_resource *texture,
  54                             unsigned face, unsigned level)
  55 {
  56    struct svga_texture *tex = svga_texture(texture);
  57    struct svga_screen *ss = svga_screen(pipe->screen);
  58
  59    /**
  60     * The screen does not cache texture writes.
  61     */
  62
  63    if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle))
  64       return PIPE_UNREFERENCED;
  65
  66    /**
  67     * sws->surface_is_flushed() does not distinguish between read references
  68     * and write references. So assume a reference is both.
  69     */
  70
  71    return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
  72 }
  73
  74
  75
  76 /*
  77  * Helper function and arrays
  78  */
  79
  80 SVGA3dSurfaceFormat
  81 svga_translate_format(enum pipe_format format)
  82 {
  83    switch(format) {
  84
  85    case PIPE_FORMAT_B8G8R8A8_UNORM:
  86       return SVGA3D_A8R8G8B8;
  87    case PIPE_FORMAT_B8G8R8X8_UNORM:
  88       return SVGA3D_X8R8G8B8;
  89
  90       /* Required for GL2.1:
  91        */
  92    case PIPE_FORMAT_B8G8R8A8_SRGB:
  93       return SVGA3D_A8R8G8B8;
  94
  95    case PIPE_FORMAT_B5G6R5_UNORM:
  96       return SVGA3D_R5G6B5;
  97    case PIPE_FORMAT_B5G5R5A1_UNORM:
  98       return SVGA3D_A1R5G5B5;
  99    case PIPE_FORMAT_B4G4R4A4_UNORM:
 100       return SVGA3D_A4R4G4B4;
 101
 102
 103    /* XXX: Doesn't seem to work properly.
 104    case PIPE_FORMAT_Z32_UNORM:
 105       return SVGA3D_Z_D32;
 106     */
 107    case PIPE_FORMAT_Z16_UNORM:
 108       return SVGA3D_Z_D16;
 109    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 110       return SVGA3D_Z_D24S8;
 111    case PIPE_FORMAT_X8Z24_UNORM:
 112       return SVGA3D_Z_D24X8;
 113
 114    case PIPE_FORMAT_A8_UNORM:
 115       return SVGA3D_ALPHA8;
 116    case PIPE_FORMAT_L8_UNORM:
 117       return SVGA3D_LUMINANCE8;
 118
 119    case PIPE_FORMAT_DXT1_RGB:
 120    case PIPE_FORMAT_DXT1_RGBA:
 121       return SVGA3D_DXT1;
 122    case PIPE_FORMAT_DXT3_RGBA:
 123       return SVGA3D_DXT3;
 124    case PIPE_FORMAT_DXT5_RGBA:
 125       return SVGA3D_DXT5;
 126
 127    default:
 128       return SVGA3D_FORMAT_INVALID;
 129    }
 130 }
 131
 132
 133 SVGA3dSurfaceFormat
 134 svga_translate_format_render(enum pipe_format format)
 135 {
 136    switch(format) {
 137    case PIPE_FORMAT_B8G8R8A8_UNORM:
 138    case PIPE_FORMAT_B8G8R8X8_UNORM:
 139    case PIPE_FORMAT_B5G5R5A1_UNORM:
 140    case PIPE_FORMAT_B4G4R4A4_UNORM:
 141    case PIPE_FORMAT_B5G6R5_UNORM:
 142    case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
 143    case PIPE_FORMAT_X8Z24_UNORM:
 144    case PIPE_FORMAT_Z32_UNORM:
 145    case PIPE_FORMAT_Z16_UNORM:
 146    case PIPE_FORMAT_L8_UNORM:
 147       return svga_translate_format(format);
 148
 149 #if 1
 150    /* For on host conversion */
 151    case PIPE_FORMAT_DXT1_RGB:
 152       return SVGA3D_X8R8G8B8;
 153    case PIPE_FORMAT_DXT1_RGBA:
 154    case PIPE_FORMAT_DXT3_RGBA:
 155    case PIPE_FORMAT_DXT5_RGBA:
 156       return SVGA3D_A8R8G8B8;
 157 #endif
 158
 159    default:
 160       return SVGA3D_FORMAT_INVALID;
 161    }
 162 }
 163
 164
 165 static INLINE void
 166 svga_transfer_dma_band(struct svga_transfer *st,
 167                        SVGA3dTransferType transfer,
 168                        unsigned y, unsigned h, unsigned srcy)
 169 {
 170    struct svga_texture *texture = svga_texture(st->base.resource);
 171    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 172    SVGA3dCopyBox box;
 173    enum pipe_error ret;
 174
 175    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
 176                 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
 177                 texture->handle,
 178                 st->base.sr.face,
 179                 st->base.box.x,
 180                 y,
 181                 st->base.box.z,
 182                 st->base.box.x + st->base.box.width,
 183                 y + h,
 184                 st->base.box.z + 1,
 185                 util_format_get_blocksize(texture->b.b.format) * 8 /
 186                 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
 187
 188    box.x = st->base.box.x;
 189    box.y = y;
 190    box.z = st->base.box.z;
 191    box.w = st->base.box.width;
 192    box.h = h;
 193    box.d = 1;
 194    box.srcx = 0;
 195    box.srcy = srcy;
 196    box.srcz = 0;
 197
 198    pipe_mutex_lock(screen->swc_mutex);
 199    ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
 200    if(ret != PIPE_OK) {
 201       screen->swc->flush(screen->swc, NULL);
 202       ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
 203       assert(ret == PIPE_OK);
 204    }
 205    pipe_mutex_unlock(screen->swc_mutex);
 206 }
 207
 208
 209 static INLINE void
 210 svga_transfer_dma(struct svga_transfer *st,
 211                  SVGA3dTransferType transfer)
 212 {
 213    struct svga_texture *texture = svga_texture(st->base.resource);
 214    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 215    struct svga_winsys_screen *sws = screen->sws;
 216    struct pipe_fence_handle *fence = NULL;
 217
 218    if (transfer == SVGA3D_READ_HOST_VRAM) {
 219       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 220    }
 221
 222
 223    if(!st->swbuf) {
 224       /* Do the DMA transfer in a single go */
 225
 226       svga_transfer_dma_band(st, transfer, st->base.box.y, st->base.box.height, 0);
 227
 228       if(transfer == SVGA3D_READ_HOST_VRAM) {
 229          svga_screen_flush(screen, &fence);
 230          sws->fence_finish(sws, fence, 0);
 231          sws->fence_reference(sws, &fence, NULL);
 232       }
 233    }
 234    else {
 235       unsigned y, h, srcy;
 236       unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
 237       h = st->hw_nblocksy * blockheight;
 238       srcy = 0;
 239       for(y = 0; y < st->base.box.height; y += h) {
 240          unsigned offset, length;
 241          void *hw, *sw;
 242
 243          if (y + h > st->base.box.height)
 244             h = st->base.box.height - y;
 245
 246          /* Transfer band must be aligned to pixel block boundaries */
 247          assert(y % blockheight == 0);
 248          assert(h % blockheight == 0);
 249
 250          offset = y * st->base.stride / blockheight;
 251          length = h * st->base.stride / blockheight;
 252
 253          sw = (uint8_t *)st->swbuf + offset;
 254
 255          if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 256             /* Wait for the previous DMAs to complete */
 257             /* TODO: keep one DMA (at half the size) in the background */
 258             if(y) {
 259                svga_screen_flush(screen, &fence);
 260                sws->fence_finish(sws, fence, 0);
 261                sws->fence_reference(sws, &fence, NULL);
 262             }
 263
 264             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE);
 265             assert(hw);
 266             if(hw) {
 267                memcpy(hw, sw, length);
 268                sws->buffer_unmap(sws, st->hwbuf);
 269             }
 270          }
 271
 272          svga_transfer_dma_band(st, transfer, y, h, srcy);
 273
 274          if(transfer == SVGA3D_READ_HOST_VRAM) {
 275             svga_screen_flush(screen, &fence);
 276             sws->fence_finish(sws, fence, 0);
 277
 278             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 279             assert(hw);
 280             if(hw) {
 281                memcpy(sw, hw, length);
 282                sws->buffer_unmap(sws, st->hwbuf);
 283             }
 284          }
 285       }
 286    }
 287 }
 288
 289
 290
 291
 292
 293 static boolean
 294 svga_texture_get_handle(struct pipe_screen *screen,
 295                                struct pipe_resource *texture,
 296                                struct winsys_handle *whandle)
 297 {
 298    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 299    unsigned stride;
 300
 301    assert(svga_texture(texture)->key.cachable == 0);
 302    svga_texture(texture)->key.cachable = 0;
 303    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 304             util_format_get_blocksize(texture->format);
 305    return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
 306 }
 307
 308
 309 static void
 310 svga_texture_destroy(struct pipe_screen *screen,
 311                      struct pipe_resource *pt)
 312 {
 313    struct svga_screen *ss = svga_screen(screen);
 314    struct svga_texture *tex = (struct svga_texture *)pt;
 315
 316    ss->texture_timestamp++;
 317
 318    svga_sampler_view_reference(&tex->cached_view, NULL);
 319
 320    /*
 321      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 322    */
 323    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 324    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 325
 326    FREE(tex);
 327 }
 328
 329
 330
 331
 332
 333
 334
 335 /* XXX: Still implementing this as if it was a screen function, but
 336  * can now modify it to queue transfers on the context.
 337  */
 338 static struct pipe_transfer *
 339 svga_texture_get_transfer(struct pipe_context *pipe,
 340                           struct pipe_resource *texture,
 341                           struct pipe_subresource sr,
 342                           unsigned usage,
 343                           const struct pipe_box *box)
 344 {
 345    struct svga_screen *ss = svga_screen(pipe->screen);
 346    struct svga_winsys_screen *sws = ss->sws;
 347    struct svga_transfer *st;
 348    unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
 349    unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
 350
 351    /* We can't map texture storage directly */
 352    if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
 353       return NULL;
 354
 355    st = CALLOC_STRUCT(svga_transfer);
 356    if (!st)
 357       return NULL;
 358
 359    pipe_resource_reference(&st->base.resource, texture);
 360    st->base.sr = sr;
 361    st->base.usage = usage;
 362    st->base.box = *box;
 363    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 364    st->base.slice_stride = 0;
 365
 366    st->hw_nblocksy = nblocksy;
 367
 368    st->hwbuf = svga_winsys_buffer_create(ss,
 369                                          1,
 370                                          0,
 371                                          st->hw_nblocksy*st->base.stride);
 372    while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
 373       st->hwbuf = svga_winsys_buffer_create(ss,
 374                                             1,
 375                                             0,
 376                                             st->hw_nblocksy*st->base.stride);
 377    }
 378
 379    if(!st->hwbuf)
 380       goto no_hwbuf;
 381
 382    if(st->hw_nblocksy < nblocksy) {
 383       /* We couldn't allocate a hardware buffer big enough for the transfer,
 384        * so allocate regular malloc memory instead */
 385       debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
 386                    __FUNCTION__,
 387                    (nblocksy*st->base.stride + 1023)/1024,
 388                    (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
 389                    (st->hw_nblocksy*st->base.stride + 1023)/1024);
 390       st->swbuf = MALLOC(nblocksy*st->base.stride);
 391       if(!st->swbuf)
 392          goto no_swbuf;
 393    }
 394
 395    if (usage & PIPE_TRANSFER_READ)
 396       svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
 397
 398    return &st->base;
 399
 400 no_swbuf:
 401    sws->buffer_destroy(sws, st->hwbuf);
 402 no_hwbuf:
 403    FREE(st);
 404    return NULL;
 405 }
 406
 407
 408 /* XXX: Still implementing this as if it was a screen function, but
 409  * can now modify it to queue transfers on the context.
 410  */
 411 static void *
 412 svga_texture_transfer_map( struct pipe_context *pipe,
 413                            struct pipe_transfer *transfer )
 414 {
 415    struct svga_screen *ss = svga_screen(pipe->screen);
 416    struct svga_winsys_screen *sws = ss->sws;
 417    struct svga_transfer *st = svga_transfer(transfer);
 418
 419    if(st->swbuf)
 420       return st->swbuf;
 421    else
 422       /* The wait for read transfers already happened when svga_transfer_dma
 423        * was called. */
 424       return sws->buffer_map(sws, st->hwbuf, transfer->usage);
 425 }
 426
 427
 428 /* XXX: Still implementing this as if it was a screen function, but
 429  * can now modify it to queue transfers on the context.
 430  */
 431 static void
 432 svga_texture_transfer_unmap(struct pipe_context *pipe,
 433                             struct pipe_transfer *transfer)
 434 {
 435    struct svga_screen *ss = svga_screen(pipe->screen);
 436    struct svga_winsys_screen *sws = ss->sws;
 437    struct svga_transfer *st = svga_transfer(transfer);
 438
 439    if(!st->swbuf)
 440       sws->buffer_unmap(sws, st->hwbuf);
 441 }
 442
 443
 444 static void
 445 svga_texture_transfer_destroy(struct pipe_context *pipe,
 446                               struct pipe_transfer *transfer)
 447 {
 448    struct svga_texture *tex = svga_texture(transfer->resource);
 449    struct svga_screen *ss = svga_screen(pipe->screen);
 450    struct svga_winsys_screen *sws = ss->sws;
 451    struct svga_transfer *st = svga_transfer(transfer);
 452
 453    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 454       svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
 455       ss->texture_timestamp++;
 456       tex->view_age[transfer->sr.level] = ++(tex->age);
 457       tex->defined[transfer->sr.face][transfer->sr.level] = TRUE;
 458    }
 459
 460    pipe_resource_reference(&st->base.resource, NULL);
 461    FREE(st->swbuf);
 462    sws->buffer_destroy(sws, st->hwbuf);
 463    FREE(st);
 464 }
 465
 466
 467
 468
 469
 470 struct u_resource_vtbl svga_texture_vtbl =
 471 {
 472    svga_texture_get_handle,           /* get_handle */
 473    svga_texture_destroy,              /* resource_destroy */
 474    svga_texture_is_referenced,        /* is_resource_referenced */
 475    svga_texture_get_transfer,         /* get_transfer */
 476    svga_texture_transfer_destroy,     /* transfer_destroy */
 477    svga_texture_transfer_map,         /* transfer_map */
 478    u_default_transfer_flush_region,   /* transfer_flush_region */
 479    svga_texture_transfer_unmap,       /* transfer_unmap */
 480    u_default_transfer_inline_write    /* transfer_inline_write */
 481 };
 482
 483
 484
 485
 486 struct pipe_resource *
 487 svga_texture_create(struct pipe_screen *screen,
 488                     const struct pipe_resource *template)
 489 {
 490    struct svga_screen *svgascreen = svga_screen(screen);
 491    struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
 492
 493    if (!tex)
 494       goto error1;
 495
 496    tex->b.b = *template;
 497    tex->b.vtbl = &svga_texture_vtbl;
 498    pipe_reference_init(&tex->b.b.reference, 1);
 499    tex->b.b.screen = screen;
 500
 501    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 502    if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
 503       goto error2;
 504
 505    tex->key.flags = 0;
 506    tex->key.size.width = template->width0;
 507    tex->key.size.height = template->height0;
 508    tex->key.size.depth = template->depth0;
 509
 510    if(template->target == PIPE_TEXTURE_CUBE) {
 511       tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 512       tex->key.numFaces = 6;
 513    }
 514    else {
 515       tex->key.numFaces = 1;
 516    }
 517
 518    tex->key.cachable = 1;
 519
 520    if (template->bind & PIPE_BIND_SAMPLER_VIEW)
 521       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 522
 523    if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
 524       tex->key.cachable = 0;
 525    }
 526
 527    if (template->bind & PIPE_BIND_SHARED) {
 528       tex->key.cachable = 0;
 529    }
 530
 531    if (template->bind & PIPE_BIND_SCANOUT) {
 532       tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
 533       tex->key.cachable = 0;
 534    }
 535
 536    /*
 537     * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
 538     * know beforehand whether a texture will be used as a rendertarget or not
 539     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
 540     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
 541     */
 542 #if 0
 543    if((template->bind & PIPE_BIND_RENDER_TARGET) &&
 544       !util_format_is_s3tc(template->format))
 545       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
 546 #endif
 547
 548    if(template->bind & PIPE_BIND_DEPTH_STENCIL)
 549       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
 550
 551    tex->key.numMipLevels = template->last_level + 1;
 552
 553    tex->key.format = svga_translate_format(template->format);
 554    if(tex->key.format == SVGA3D_FORMAT_INVALID)
 555       goto error2;
 556
 557    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
 558    tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
 559    if (tex->handle)
 560       SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
 561
 562    return &tex->b.b;
 563
 564 error2:
 565    FREE(tex);
 566 error1:
 567    return NULL;
 568 }
 569
 570
 571
 572
 573 struct pipe_resource *
 574 svga_texture_from_handle(struct pipe_screen *screen,
 575                          const struct pipe_resource *template,
 576                          struct winsys_handle *whandle)
 577 {
 578    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 579    struct svga_winsys_surface *srf;
 580    struct svga_texture *tex;
 581    enum SVGA3dSurfaceFormat format = 0;
 582    assert(screen);
 583
 584    /* Only supports one type */
 585    if (template->target != PIPE_TEXTURE_2D ||
 586        template->last_level != 0 ||
 587        template->depth0 != 1) {
 588       return NULL;
 589    }
 590
 591    srf = sws->surface_from_handle(sws, whandle, &format);
 592
 593    if (!srf)
 594       return NULL;
 595
 596    if (svga_translate_format(template->format) != format) {
 597       unsigned f1 = svga_translate_format(template->format);
 598       unsigned f2 = format;
 599
 600       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
 601       if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
 602               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
 603               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
 604          debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
 605          return NULL;
 606       }
 607    }
 608
 609    tex = CALLOC_STRUCT(svga_texture);
 610    if (!tex)
 611       return NULL;
 612
 613    tex->b.b = *template;
 614    tex->b.vtbl = &svga_texture_vtbl;
 615    pipe_reference_init(&tex->b.b.reference, 1);
 616    tex->b.b.screen = screen;
 617
 618    if (format == SVGA3D_X8R8G8B8)
 619       tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
 620    else if (format == SVGA3D_A8R8G8B8)
 621       tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
 622    else {
 623       /* ?? */
 624    }
 625
 626    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
 627
 628    tex->key.cachable = 0;
 629    tex->handle = srf;
 630
 631    return &tex->b.b;
 632 }
 633