Merge branch 'lp-offset-twoside'
[mesa.git] / src / gallium / drivers / svga / svga_screen.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "util/u_memory.h"
27 #include "util/u_inlines.h"
28 #include "util/u_string.h"
29 #include "util/u_math.h"
30
31 #include "svga_winsys.h"
32 #include "svga_public.h"
33 #include "svga_context.h"
34 #include "svga_screen.h"
35 #include "svga_resource_texture.h"
36 #include "svga_resource.h"
37 #include "svga_debug.h"
38 #include "svga_surface.h"
39
40 #include "svga3d_shaderdefs.h"
41
42
43 #ifdef DEBUG
44 int SVGA_DEBUG = 0;
45
46 static const struct debug_named_value svga_debug_flags[] = {
47 { "dma", DEBUG_DMA, NULL },
48 { "tgsi", DEBUG_TGSI, NULL },
49 { "pipe", DEBUG_PIPE, NULL },
50 { "state", DEBUG_STATE, NULL },
51 { "screen", DEBUG_SCREEN, NULL },
52 { "tex", DEBUG_TEX, NULL },
53 { "swtnl", DEBUG_SWTNL, NULL },
54 { "const", DEBUG_CONSTS, NULL },
55 { "viewport", DEBUG_VIEWPORT, NULL },
56 { "views", DEBUG_VIEWS, NULL },
57 { "perf", DEBUG_PERF, NULL },
58 { "flush", DEBUG_FLUSH, NULL },
59 { "sync", DEBUG_SYNC, NULL },
60 { "cache", DEBUG_CACHE, NULL },
61 DEBUG_NAMED_VALUE_END
62 };
63 #endif
64
65 static const char *
66 svga_get_vendor( struct pipe_screen *pscreen )
67 {
68 return "VMware, Inc.";
69 }
70
71
72 static const char *
73 svga_get_name( struct pipe_screen *pscreen )
74 {
75 #ifdef DEBUG
76 /* Only return internal details in the DEBUG version:
77 */
78 return "SVGA3D; build: DEBUG; mutex: " PIPE_ATOMIC;
79 #else
80 return "SVGA3D; build: RELEASE; ";
81 #endif
82 }
83
84
85
86
87 static float
88 svga_get_paramf(struct pipe_screen *screen, enum pipe_cap param)
89 {
90 struct svga_screen *svgascreen = svga_screen(screen);
91 struct svga_winsys_screen *sws = svgascreen->sws;
92 SVGA3dDevCapResult result;
93
94 switch (param) {
95 case PIPE_CAP_MAX_LINE_WIDTH:
96 /* fall-through */
97 case PIPE_CAP_MAX_LINE_WIDTH_AA:
98 return 7.0;
99
100 case PIPE_CAP_MAX_POINT_WIDTH:
101 /* fall-through */
102 case PIPE_CAP_MAX_POINT_WIDTH_AA:
103 /* Keep this to a reasonable size to avoid failures in
104 * conform/pntaa.c:
105 */
106 return SVGA_MAX_POINTSIZE;
107
108 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
109 if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, &result))
110 return 4.0;
111 return result.u;
112
113 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
114 return 16.0;
115
116 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
117 return 16;
118 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
119 return 16;
120 case PIPE_CAP_NPOT_TEXTURES:
121 return 1;
122 case PIPE_CAP_TWO_SIDED_STENCIL:
123 return 1;
124 case PIPE_CAP_GLSL:
125 return svgascreen->use_ps30 && svgascreen->use_vs30;
126 case PIPE_CAP_ANISOTROPIC_FILTER:
127 return 1;
128 case PIPE_CAP_POINT_SPRITE:
129 return 1;
130 case PIPE_CAP_MAX_RENDER_TARGETS:
131 if(!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_RENDER_TARGETS, &result))
132 return 1;
133 if(!result.u)
134 return 1;
135 return MIN2(result.u, PIPE_MAX_COLOR_BUFS);
136 case PIPE_CAP_OCCLUSION_QUERY:
137 return 1;
138 case PIPE_CAP_TIMER_QUERY:
139 return 0;
140 case PIPE_CAP_TEXTURE_SHADOW_MAP:
141 return 1;
142
143 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
144 {
145 unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
146 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
147 levels = MIN2(util_logbase2(result.u) + 1, levels);
148 else
149 levels = 12 /* 2048x2048 */;
150 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
151 levels = MIN2(util_logbase2(result.u) + 1, levels);
152 else
153 levels = 12 /* 2048x2048 */;
154 return levels;
155 }
156
157 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
158 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
159 return 8; /* max 128x128x128 */
160 return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
161
162 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
163 /*
164 * No mechanism to query the host, and at least limited to 2048x2048 on
165 * certain hardware.
166 */
167 return MIN2(screen->get_paramf(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
168 12.0 /* 2048x2048 */);
169
170 case PIPE_CAP_TEXTURE_MIRROR_REPEAT: /* req. for GL 1.4 */
171 return 1;
172
173 case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
174 return 1;
175
176 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
177 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
178 return 1;
179 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
180 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
181 return 0;
182
183 case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
184 return 1;
185
186 default:
187 return 0;
188 }
189 }
190
191
192 /* This is a fairly pointless interface
193 */
194 static int
195 svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
196 {
197 return (int) svga_get_paramf( screen, param );
198 }
199
200 static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
201 {
202 struct svga_screen *svgascreen = svga_screen(screen);
203 struct svga_winsys_screen *sws = svgascreen->sws;
204 SVGA3dDevCapResult result;
205
206 switch (shader)
207 {
208 case PIPE_SHADER_FRAGMENT:
209 switch (param)
210 {
211 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
212 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
213 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
214 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
215 return svgascreen->use_ps30 ? 512 : 96;
216 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
217 return SVGA3D_MAX_NESTING_LEVEL;
218 case PIPE_SHADER_CAP_MAX_INPUTS:
219 return 10;
220 case PIPE_SHADER_CAP_MAX_CONSTS:
221 return svgascreen->use_ps30 ? 224 : 16;
222 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
223 return 1;
224 case PIPE_SHADER_CAP_MAX_TEMPS:
225 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
226 return svgascreen->use_ps30 ? 32 : 12;
227 return result.u;
228 case PIPE_SHADER_CAP_MAX_ADDRS:
229 return svgascreen->use_ps30 ? 1 : 0;
230 case PIPE_SHADER_CAP_MAX_PREDS:
231 return svgascreen->use_ps30 ? 1 : 0;
232 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
233 return 1;
234 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
235 return svgascreen->use_ps30 ? 1 : 0;
236 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
237 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
238 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
239 return 0;
240 }
241 break;
242 case PIPE_SHADER_VERTEX:
243 switch (param)
244 {
245 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
246 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
247 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS, &result))
248 return svgascreen->use_vs30 ? 512 : 256;
249 return result.u;
250 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
251 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
252 /* XXX: until we have vertex texture support */
253 return 0;
254 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
255 return SVGA3D_MAX_NESTING_LEVEL;
256 case PIPE_SHADER_CAP_MAX_INPUTS:
257 return 16;
258 case PIPE_SHADER_CAP_MAX_CONSTS:
259 return 256;
260 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
261 return 1;
262 case PIPE_SHADER_CAP_MAX_TEMPS:
263 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
264 return svgascreen->use_vs30 ? 32 : 12;
265 return result.u;
266 case PIPE_SHADER_CAP_MAX_ADDRS:
267 return svgascreen->use_vs30 ? 1 : 0;
268 case PIPE_SHADER_CAP_MAX_PREDS:
269 return svgascreen->use_vs30 ? 1 : 0;
270 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
271 return 1;
272 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
273 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
274 return svgascreen->use_vs30 ? 1 : 0;
275 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
276 return 0;
277 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
278 return 1;
279 default:
280 break;
281 }
282 break;
283 default:
284 break;
285 }
286 return 0;
287 }
288
289 static INLINE SVGA3dDevCapIndex
290 svga_translate_format_cap(enum pipe_format format)
291 {
292 switch(format) {
293
294 case PIPE_FORMAT_B8G8R8A8_UNORM:
295 return SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8;
296 case PIPE_FORMAT_B8G8R8X8_UNORM:
297 return SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8;
298
299 case PIPE_FORMAT_B5G6R5_UNORM:
300 return SVGA3D_DEVCAP_SURFACEFMT_R5G6B5;
301 case PIPE_FORMAT_B5G5R5A1_UNORM:
302 return SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5;
303 case PIPE_FORMAT_B4G4R4A4_UNORM:
304 return SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4;
305
306 case PIPE_FORMAT_Z16_UNORM:
307 return SVGA3D_DEVCAP_SURFACEFMT_Z_D16;
308 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
309 return SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8;
310 case PIPE_FORMAT_X8Z24_UNORM:
311 return SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8;
312
313 case PIPE_FORMAT_A8_UNORM:
314 return SVGA3D_DEVCAP_SURFACEFMT_ALPHA8;
315 case PIPE_FORMAT_L8_UNORM:
316 return SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8;
317
318 case PIPE_FORMAT_DXT1_RGB:
319 case PIPE_FORMAT_DXT1_RGBA:
320 return SVGA3D_DEVCAP_SURFACEFMT_DXT1;
321 case PIPE_FORMAT_DXT3_RGBA:
322 return SVGA3D_DEVCAP_SURFACEFMT_DXT3;
323 case PIPE_FORMAT_DXT5_RGBA:
324 return SVGA3D_DEVCAP_SURFACEFMT_DXT5;
325
326 default:
327 return SVGA3D_DEVCAP_MAX;
328 }
329 }
330
331
332 static boolean
333 svga_is_format_supported( struct pipe_screen *screen,
334 enum pipe_format format,
335 enum pipe_texture_target target,
336 unsigned sample_count,
337 unsigned tex_usage,
338 unsigned geom_flags )
339 {
340 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
341 SVGA3dDevCapIndex index;
342 SVGA3dDevCapResult result;
343
344 assert(tex_usage);
345
346 if (sample_count > 1)
347 return FALSE;
348
349 /* Override host capabilities */
350 if (tex_usage & PIPE_BIND_RENDER_TARGET) {
351 switch(format) {
352
353 /* Often unsupported/problematic. This means we end up with the same
354 * visuals for all virtual hardware implementations.
355 */
356 case PIPE_FORMAT_B4G4R4A4_UNORM:
357 case PIPE_FORMAT_B5G5R5A1_UNORM:
358 return FALSE;
359
360 /* Simulate ability to render into compressed textures */
361 case PIPE_FORMAT_DXT1_RGB:
362 case PIPE_FORMAT_DXT1_RGBA:
363 case PIPE_FORMAT_DXT3_RGBA:
364 case PIPE_FORMAT_DXT5_RGBA:
365 return TRUE;
366
367 default:
368 break;
369 }
370 }
371
372 /* Try to query the host */
373 index = svga_translate_format_cap(format);
374 if( index < SVGA3D_DEVCAP_MAX &&
375 sws->get_cap(sws, index, &result) )
376 {
377 SVGA3dSurfaceFormatCaps mask;
378
379 mask.value = 0;
380 if (tex_usage & PIPE_BIND_RENDER_TARGET)
381 mask.offscreenRenderTarget = 1;
382 if (tex_usage & PIPE_BIND_DEPTH_STENCIL)
383 mask.zStencil = 1;
384 if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
385 mask.texture = 1;
386
387 if ((result.u & mask.value) == mask.value)
388 return TRUE;
389 else
390 return FALSE;
391 }
392
393 /* Use our translate functions directly rather than relying on a
394 * duplicated list of supported formats which is prone to getting
395 * out of sync:
396 */
397 if(tex_usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL))
398 return svga_translate_format_render(format) != SVGA3D_FORMAT_INVALID;
399 else
400 return svga_translate_format(format) != SVGA3D_FORMAT_INVALID;
401 }
402
403
404 static void
405 svga_fence_reference(struct pipe_screen *screen,
406 struct pipe_fence_handle **ptr,
407 struct pipe_fence_handle *fence)
408 {
409 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
410 sws->fence_reference(sws, ptr, fence);
411 }
412
413
414 static int
415 svga_fence_signalled(struct pipe_screen *screen,
416 struct pipe_fence_handle *fence,
417 unsigned flag)
418 {
419 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
420 return sws->fence_signalled(sws, fence, flag);
421 }
422
423
424 static int
425 svga_fence_finish(struct pipe_screen *screen,
426 struct pipe_fence_handle *fence,
427 unsigned flag)
428 {
429 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
430
431 SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
432 __FUNCTION__, fence);
433
434 return sws->fence_finish(sws, fence, flag);
435 }
436
437
438 static void
439 svga_destroy_screen( struct pipe_screen *screen )
440 {
441 struct svga_screen *svgascreen = svga_screen(screen);
442
443 svga_screen_cache_cleanup(svgascreen);
444
445 pipe_mutex_destroy(svgascreen->swc_mutex);
446 pipe_mutex_destroy(svgascreen->tex_mutex);
447
448 svgascreen->sws->destroy(svgascreen->sws);
449
450 FREE(svgascreen);
451 }
452
453
454 /**
455 * Create a new svga_screen object
456 */
457 struct pipe_screen *
458 svga_screen_create(struct svga_winsys_screen *sws)
459 {
460 struct svga_screen *svgascreen;
461 struct pipe_screen *screen;
462 SVGA3dDevCapResult result;
463
464 #ifdef DEBUG
465 SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
466 #endif
467
468 svgascreen = CALLOC_STRUCT(svga_screen);
469 if (!svgascreen)
470 goto error1;
471
472 svgascreen->debug.force_level_surface_view =
473 debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
474 svgascreen->debug.force_surface_view =
475 debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
476 svgascreen->debug.force_sampler_view =
477 debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
478 svgascreen->debug.no_surface_view =
479 debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
480 svgascreen->debug.no_sampler_view =
481 debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
482
483 screen = &svgascreen->screen;
484
485 screen->destroy = svga_destroy_screen;
486 screen->get_name = svga_get_name;
487 screen->get_vendor = svga_get_vendor;
488 screen->get_param = svga_get_param;
489 screen->get_shader_param = svga_get_shader_param;
490 screen->get_paramf = svga_get_paramf;
491 screen->is_format_supported = svga_is_format_supported;
492 screen->context_create = svga_context_create;
493 screen->fence_reference = svga_fence_reference;
494 screen->fence_signalled = svga_fence_signalled;
495 screen->fence_finish = svga_fence_finish;
496 svgascreen->sws = sws;
497
498 svga_screen_init_surface_functions(screen);
499 svga_init_screen_resource_functions(svgascreen);
500
501 svgascreen->use_ps30 =
502 sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) &&
503 result.u >= SVGA3DPSVERSION_30 ? TRUE : FALSE;
504
505 svgascreen->use_vs30 =
506 sws->get_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION, &result) &&
507 result.u >= SVGA3DVSVERSION_30 ? TRUE : FALSE;
508
509 #if 1
510 /* Shader model 2.0 is unsupported at the moment. */
511 if(!svgascreen->use_ps30 || !svgascreen->use_vs30)
512 goto error2;
513 #else
514 if(debug_get_bool_option("SVGA_NO_SM30", FALSE))
515 svgascreen->use_vs30 = svgascreen->use_ps30 = FALSE;
516 #endif
517
518 pipe_mutex_init(svgascreen->tex_mutex);
519 pipe_mutex_init(svgascreen->swc_mutex);
520
521 svga_screen_cache_init(svgascreen);
522
523 return screen;
524 error2:
525 FREE(svgascreen);
526 error1:
527 return NULL;
528 }
529
530 struct svga_winsys_screen *
531 svga_winsys_screen(struct pipe_screen *screen)
532 {
533 return svga_screen(screen)->sws;
534 }
535
536 #ifdef DEBUG
537 struct svga_screen *
538 svga_screen(struct pipe_screen *screen)
539 {
540 assert(screen);
541 assert(screen->destroy == svga_destroy_screen);
542 return (struct svga_screen *)screen;
543 }
544 #endif