src/gallium/drivers/svga/svga_screen_buffer.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "pipe/p_inlines.h"
  31 #include "pipe/p_thread.h"
  32 #include "util/u_math.h"
  33 #include "util/u_memory.h"
  34
  35 #include "svga_context.h"
  36 #include "svga_screen.h"
  37 #include "svga_screen_buffer.h"
  38 #include "svga_winsys.h"
  39 #include "svga_debug.h"
  40
  41
  42 /**
  43  * Vertex and index buffers have to be treated slightly differently from
  44  * regular guest memory regions because the SVGA device sees them as
  45  * surfaces, and the state tracker can create/destroy without the pipe
  46  * driver, therefore we must do the uploads from the vws.
  47  */
  48 static INLINE boolean
  49 svga_buffer_needs_hw_storage(unsigned usage)
  50 {
  51    return usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX);
  52 }
  53
  54
  55 static INLINE enum pipe_error
  56 svga_buffer_create_host_surface(struct svga_screen *ss,
  57                                 struct svga_buffer *sbuf)
  58 {
  59    if(!sbuf->handle) {
  60       sbuf->key.flags = 0;
  61
  62       sbuf->key.format = SVGA3D_BUFFER;
  63       if(sbuf->base.usage & PIPE_BUFFER_USAGE_VERTEX)
  64          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
  65       if(sbuf->base.usage & PIPE_BUFFER_USAGE_INDEX)
  66          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
  67
  68       sbuf->key.size.width = sbuf->base.size;
  69       sbuf->key.size.height = 1;
  70       sbuf->key.size.depth = 1;
  71
  72       sbuf->key.numFaces = 1;
  73       sbuf->key.numMipLevels = 1;
  74       sbuf->key.cachable = 1;
  75
  76       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->base.size);
  77
  78       sbuf->handle = svga_screen_surface_create(ss, &sbuf->key);
  79       if(!sbuf->handle)
  80          return PIPE_ERROR_OUT_OF_MEMORY;
  81
  82       /* Always set the discard flag on the first time the buffer is written
  83        * as svga_screen_surface_create might have passed a recycled host
  84        * buffer.
  85        */
  86       sbuf->hw.flags.discard = TRUE;
  87
  88       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->base.size);
  89    }
  90
  91    return PIPE_OK;
  92 }
  93
  94
  95 static INLINE void
  96 svga_buffer_destroy_host_surface(struct svga_screen *ss,
  97                                  struct svga_buffer *sbuf)
  98 {
  99    if(sbuf->handle) {
 100       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->base.size);
 101       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 102    }
 103 }
 104
 105
 106 static INLINE void
 107 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
 108 {
 109    struct svga_winsys_screen *sws = ss->sws;
 110
 111    assert(!sbuf->map.count);
 112    assert(sbuf->hw.buf);
 113    if(sbuf->hw.buf) {
 114       sws->buffer_destroy(sws, sbuf->hw.buf);
 115       sbuf->hw.buf = NULL;
 116    }
 117 }
 118
 119 struct svga_winsys_buffer *
 120 svga_winsys_buffer_create( struct svga_screen *ss,
 121                            unsigned alignment,
 122                            unsigned usage,
 123                            unsigned size )
 124 {
 125    struct svga_winsys_screen *sws = ss->sws;
 126    struct svga_winsys_buffer *buf;
 127
 128    /* Just try */
 129    buf = sws->buffer_create(sws, alignment, usage, size);
 130    if(!buf) {
 131
 132       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing screen to find %d bytes GMR\n",
 133                size);
 134
 135       /* Try flushing all pending DMAs */
 136       svga_screen_flush(ss, NULL);
 137       buf = sws->buffer_create(sws, alignment, usage, size);
 138
 139    }
 140
 141    return buf;
 142 }
 143
 144
 145 /**
 146  * Allocate DMA'ble storage for the buffer.
 147  *
 148  * Called before mapping a buffer.
 149  */
 150 static INLINE enum pipe_error
 151 svga_buffer_create_hw_storage(struct svga_screen *ss,
 152                               struct svga_buffer *sbuf)
 153 {
 154    if(!sbuf->hw.buf) {
 155       unsigned alignment = sbuf->base.alignment;
 156       unsigned usage = 0;
 157       unsigned size = sbuf->base.size;
 158
 159       sbuf->hw.buf = svga_winsys_buffer_create(ss, alignment, usage, size);
 160       if(!sbuf->hw.buf)
 161          return PIPE_ERROR_OUT_OF_MEMORY;
 162
 163       assert(!sbuf->needs_flush);
 164    }
 165
 166    return PIPE_OK;
 167 }
 168
 169
 170 /**
 171  * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
 172  */
 173 static enum pipe_error
 174 svga_buffer_upload_command(struct svga_context *svga,
 175                            struct svga_buffer *sbuf)
 176 {
 177    struct svga_winsys_context *swc = svga->swc;
 178    struct svga_winsys_buffer *guest = sbuf->hw.buf;
 179    struct svga_winsys_surface *host = sbuf->handle;
 180    SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 181    SVGA3dSurfaceDMAFlags flags = sbuf->hw.flags;
 182    SVGA3dCmdSurfaceDMA *cmd;
 183    uint32 numBoxes = sbuf->hw.num_ranges;
 184    SVGA3dCopyBox *boxes;
 185    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 186    unsigned region_flags;
 187    unsigned surface_flags;
 188    struct pipe_buffer *dummy;
 189
 190    if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 191       region_flags = PIPE_BUFFER_USAGE_GPU_READ;
 192       surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE;
 193    }
 194    else if(transfer == SVGA3D_READ_HOST_VRAM) {
 195       region_flags = PIPE_BUFFER_USAGE_GPU_WRITE;
 196       surface_flags = PIPE_BUFFER_USAGE_GPU_READ;
 197    }
 198    else {
 199       assert(0);
 200       return PIPE_ERROR_BAD_INPUT;
 201    }
 202
 203    assert(numBoxes);
 204
 205    cmd = SVGA3D_FIFOReserve(swc,
 206                             SVGA_3D_CMD_SURFACE_DMA,
 207                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 208                             2);
 209    if(!cmd)
 210       return PIPE_ERROR_OUT_OF_MEMORY;
 211
 212    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 213    cmd->guest.pitch = 0;
 214
 215    swc->surface_relocation(swc, &cmd->host.sid, host, surface_flags);
 216    cmd->host.face = 0;
 217    cmd->host.mipmap = 0;
 218
 219    cmd->transfer = transfer;
 220
 221    sbuf->hw.boxes = (SVGA3dCopyBox *)&cmd[1];
 222    sbuf->hw.svga = svga;
 223
 224    /* Increment reference count */
 225    dummy = NULL;
 226    pipe_buffer_reference(&dummy, &sbuf->base);
 227
 228    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 229    pSuffix->suffixSize = sizeof *pSuffix;
 230    pSuffix->maximumOffset = sbuf->base.size;
 231    pSuffix->flags = flags;
 232
 233    swc->commit(swc);
 234
 235    return PIPE_OK;
 236 }
 237
 238
 239 /**
 240  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 241  * with the final ranges.
 242  */
 243 static void
 244 svga_buffer_upload_flush(struct svga_context *svga,
 245                          struct svga_buffer *sbuf)
 246 {
 247    SVGA3dCopyBox *boxes;
 248    unsigned i;
 249
 250    assert(sbuf->handle);
 251    assert(sbuf->hw.buf);
 252    assert(sbuf->hw.num_ranges);
 253    assert(sbuf->hw.svga == svga);
 254    assert(sbuf->hw.boxes);
 255
 256    /*
 257     * Patch the DMA command with the final copy box.
 258     */
 259
 260    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 261
 262    boxes = sbuf->hw.boxes;
 263    for(i = 0; i < sbuf->hw.num_ranges; ++i) {
 264       SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 265                sbuf->hw.ranges[i].start, sbuf->hw.ranges[i].end);
 266
 267       boxes[i].x = sbuf->hw.ranges[i].start;
 268       boxes[i].y = 0;
 269       boxes[i].z = 0;
 270       boxes[i].w = sbuf->hw.ranges[i].end - sbuf->hw.ranges[i].start;
 271       boxes[i].h = 1;
 272       boxes[i].d = 1;
 273       boxes[i].srcx = sbuf->hw.ranges[i].start;
 274       boxes[i].srcy = 0;
 275       boxes[i].srcz = 0;
 276    }
 277
 278    sbuf->hw.num_ranges = 0;
 279    memset(&sbuf->hw.flags, 0, sizeof sbuf->hw.flags);
 280
 281    assert(sbuf->head.prev && sbuf->head.next);
 282    LIST_DEL(&sbuf->head);
 283 #ifdef DEBUG
 284    sbuf->head.next = sbuf->head.prev = NULL;
 285 #endif
 286    sbuf->needs_flush = FALSE;
 287
 288    sbuf->hw.svga = NULL;
 289    sbuf->hw.boxes = NULL;
 290
 291    sbuf->host_written = TRUE;
 292
 293    /* Decrement reference count */
 294    pipe_reference(&(sbuf->base.reference), NULL);
 295    sbuf = NULL;
 296 }
 297
 298
 299 /**
 300  * Queue a DMA upload of a range of this buffer to the host.
 301  *
 302  * This function only notes the range down. It doesn't actually emit a DMA
 303  * upload command. That only happens when a context tries to refer to this
 304  * buffer, and the DMA upload command is added to that context's command buffer.
 305  *
 306  * We try to lump as many contiguous DMA transfers together as possible.
 307  */
 308 static void
 309 svga_buffer_upload_queue(struct svga_buffer *sbuf,
 310                          unsigned start,
 311                          unsigned end)
 312 {
 313    unsigned i;
 314
 315    assert(sbuf->hw.buf);
 316    assert(end > start);
 317
 318    /*
 319     * Try to grow one of the ranges.
 320     *
 321     * Note that it is not this function task to care about overlapping ranges,
 322     * as the GMR was already given so it is too late to do anything. Situations
 323     * where overlapping ranges may pose a problem should be detected via
 324     * pipe_context::is_buffer_referenced and the context that refers to the
 325     * buffer should be flushed.
 326     */
 327
 328    for(i = 0; i < sbuf->hw.num_ranges; ++i) {
 329       if(start <= sbuf->hw.ranges[i].end && sbuf->hw.ranges[i].start <= end) {
 330          sbuf->hw.ranges[i].start = MIN2(sbuf->hw.ranges[i].start, start);
 331          sbuf->hw.ranges[i].end   = MAX2(sbuf->hw.ranges[i].end,    end);
 332          return;
 333       }
 334    }
 335
 336    /*
 337     * We cannot add a new range to an existing DMA command, so patch-up the
 338     * pending DMA upload and start clean.
 339     */
 340
 341    if(sbuf->needs_flush)
 342       svga_buffer_upload_flush(sbuf->hw.svga, sbuf);
 343
 344    assert(!sbuf->needs_flush);
 345    assert(!sbuf->hw.svga);
 346    assert(!sbuf->hw.boxes);
 347
 348    /*
 349     * Add a new range.
 350     */
 351
 352    sbuf->hw.ranges[sbuf->hw.num_ranges].start = start;
 353    sbuf->hw.ranges[sbuf->hw.num_ranges].end = end;
 354    ++sbuf->hw.num_ranges;
 355 }
 356
 357
 358 static void *
 359 svga_buffer_map_range( struct pipe_screen *screen,
 360                        struct pipe_buffer *buf,
 361                        unsigned offset, unsigned length,
 362                        unsigned usage )
 363 {
 364    struct svga_screen *ss = svga_screen(screen);
 365    struct svga_winsys_screen *sws = ss->sws;
 366    struct svga_buffer *sbuf = svga_buffer( buf );
 367    void *map;
 368
 369    if(sbuf->swbuf) {
 370       /* User/malloc buffer */
 371       map = sbuf->swbuf;
 372    }
 373    else {
 374       if(!sbuf->hw.buf) {
 375          if(svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK)
 376             return NULL;
 377
 378          /* Populate the hardware storage if the host surface pre-existed */
 379          if(sbuf->host_written) {
 380             SVGA3dSurfaceDMAFlags flags;
 381             enum pipe_error ret;
 382             struct pipe_fence_handle *fence = NULL;
 383
 384             assert(sbuf->handle);
 385
 386             SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "dma from sid %p (buffer), bytes %u - %u\n",
 387                      sbuf->handle, 0, sbuf->base.size);
 388
 389             memset(&flags, 0, sizeof flags);
 390
 391             ret = SVGA3D_BufferDMA(ss->swc,
 392                                    sbuf->hw.buf,
 393                                    sbuf->handle,
 394                                    SVGA3D_READ_HOST_VRAM,
 395                                    sbuf->base.size,
 396                                    0,
 397                                    flags);
 398             if(ret != PIPE_OK) {
 399                ss->swc->flush(ss->swc, NULL);
 400
 401                ret = SVGA3D_BufferDMA(ss->swc,
 402                                       sbuf->hw.buf,
 403                                       sbuf->handle,
 404                                       SVGA3D_READ_HOST_VRAM,
 405                                       sbuf->base.size,
 406                                       0,
 407                                       flags);
 408                assert(ret == PIPE_OK);
 409             }
 410
 411             ss->swc->flush(ss->swc, &fence);
 412             sws->fence_finish(sws, fence, 0);
 413             sws->fence_reference(sws, &fence, NULL);
 414          }
 415       }
 416
 417       map = sws->buffer_map(sws, sbuf->hw.buf, usage);
 418    }
 419
 420    if(map) {
 421       pipe_mutex_lock(ss->swc_mutex);
 422
 423       ++sbuf->map.count;
 424
 425       if (usage & PIPE_BUFFER_USAGE_CPU_WRITE) {
 426          assert(sbuf->map.count <= 1);
 427          sbuf->map.writing = TRUE;
 428          if (usage & PIPE_BUFFER_USAGE_FLUSH_EXPLICIT)
 429             sbuf->map.flush_explicit = TRUE;
 430       }
 431
 432       pipe_mutex_unlock(ss->swc_mutex);
 433    }
 434
 435    return map;
 436 }
 437
 438 static void
 439 svga_buffer_flush_mapped_range( struct pipe_screen *screen,
 440                                 struct pipe_buffer *buf,
 441                                 unsigned offset, unsigned length)
 442 {
 443    struct svga_buffer *sbuf = svga_buffer( buf );
 444    struct svga_screen *ss = svga_screen(screen);
 445
 446    pipe_mutex_lock(ss->swc_mutex);
 447    assert(sbuf->map.writing);
 448    if(sbuf->map.writing) {
 449       assert(sbuf->map.flush_explicit);
 450       if(sbuf->hw.buf)
 451          svga_buffer_upload_queue(sbuf, offset, offset + length);
 452    }
 453    pipe_mutex_unlock(ss->swc_mutex);
 454 }
 455
 456 static void
 457 svga_buffer_unmap( struct pipe_screen *screen,
 458                    struct pipe_buffer *buf)
 459 {
 460    struct svga_screen *ss = svga_screen(screen);
 461    struct svga_winsys_screen *sws = ss->sws;
 462    struct svga_buffer *sbuf = svga_buffer( buf );
 463
 464    pipe_mutex_lock(ss->swc_mutex);
 465
 466    assert(sbuf->map.count);
 467    if(sbuf->map.count)
 468       --sbuf->map.count;
 469
 470    if(sbuf->hw.buf)
 471       sws->buffer_unmap(sws, sbuf->hw.buf);
 472
 473    if(sbuf->map.writing) {
 474       if(!sbuf->map.flush_explicit) {
 475          /* No mapped range was flushed -- flush the whole buffer */
 476          SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
 477
 478          if(sbuf->hw.buf)
 479             svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
 480       }
 481
 482       sbuf->map.writing = FALSE;
 483       sbuf->map.flush_explicit = FALSE;
 484    }
 485
 486    pipe_mutex_unlock(ss->swc_mutex);
 487 }
 488
 489 static void
 490 svga_buffer_destroy( struct pipe_buffer *buf )
 491 {
 492    struct svga_screen *ss = svga_screen(buf->screen);
 493    struct svga_buffer *sbuf = svga_buffer( buf );
 494
 495    assert(!p_atomic_read(&buf->reference.count));
 496
 497    assert(!sbuf->needs_flush);
 498
 499    if(sbuf->handle)
 500       svga_buffer_destroy_host_surface(ss, sbuf);
 501
 502    if(sbuf->hw.buf)
 503       svga_buffer_destroy_hw_storage(ss, sbuf);
 504
 505    if(sbuf->swbuf && !sbuf->user)
 506       align_free(sbuf->swbuf);
 507
 508    FREE(sbuf);
 509 }
 510
 511 static struct pipe_buffer *
 512 svga_buffer_create(struct pipe_screen *screen,
 513                    unsigned alignment,
 514                    unsigned usage,
 515                    unsigned size)
 516 {
 517    struct svga_screen *ss = svga_screen(screen);
 518    struct svga_buffer *sbuf;
 519
 520    assert(size);
 521    assert(alignment);
 522
 523    sbuf = CALLOC_STRUCT(svga_buffer);
 524    if(!sbuf)
 525       goto error1;
 526
 527    sbuf->magic = SVGA_BUFFER_MAGIC;
 528
 529    pipe_reference_init(&sbuf->base.reference, 1);
 530    sbuf->base.screen = screen;
 531    sbuf->base.alignment = alignment;
 532    sbuf->base.usage = usage;
 533    sbuf->base.size = size;
 534
 535    if(svga_buffer_needs_hw_storage(usage)) {
 536       if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
 537          goto error2;
 538    }
 539    else {
 540       if(alignment < sizeof(void*))
 541          alignment = sizeof(void*);
 542
 543       usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE;
 544
 545       sbuf->swbuf = align_malloc(size, alignment);
 546       if(!sbuf->swbuf)
 547          goto error2;
 548    }
 549
 550    return &sbuf->base;
 551
 552 error2:
 553    FREE(sbuf);
 554 error1:
 555    return NULL;
 556 }
 557
 558 static struct pipe_buffer *
 559 svga_user_buffer_create(struct pipe_screen *screen,
 560                         void *ptr,
 561                         unsigned bytes)
 562 {
 563    struct svga_buffer *sbuf;
 564
 565    sbuf = CALLOC_STRUCT(svga_buffer);
 566    if(!sbuf)
 567       goto no_sbuf;
 568
 569    sbuf->magic = SVGA_BUFFER_MAGIC;
 570
 571    sbuf->swbuf = ptr;
 572    sbuf->user = TRUE;
 573
 574    pipe_reference_init(&sbuf->base.reference, 1);
 575    sbuf->base.screen = screen;
 576    sbuf->base.alignment = 1;
 577    sbuf->base.usage = 0;
 578    sbuf->base.size = bytes;
 579
 580    return &sbuf->base;
 581
 582 no_sbuf:
 583    return NULL;
 584 }
 585
 586
 587 void
 588 svga_screen_init_buffer_functions(struct pipe_screen *screen)
 589 {
 590    screen->buffer_create = svga_buffer_create;
 591    screen->user_buffer_create = svga_user_buffer_create;
 592    screen->buffer_map_range = svga_buffer_map_range;
 593    screen->buffer_flush_mapped_range = svga_buffer_flush_mapped_range;
 594    screen->buffer_unmap = svga_buffer_unmap;
 595    screen->buffer_destroy = svga_buffer_destroy;
 596 }
 597
 598
 599 /**
 600  * Copy the contents of the user buffer / malloc buffer to a hardware buffer.
 601  */
 602 static INLINE enum pipe_error
 603 svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
 604 {
 605    if(!sbuf->hw.buf) {
 606       enum pipe_error ret;
 607       void *map;
 608
 609       assert(sbuf->swbuf);
 610       if(!sbuf->swbuf)
 611          return PIPE_ERROR;
 612
 613       ret = svga_buffer_create_hw_storage(ss, sbuf);
 614       assert(ret == PIPE_OK);
 615       if(ret != PIPE_OK)
 616          return ret;
 617
 618       pipe_mutex_lock(ss->swc_mutex);
 619       map = ss->sws->buffer_map(ss->sws, sbuf->hw.buf, PIPE_BUFFER_USAGE_CPU_WRITE);
 620       assert(map);
 621       if(!map) {
 622          pipe_mutex_unlock(ss->swc_mutex);
 623          return PIPE_ERROR_OUT_OF_MEMORY;
 624       }
 625
 626       memcpy(map, sbuf->swbuf, sbuf->base.size);
 627       ss->sws->buffer_unmap(ss->sws, sbuf->hw.buf);
 628
 629       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 630       assert(!sbuf->map.count);
 631       if(!sbuf->map.count) {
 632          if(sbuf->user)
 633             sbuf->user = FALSE;
 634          else
 635             align_free(sbuf->swbuf);
 636          sbuf->swbuf = NULL;
 637       }
 638
 639       svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
 640    }
 641
 642    pipe_mutex_unlock(ss->swc_mutex);
 643    return PIPE_OK;
 644 }
 645
 646
 647 struct svga_winsys_surface *
 648 svga_buffer_handle(struct svga_context *svga,
 649                    struct pipe_buffer *buf)
 650 {
 651    struct pipe_screen *screen = svga->pipe.screen;
 652    struct svga_screen *ss = svga_screen(screen);
 653    struct svga_buffer *sbuf;
 654    enum pipe_error ret;
 655
 656    if(!buf)
 657       return NULL;
 658
 659    sbuf = svga_buffer(buf);
 660
 661    assert(!sbuf->map.count);
 662
 663    if(!sbuf->handle) {
 664       ret = svga_buffer_create_host_surface(ss, sbuf);
 665       if(ret != PIPE_OK)
 666          return NULL;
 667
 668       ret = svga_buffer_update_hw(ss, sbuf);
 669       if(ret != PIPE_OK)
 670          return NULL;
 671    }
 672
 673    if(!sbuf->needs_flush && sbuf->hw.num_ranges) {
 674       /* Queue the buffer for flushing */
 675       ret = svga_buffer_upload_command(svga, sbuf);
 676       if(ret != PIPE_OK)
 677          /* XXX: Should probably have a richer return value */
 678          return NULL;
 679
 680       assert(sbuf->hw.svga == svga);
 681
 682       sbuf->needs_flush = TRUE;
 683       assert(!sbuf->head.prev && !sbuf->head.next);
 684       LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 685    }
 686
 687    return sbuf->handle;
 688 }
 689
 690 struct pipe_buffer *
 691 svga_screen_buffer_wrap_surface(struct pipe_screen *screen,
 692                                 enum SVGA3dSurfaceFormat format,
 693                                 struct svga_winsys_surface *srf)
 694 {
 695    struct pipe_buffer *buf;
 696    struct svga_buffer *sbuf;
 697    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 698
 699    buf = svga_buffer_create(screen, 0, SVGA_BUFFER_USAGE_WRAPPED, 0);
 700    if (!buf)
 701       return NULL;
 702
 703    sbuf = svga_buffer(buf);
 704
 705    /*
 706     * We are not the creator of this surface and therefore we must not
 707     * cache it for reuse. Set the cacheable flag to zero in the key to
 708     * prevent this.
 709     */
 710    sbuf->key.format = format;
 711    sbuf->key.cachable = 0;
 712    sws->surface_reference(sws, &sbuf->handle, srf);
 713
 714    return buf;
 715 }
 716
 717
 718 struct svga_winsys_surface *
 719 svga_screen_buffer_get_winsys_surface(struct pipe_buffer *buffer)
 720 {
 721    struct svga_winsys_screen *sws = svga_winsys_screen(buffer->screen);
 722    struct svga_winsys_surface *vsurf = NULL;
 723
 724    assert(svga_buffer(buffer)->key.cachable == 0);
 725    svga_buffer(buffer)->key.cachable = 0;
 726    sws->surface_reference(sws, &vsurf, svga_buffer(buffer)->handle);
 727    return vsurf;
 728 }
 729
 730 void
 731 svga_context_flush_buffers(struct svga_context *svga)
 732 {
 733    struct list_head *curr, *next;
 734    struct svga_buffer *sbuf;
 735
 736    curr = svga->dirty_buffers.next;
 737    next = curr->next;
 738    while(curr != &svga->dirty_buffers) {
 739       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 740
 741       assert(p_atomic_read(&sbuf->base.reference.count) != 0);
 742       assert(sbuf->needs_flush);
 743
 744       svga_buffer_upload_flush(svga, sbuf);
 745
 746       curr = next;
 747       next = curr->next;
 748    }
 749 }