gallium/draw: apply DRAW_PIPE_FLAG_MASK to all vertex elements
[mesa.git] / src / gallium / drivers / svga / svga_screen_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_inlines.h"
31 #include "pipe/p_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34
35 #include "svga_screen.h"
36 #include "svga_context.h"
37 #include "svga_screen_texture.h"
38 #include "svga_screen_buffer.h"
39 #include "svga_winsys.h"
40 #include "svga_debug.h"
41 #include "svga_screen_buffer.h"
42
43 #include <util/u_string.h>
44
45
46 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
47 * know about primary surfaces. Find a better way to accomplish this.
48 */
49 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
50
51
52 /*
53 * Helper function and arrays
54 */
55
56 SVGA3dSurfaceFormat
57 svga_translate_format(enum pipe_format format)
58 {
59 switch(format) {
60
61 case PIPE_FORMAT_A8R8G8B8_UNORM:
62 return SVGA3D_A8R8G8B8;
63 case PIPE_FORMAT_X8R8G8B8_UNORM:
64 return SVGA3D_X8R8G8B8;
65
66 /* Required for GL2.1:
67 */
68 case PIPE_FORMAT_A8R8G8B8_SRGB:
69 return SVGA3D_A8R8G8B8;
70
71 case PIPE_FORMAT_R5G6B5_UNORM:
72 return SVGA3D_R5G6B5;
73 case PIPE_FORMAT_A1R5G5B5_UNORM:
74 return SVGA3D_A1R5G5B5;
75 case PIPE_FORMAT_A4R4G4B4_UNORM:
76 return SVGA3D_A4R4G4B4;
77
78
79 /* XXX: Doesn't seem to work properly.
80 case PIPE_FORMAT_Z32_UNORM:
81 return SVGA3D_Z_D32;
82 */
83 case PIPE_FORMAT_Z16_UNORM:
84 return SVGA3D_Z_D16;
85 case PIPE_FORMAT_Z24S8_UNORM:
86 return SVGA3D_Z_D24S8;
87 case PIPE_FORMAT_Z24X8_UNORM:
88 return SVGA3D_Z_D24X8;
89
90 case PIPE_FORMAT_A8_UNORM:
91 return SVGA3D_ALPHA8;
92 case PIPE_FORMAT_L8_UNORM:
93 return SVGA3D_LUMINANCE8;
94
95 case PIPE_FORMAT_DXT1_RGB:
96 case PIPE_FORMAT_DXT1_RGBA:
97 return SVGA3D_DXT1;
98 case PIPE_FORMAT_DXT3_RGBA:
99 return SVGA3D_DXT3;
100 case PIPE_FORMAT_DXT5_RGBA:
101 return SVGA3D_DXT5;
102
103 default:
104 return SVGA3D_FORMAT_INVALID;
105 }
106 }
107
108
109 SVGA3dSurfaceFormat
110 svga_translate_format_render(enum pipe_format format)
111 {
112 switch(format) {
113 case PIPE_FORMAT_A8R8G8B8_UNORM:
114 case PIPE_FORMAT_X8R8G8B8_UNORM:
115 case PIPE_FORMAT_A1R5G5B5_UNORM:
116 case PIPE_FORMAT_A4R4G4B4_UNORM:
117 case PIPE_FORMAT_R5G6B5_UNORM:
118 case PIPE_FORMAT_Z24S8_UNORM:
119 case PIPE_FORMAT_Z24X8_UNORM:
120 case PIPE_FORMAT_Z32_UNORM:
121 case PIPE_FORMAT_Z16_UNORM:
122 case PIPE_FORMAT_L8_UNORM:
123 return svga_translate_format(format);
124
125 #if 1
126 /* For on host conversion */
127 case PIPE_FORMAT_DXT1_RGB:
128 return SVGA3D_X8R8G8B8;
129 case PIPE_FORMAT_DXT1_RGBA:
130 case PIPE_FORMAT_DXT3_RGBA:
131 case PIPE_FORMAT_DXT5_RGBA:
132 return SVGA3D_A8R8G8B8;
133 #endif
134
135 default:
136 return SVGA3D_FORMAT_INVALID;
137 }
138 }
139
140
141 static INLINE void
142 svga_transfer_dma_band(struct svga_transfer *st,
143 SVGA3dTransferType transfer,
144 unsigned y, unsigned h, unsigned srcy)
145 {
146 struct svga_texture *texture = svga_texture(st->base.texture);
147 struct svga_screen *screen = svga_screen(texture->base.screen);
148 SVGA3dCopyBox box;
149 enum pipe_error ret;
150
151 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
152 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
153 texture->handle,
154 st->base.face,
155 st->base.x,
156 y,
157 st->base.zslice,
158 st->base.x + st->base.width,
159 y + h,
160 st->base.zslice + 1,
161 texture->base.block.size*8/(texture->base.block.width*texture->base.block.height));
162
163 box.x = st->base.x;
164 box.y = y;
165 box.z = st->base.zslice;
166 box.w = st->base.width;
167 box.h = h;
168 box.d = 1;
169 box.srcx = 0;
170 box.srcy = srcy;
171 box.srcz = 0;
172
173 pipe_mutex_lock(screen->swc_mutex);
174 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
175 if(ret != PIPE_OK) {
176 screen->swc->flush(screen->swc, NULL);
177 ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1);
178 assert(ret == PIPE_OK);
179 }
180 pipe_mutex_unlock(screen->swc_mutex);
181 }
182
183
184 static INLINE void
185 svga_transfer_dma(struct svga_transfer *st,
186 SVGA3dTransferType transfer)
187 {
188 struct svga_texture *texture = svga_texture(st->base.texture);
189 struct svga_screen *screen = svga_screen(texture->base.screen);
190 struct svga_winsys_screen *sws = screen->sws;
191 struct pipe_fence_handle *fence = NULL;
192
193 if (transfer == SVGA3D_READ_HOST_VRAM) {
194 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
195 }
196
197
198 if(!st->swbuf) {
199 /* Do the DMA transfer in a single go */
200
201 svga_transfer_dma_band(st, transfer, st->base.y, st->base.height, 0);
202
203 if(transfer == SVGA3D_READ_HOST_VRAM) {
204 svga_screen_flush(screen, &fence);
205 sws->fence_finish(sws, fence, 0);
206 //sws->fence_reference(sws, &fence, NULL);
207 }
208 }
209 else {
210 unsigned y, h, srcy;
211 h = st->hw_nblocksy * st->base.block.height;
212 srcy = 0;
213 for(y = 0; y < st->base.height; y += h) {
214 unsigned offset, length;
215 void *hw, *sw;
216
217 if (y + h > st->base.height)
218 h = st->base.height - y;
219
220 /* Transfer band must be aligned to pixel block boundaries */
221 assert(y % st->base.block.height == 0);
222 assert(h % st->base.block.height == 0);
223
224 offset = y * st->base.stride / st->base.block.height;
225 length = h * st->base.stride / st->base.block.height;
226
227 sw = (uint8_t *)st->swbuf + offset;
228
229 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
230 /* Wait for the previous DMAs to complete */
231 /* TODO: keep one DMA (at half the size) in the background */
232 if(y) {
233 svga_screen_flush(screen, &fence);
234 sws->fence_finish(sws, fence, 0);
235 //sws->fence_reference(sws, &fence, NULL);
236 }
237
238 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE);
239 assert(hw);
240 if(hw) {
241 memcpy(hw, sw, length);
242 sws->buffer_unmap(sws, st->hwbuf);
243 }
244 }
245
246 svga_transfer_dma_band(st, transfer, y, h, srcy);
247
248 if(transfer == SVGA3D_READ_HOST_VRAM) {
249 svga_screen_flush(screen, &fence);
250 sws->fence_finish(sws, fence, 0);
251
252 hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ);
253 assert(hw);
254 if(hw) {
255 memcpy(sw, hw, length);
256 sws->buffer_unmap(sws, st->hwbuf);
257 }
258 }
259 }
260 }
261 }
262
263
264 static struct pipe_texture *
265 svga_texture_create(struct pipe_screen *screen,
266 const struct pipe_texture *templat)
267 {
268 struct svga_screen *svgascreen = svga_screen(screen);
269 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
270 unsigned width, height, depth;
271 unsigned level;
272
273 if (!tex)
274 goto error1;
275
276 tex->base = *templat;
277 pipe_reference_init(&tex->base.reference, 1);
278 tex->base.screen = screen;
279
280 assert(templat->last_level < SVGA_MAX_TEXTURE_LEVELS);
281 if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS)
282 goto error2;
283
284 width = templat->width[0];
285 height = templat->height[0];
286 depth = templat->depth[0];
287 for(level = 0; level <= templat->last_level; ++level) {
288 tex->base.width[level] = width;
289 tex->base.height[level] = height;
290 tex->base.depth[level] = depth;
291 tex->base.nblocksx[level] = pf_get_nblocksx(&tex->base.block, width);
292 tex->base.nblocksy[level] = pf_get_nblocksy(&tex->base.block, height);
293 width = minify(width);
294 height = minify(height);
295 depth = minify(depth);
296 }
297
298 tex->key.flags = 0;
299 tex->key.size.width = templat->width[0];
300 tex->key.size.height = templat->height[0];
301 tex->key.size.depth = templat->depth[0];
302
303 if(templat->target == PIPE_TEXTURE_CUBE) {
304 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
305 tex->key.numFaces = 6;
306 }
307 else {
308 tex->key.numFaces = 1;
309 }
310
311 tex->key.cachable = 1;
312
313 if(templat->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER)
314 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
315
316 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) {
317 tex->key.cachable = 0;
318 }
319
320 if(templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) {
321 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
322 tex->key.cachable = 0;
323 }
324
325 /*
326 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
327 * know beforehand whether a texture will be used as a rendertarget or not
328 * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore
329 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
330 */
331 #if 0
332 if((templat->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) &&
333 !pf_is_compressed(templat->format))
334 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
335 #endif
336
337 if(templat->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL)
338 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
339
340 tex->key.numMipLevels = templat->last_level + 1;
341
342 tex->key.format = svga_translate_format(templat->format);
343 if(tex->key.format == SVGA3D_FORMAT_INVALID)
344 goto error2;
345
346 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
347 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
348 if (tex->handle)
349 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
350
351 return &tex->base;
352
353 error2:
354 FREE(tex);
355 error1:
356 return NULL;
357 }
358
359
360 static struct pipe_texture *
361 svga_texture_blanket(struct pipe_screen * screen,
362 const struct pipe_texture *base,
363 const unsigned *stride,
364 struct pipe_buffer *buffer)
365 {
366 struct svga_texture *tex;
367 struct svga_buffer *sbuf = svga_buffer(buffer);
368 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
369 assert(screen);
370
371 /* Only supports one type */
372 if (base->target != PIPE_TEXTURE_2D ||
373 base->last_level != 0 ||
374 base->depth[0] != 1) {
375 return NULL;
376 }
377
378 /**
379 * We currently can't do texture blanket on
380 * SVGA3D_BUFFER. Need to blit to a temporary surface?
381 */
382
383 assert(sbuf->handle);
384 if (!sbuf->handle)
385 return NULL;
386
387 if (svga_translate_format(base->format) != sbuf->key.format) {
388 unsigned f1 = svga_translate_format(base->format);
389 unsigned f2 = sbuf->key.format;
390
391 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
392 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
393 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
394 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
395 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
396 return NULL;
397 }
398 }
399
400 tex = CALLOC_STRUCT(svga_texture);
401 if (!tex)
402 return NULL;
403
404 tex->base = *base;
405
406
407 if (sbuf->key.format == 1)
408 tex->base.format = PIPE_FORMAT_X8R8G8B8_UNORM;
409 else if (sbuf->key.format == 2)
410 tex->base.format = PIPE_FORMAT_A8R8G8B8_UNORM;
411
412 pipe_reference_init(&tex->base.reference, 1);
413 tex->base.screen = screen;
414
415 SVGA_DBG(DEBUG_DMA, "blanket sid %p\n", sbuf->handle);
416
417 /* We don't own this storage, so don't try to cache it.
418 */
419 assert(sbuf->key.cachable == 0);
420 tex->key.cachable = 0;
421 sws->surface_reference(sws, &tex->handle, sbuf->handle);
422
423 return &tex->base;
424 }
425
426
427 struct pipe_texture *
428 svga_screen_texture_wrap_surface(struct pipe_screen *screen,
429 struct pipe_texture *base,
430 enum SVGA3dSurfaceFormat format,
431 struct svga_winsys_surface *srf)
432 {
433 struct svga_texture *tex;
434 assert(screen);
435
436 /* Only supports one type */
437 if (base->target != PIPE_TEXTURE_2D ||
438 base->last_level != 0 ||
439 base->depth[0] != 1) {
440 return NULL;
441 }
442
443 if (!srf)
444 return NULL;
445
446 if (svga_translate_format(base->format) != format) {
447 unsigned f1 = svga_translate_format(base->format);
448 unsigned f2 = format;
449
450 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
451 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
452 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
453 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
454 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
455 return NULL;
456 }
457 }
458
459 tex = CALLOC_STRUCT(svga_texture);
460 if (!tex)
461 return NULL;
462
463 tex->base = *base;
464
465
466 if (format == 1)
467 tex->base.format = PIPE_FORMAT_X8R8G8B8_UNORM;
468 else if (format == 2)
469 tex->base.format = PIPE_FORMAT_A8R8G8B8_UNORM;
470
471 pipe_reference_init(&tex->base.reference, 1);
472 tex->base.screen = screen;
473
474 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
475
476 tex->key.cachable = 0;
477 tex->handle = srf;
478
479 return &tex->base;
480 }
481
482
483 static void
484 svga_texture_destroy(struct pipe_texture *pt)
485 {
486 struct svga_screen *ss = svga_screen(pt->screen);
487 struct svga_texture *tex = (struct svga_texture *)pt;
488
489 ss->texture_timestamp++;
490
491 svga_sampler_view_reference(&tex->cached_view, NULL);
492
493 /*
494 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
495 */
496 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
497 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
498
499 FREE(tex);
500 }
501
502
503 static void
504 svga_texture_copy_handle(struct svga_context *svga,
505 struct svga_screen *ss,
506 struct svga_winsys_surface *src_handle,
507 unsigned src_x, unsigned src_y, unsigned src_z,
508 unsigned src_level, unsigned src_face,
509 struct svga_winsys_surface *dst_handle,
510 unsigned dst_x, unsigned dst_y, unsigned dst_z,
511 unsigned dst_level, unsigned dst_face,
512 unsigned width, unsigned height, unsigned depth)
513 {
514 struct svga_surface dst, src;
515 enum pipe_error ret;
516 SVGA3dCopyBox box, *boxes;
517
518 assert(svga || ss);
519
520 src.handle = src_handle;
521 src.real_level = src_level;
522 src.real_face = src_face;
523 src.real_zslice = 0;
524
525 dst.handle = dst_handle;
526 dst.real_level = dst_level;
527 dst.real_face = dst_face;
528 dst.real_zslice = 0;
529
530 box.x = dst_x;
531 box.y = dst_y;
532 box.z = dst_z;
533 box.w = width;
534 box.h = height;
535 box.d = depth;
536 box.srcx = src_x;
537 box.srcy = src_y;
538 box.srcz = src_z;
539
540 /*
541 SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n",
542 src_handle, src_level, src_x, src_y, src_z,
543 dst_handle, dst_level, dst_x, dst_y, dst_z);
544 */
545
546 if (svga) {
547 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
548 &src.base,
549 &dst.base,
550 &boxes, 1);
551 if(ret != PIPE_OK) {
552 svga_context_flush(svga, NULL);
553 ret = SVGA3D_BeginSurfaceCopy(svga->swc,
554 &src.base,
555 &dst.base,
556 &boxes, 1);
557 assert(ret == PIPE_OK);
558 }
559 *boxes = box;
560 SVGA_FIFOCommitAll(svga->swc);
561 } else {
562 pipe_mutex_lock(ss->swc_mutex);
563 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
564 &src.base,
565 &dst.base,
566 &boxes, 1);
567 if(ret != PIPE_OK) {
568 ss->swc->flush(ss->swc, NULL);
569 ret = SVGA3D_BeginSurfaceCopy(ss->swc,
570 &src.base,
571 &dst.base,
572 &boxes, 1);
573 assert(ret == PIPE_OK);
574 }
575 *boxes = box;
576 SVGA_FIFOCommitAll(ss->swc);
577 pipe_mutex_unlock(ss->swc_mutex);
578 }
579 }
580
581 static struct svga_winsys_surface *
582 svga_texture_view_surface(struct pipe_context *pipe,
583 struct svga_texture *tex,
584 SVGA3dSurfaceFormat format,
585 unsigned start_mip,
586 unsigned num_mip,
587 int face_pick,
588 int zslice_pick,
589 struct svga_host_surface_cache_key *key) /* OUT */
590 {
591 struct svga_screen *ss = svga_screen(tex->base.screen);
592 struct svga_winsys_surface *handle;
593 uint32_t i, j;
594 unsigned z_offset = 0;
595
596 SVGA_DBG(DEBUG_PERF,
597 "svga: Create surface view: face %d zslice %d mips %d..%d\n",
598 face_pick, zslice_pick, start_mip, start_mip+num_mip-1);
599
600 key->flags = 0;
601 key->format = format;
602 key->numMipLevels = num_mip;
603 key->size.width = tex->base.width[start_mip];
604 key->size.height = tex->base.height[start_mip];
605 key->size.depth = zslice_pick < 0 ? tex->base.depth[start_mip] : 1;
606 key->cachable = 1;
607 assert(key->size.depth == 1);
608
609 if(tex->base.target == PIPE_TEXTURE_CUBE && face_pick < 0) {
610 key->flags |= SVGA3D_SURFACE_CUBEMAP;
611 key->numFaces = 6;
612 } else {
613 key->numFaces = 1;
614 }
615
616 if(key->format == SVGA3D_FORMAT_INVALID) {
617 key->cachable = 0;
618 return NULL;
619 }
620
621 SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n");
622 handle = svga_screen_surface_create(ss, key);
623 if (!handle) {
624 key->cachable = 0;
625 return NULL;
626 }
627
628 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle);
629
630 if (face_pick < 0)
631 face_pick = 0;
632
633 if (zslice_pick >= 0)
634 z_offset = zslice_pick;
635
636 for (i = 0; i < key->numMipLevels; i++) {
637 for (j = 0; j < key->numFaces; j++) {
638 if(tex->defined[j + face_pick][i + start_mip]) {
639 unsigned depth = zslice_pick < 0 ? tex->base.depth[i + start_mip] : 1;
640 svga_texture_copy_handle(svga_context(pipe),
641 ss,
642 tex->handle,
643 0, 0, z_offset,
644 i + start_mip,
645 j + face_pick,
646 handle, 0, 0, 0, i, j,
647 tex->base.width[i + start_mip],
648 tex->base.height[i + start_mip],
649 depth);
650 }
651 }
652 }
653
654 return handle;
655 }
656
657
658 static struct pipe_surface *
659 svga_get_tex_surface(struct pipe_screen *screen,
660 struct pipe_texture *pt,
661 unsigned face, unsigned level, unsigned zslice,
662 unsigned flags)
663 {
664 struct svga_texture *tex = svga_texture(pt);
665 struct svga_surface *s;
666 boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE;
667 boolean view = FALSE;
668 SVGA3dSurfaceFormat format;
669
670 s = CALLOC_STRUCT(svga_surface);
671 if (!s)
672 return NULL;
673
674 pipe_reference_init(&s->base.reference, 1);
675 pipe_texture_reference(&s->base.texture, pt);
676 s->base.format = pt->format;
677 s->base.width = pt->width[level];
678 s->base.height = pt->height[level];
679 s->base.usage = flags;
680 s->base.level = level;
681 s->base.face = face;
682 s->base.zslice = zslice;
683
684 if (!render)
685 format = svga_translate_format(pt->format);
686 else
687 format = svga_translate_format_render(pt->format);
688
689 assert(format != SVGA3D_FORMAT_INVALID);
690 assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE));
691
692
693 if (svga_screen(screen)->debug.force_surface_view)
694 view = TRUE;
695
696 /* Currently only used for compressed textures */
697 if (render &&
698 format != svga_translate_format(pt->format)) {
699 view = TRUE;
700 }
701
702 if (level != 0 &&
703 svga_screen(screen)->debug.force_level_surface_view)
704 view = TRUE;
705
706 if (pt->target == PIPE_TEXTURE_3D)
707 view = TRUE;
708
709 if (svga_screen(screen)->debug.no_surface_view)
710 view = FALSE;
711
712 if (view) {
713 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n",
714 pt, level, face, zslice, s);
715
716 s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice,
717 &s->key);
718 s->real_face = 0;
719 s->real_level = 0;
720 s->real_zslice = 0;
721 } else {
722 SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n",
723 pt, level, face, zslice, s);
724
725 memset(&s->key, 0, sizeof s->key);
726 s->handle = tex->handle;
727 s->real_face = face;
728 s->real_level = level;
729 s->real_zslice = zslice;
730 }
731
732 return &s->base;
733 }
734
735
736 static void
737 svga_tex_surface_destroy(struct pipe_surface *surf)
738 {
739 struct svga_surface *s = svga_surface(surf);
740 struct svga_texture *t = svga_texture(surf->texture);
741 struct svga_screen *ss = svga_screen(surf->texture->screen);
742
743 if(s->handle != t->handle) {
744 SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle);
745 svga_screen_surface_destroy(ss, &s->key, &s->handle);
746 }
747
748 pipe_texture_reference(&surf->texture, NULL);
749 FREE(surf);
750 }
751
752
753 static INLINE void
754 svga_mark_surface_dirty(struct pipe_surface *surf)
755 {
756 struct svga_surface *s = svga_surface(surf);
757
758 if(!s->dirty) {
759 struct svga_texture *tex = svga_texture(surf->texture);
760
761 s->dirty = TRUE;
762
763 if (s->handle == tex->handle)
764 tex->defined[surf->face][surf->level] = TRUE;
765 else {
766 /* this will happen later in svga_propagate_surface */
767 }
768 }
769 }
770
771
772 void svga_mark_surfaces_dirty(struct svga_context *svga)
773 {
774 unsigned i;
775
776 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
777 if (svga->curr.framebuffer.cbufs[i])
778 svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]);
779 }
780 if (svga->curr.framebuffer.zsbuf)
781 svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf);
782 }
783
784 /**
785 * Progagate any changes from surfaces to texture.
786 * pipe is optional context to inline the blit command in.
787 */
788 void
789 svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf)
790 {
791 struct svga_surface *s = svga_surface(surf);
792 struct svga_texture *tex = svga_texture(surf->texture);
793 struct svga_screen *ss = svga_screen(surf->texture->screen);
794
795 if (!s->dirty)
796 return;
797
798 s->dirty = FALSE;
799 ss->texture_timestamp++;
800 tex->view_age[surf->level] = ++(tex->age);
801
802 if (s->handle != tex->handle) {
803 SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf);
804 svga_texture_copy_handle(svga_context(pipe), ss,
805 s->handle, 0, 0, 0, s->real_level, s->real_face,
806 tex->handle, 0, 0, surf->zslice, surf->level, surf->face,
807 tex->base.width[surf->level], tex->base.height[surf->level], 1);
808 tex->defined[surf->face][surf->level] = TRUE;
809 }
810 }
811
812 /**
813 * Check if we should call svga_propagate_surface on the surface.
814 */
815 extern boolean
816 svga_surface_needs_propagation(struct pipe_surface *surf)
817 {
818 struct svga_surface *s = svga_surface(surf);
819 struct svga_texture *tex = svga_texture(surf->texture);
820
821 return s->dirty && s->handle != tex->handle;
822 }
823
824
825 static struct pipe_transfer *
826 svga_get_tex_transfer(struct pipe_screen *screen,
827 struct pipe_texture *texture,
828 unsigned face, unsigned level, unsigned zslice,
829 enum pipe_transfer_usage usage, unsigned x, unsigned y,
830 unsigned w, unsigned h)
831 {
832 struct svga_screen *ss = svga_screen(screen);
833 struct svga_winsys_screen *sws = ss->sws;
834 struct svga_transfer *st;
835
836 /* We can't map texture storage directly */
837 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
838 return NULL;
839
840 st = CALLOC_STRUCT(svga_transfer);
841 if (!st)
842 return NULL;
843
844 st->base.format = texture->format;
845 st->base.block = texture->block;
846 st->base.x = x;
847 st->base.y = y;
848 st->base.width = w;
849 st->base.height = h;
850 st->base.nblocksx = pf_get_nblocksx(&texture->block, w);
851 st->base.nblocksy = pf_get_nblocksy(&texture->block, h);
852 st->base.stride = st->base.nblocksx*st->base.block.size;
853 st->base.usage = usage;
854 st->base.face = face;
855 st->base.level = level;
856 st->base.zslice = zslice;
857
858 st->hw_nblocksy = st->base.nblocksy;
859
860 st->hwbuf = svga_winsys_buffer_create(ss,
861 1,
862 0,
863 st->hw_nblocksy*st->base.stride);
864 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
865 st->hwbuf = svga_winsys_buffer_create(ss,
866 1,
867 0,
868 st->hw_nblocksy*st->base.stride);
869 }
870
871 if(!st->hwbuf)
872 goto no_hwbuf;
873
874 if(st->hw_nblocksy < st->base.nblocksy) {
875 /* We couldn't allocate a hardware buffer big enough for the transfer,
876 * so allocate regular malloc memory instead */
877 debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n",
878 __FUNCTION__,
879 (st->base.nblocksy*st->base.stride + 1023)/1024,
880 (st->base.nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
881 (st->hw_nblocksy*st->base.stride + 1023)/1024);
882 st->swbuf = MALLOC(st->base.nblocksy*st->base.stride);
883 if(!st->swbuf)
884 goto no_swbuf;
885 }
886
887 pipe_texture_reference(&st->base.texture, texture);
888
889 if (usage & PIPE_TRANSFER_READ)
890 svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM);
891
892 return &st->base;
893
894 no_swbuf:
895 sws->buffer_destroy(sws, st->hwbuf);
896 no_hwbuf:
897 FREE(st);
898 return NULL;
899 }
900
901
902 static void *
903 svga_transfer_map( struct pipe_screen *screen,
904 struct pipe_transfer *transfer )
905 {
906 struct svga_screen *ss = svga_screen(screen);
907 struct svga_winsys_screen *sws = ss->sws;
908 struct svga_transfer *st = svga_transfer(transfer);
909
910 if(st->swbuf)
911 return st->swbuf;
912 else
913 /* The wait for read transfers already happened when svga_transfer_dma
914 * was called. */
915 return sws->buffer_map(sws, st->hwbuf,
916 pipe_transfer_buffer_flags(transfer));
917 }
918
919
920 static void
921 svga_transfer_unmap(struct pipe_screen *screen,
922 struct pipe_transfer *transfer)
923 {
924 struct svga_screen *ss = svga_screen(screen);
925 struct svga_winsys_screen *sws = ss->sws;
926 struct svga_transfer *st = svga_transfer(transfer);
927
928 if(!st->swbuf)
929 sws->buffer_unmap(sws, st->hwbuf);
930 }
931
932
933 static void
934 svga_tex_transfer_destroy(struct pipe_transfer *transfer)
935 {
936 struct svga_texture *tex = svga_texture(transfer->texture);
937 struct svga_screen *ss = svga_screen(transfer->texture->screen);
938 struct svga_winsys_screen *sws = ss->sws;
939 struct svga_transfer *st = svga_transfer(transfer);
940
941 if (st->base.usage & PIPE_TRANSFER_WRITE) {
942 svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM);
943 ss->texture_timestamp++;
944 tex->view_age[transfer->level] = ++(tex->age);
945 tex->defined[transfer->face][transfer->level] = TRUE;
946 }
947
948 pipe_texture_reference(&st->base.texture, NULL);
949 FREE(st->swbuf);
950 sws->buffer_destroy(sws, st->hwbuf);
951 FREE(st);
952 }
953
954 void
955 svga_screen_init_texture_functions(struct pipe_screen *screen)
956 {
957 screen->texture_create = svga_texture_create;
958 screen->texture_destroy = svga_texture_destroy;
959 screen->get_tex_surface = svga_get_tex_surface;
960 screen->tex_surface_destroy = svga_tex_surface_destroy;
961 screen->texture_blanket = svga_texture_blanket;
962 screen->get_tex_transfer = svga_get_tex_transfer;
963 screen->transfer_map = svga_transfer_map;
964 screen->transfer_unmap = svga_transfer_unmap;
965 screen->tex_transfer_destroy = svga_tex_transfer_destroy;
966 }
967
968 /***********************************************************************
969 */
970
971 struct svga_sampler_view *
972 svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt,
973 unsigned min_lod, unsigned max_lod)
974 {
975 struct svga_screen *ss = svga_screen(pt->screen);
976 struct svga_texture *tex = svga_texture(pt);
977 struct svga_sampler_view *sv = NULL;
978 SVGA3dSurfaceFormat format = svga_translate_format(pt->format);
979 boolean view = TRUE;
980
981 assert(pt);
982 assert(min_lod >= 0);
983 assert(min_lod <= max_lod);
984 assert(max_lod <= pt->last_level);
985
986
987 /* Is a view needed */
988 {
989 /*
990 * Can't control max lod. For first level views and when we only
991 * look at one level we disable mip filtering to achive the same
992 * results as a view.
993 */
994 if (min_lod == 0 && max_lod >= pt->last_level)
995 view = FALSE;
996
997 if (pf_is_compressed(pt->format) && view) {
998 format = svga_translate_format_render(pt->format);
999 }
1000
1001 if (ss->debug.no_sampler_view)
1002 view = FALSE;
1003
1004 if (ss->debug.force_sampler_view)
1005 view = TRUE;
1006 }
1007
1008 /* First try the cache */
1009 if (view) {
1010 pipe_mutex_lock(ss->tex_mutex);
1011 if (tex->cached_view &&
1012 tex->cached_view->min_lod == min_lod &&
1013 tex->cached_view->max_lod == max_lod) {
1014 svga_sampler_view_reference(&sv, tex->cached_view);
1015 pipe_mutex_unlock(ss->tex_mutex);
1016 SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n",
1017 pt, min_lod, max_lod, pt->last_level);
1018 svga_validate_sampler_view(svga_context(pipe), sv);
1019 return sv;
1020 }
1021 pipe_mutex_unlock(ss->tex_mutex);
1022 }
1023
1024 sv = CALLOC_STRUCT(svga_sampler_view);
1025 pipe_reference_init(&sv->reference, 1);
1026 pipe_texture_reference(&sv->texture, pt);
1027 sv->min_lod = min_lod;
1028 sv->max_lod = max_lod;
1029
1030 /* No view needed just use the whole texture */
1031 if (!view) {
1032 SVGA_DBG(DEBUG_VIEWS,
1033 "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1034 pt, min_lod, max_lod,
1035 max_lod - min_lod + 1,
1036 pt->width[0],
1037 pt->height[0],
1038 pt->depth[0],
1039 pt->last_level);
1040 sv->key.cachable = 0;
1041 sv->handle = tex->handle;
1042 return sv;
1043 }
1044
1045 SVGA_DBG(DEBUG_VIEWS,
1046 "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n",
1047 pt, min_lod, max_lod,
1048 max_lod - min_lod + 1,
1049 pt->width[0],
1050 pt->height[0],
1051 pt->depth[0],
1052 pt->last_level);
1053
1054 sv->age = tex->age;
1055 sv->handle = svga_texture_view_surface(pipe, tex, format,
1056 min_lod,
1057 max_lod - min_lod + 1,
1058 -1, -1,
1059 &sv->key);
1060
1061 if (!sv->handle) {
1062 assert(0);
1063 sv->key.cachable = 0;
1064 sv->handle = tex->handle;
1065 return sv;
1066 }
1067
1068 pipe_mutex_lock(ss->tex_mutex);
1069 svga_sampler_view_reference(&tex->cached_view, sv);
1070 pipe_mutex_unlock(ss->tex_mutex);
1071
1072 return sv;
1073 }
1074
1075 void
1076 svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v)
1077 {
1078 struct svga_texture *tex = svga_texture(v->texture);
1079 unsigned numFaces;
1080 unsigned age = 0;
1081 int i, k;
1082
1083 assert(svga);
1084
1085 if (v->handle == tex->handle)
1086 return;
1087
1088 age = tex->age;
1089
1090 if(tex->base.target == PIPE_TEXTURE_CUBE)
1091 numFaces = 6;
1092 else
1093 numFaces = 1;
1094
1095 for (i = v->min_lod; i <= v->max_lod; i++) {
1096 for (k = 0; k < numFaces; k++) {
1097 if (v->age < tex->view_age[i])
1098 svga_texture_copy_handle(svga, NULL,
1099 tex->handle, 0, 0, 0, i, k,
1100 v->handle, 0, 0, 0, i - v->min_lod, k,
1101 tex->base.width[i],
1102 tex->base.height[i],
1103 tex->base.depth[i]);
1104 }
1105 }
1106
1107 v->age = age;
1108 }
1109
1110 void
1111 svga_destroy_sampler_view_priv(struct svga_sampler_view *v)
1112 {
1113 struct svga_texture *tex = svga_texture(v->texture);
1114
1115 if(v->handle != tex->handle) {
1116 struct svga_screen *ss = svga_screen(v->texture->screen);
1117 SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle);
1118 svga_screen_surface_destroy(ss, &v->key, &v->handle);
1119 }
1120 pipe_texture_reference(&v->texture, NULL);
1121 FREE(v);
1122 }
1123
1124 boolean
1125 svga_screen_buffer_from_texture(struct pipe_texture *texture,
1126 struct pipe_buffer **buffer,
1127 unsigned *stride)
1128 {
1129 struct svga_texture *stex = svga_texture(texture);
1130
1131 *buffer = svga_screen_buffer_wrap_surface
1132 (texture->screen,
1133 svga_translate_format(texture->format),
1134 stex->handle);
1135
1136 *stride = pf_get_nblocksx(&texture->block, texture->width[0]) *
1137 texture->block.size;
1138
1139 return *buffer != NULL;
1140 }
1141
1142
1143 struct svga_winsys_surface *
1144 svga_screen_texture_get_winsys_surface(struct pipe_texture *texture)
1145 {
1146 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
1147 struct svga_winsys_surface *vsurf = NULL;
1148
1149 assert(svga_texture(texture)->key.cachable == 0);
1150 svga_texture(texture)->key.cachable = 0;
1151 sws->surface_reference(sws, &vsurf, svga_texture(texture)->handle);
1152 return vsurf;
1153 }