v3d: Add support for shader_image_load_store.
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "v3d_drm.h"
40 #include "v3d_screen.h"
41
42 struct v3d_job;
43 struct v3d_bo;
44 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
45
46 #include "v3d_bufmgr.h"
47 #include "v3d_resource.h"
48 #include "v3d_cl.h"
49
50 #ifdef USE_V3D_SIMULATOR
51 #define using_v3d_simulator true
52 #else
53 #define using_v3d_simulator false
54 #endif
55
56 #define VC5_DIRTY_BLEND (1 << 0)
57 #define VC5_DIRTY_RASTERIZER (1 << 1)
58 #define VC5_DIRTY_ZSA (1 << 2)
59 #define VC5_DIRTY_FRAGTEX (1 << 3)
60 #define VC5_DIRTY_VERTTEX (1 << 4)
61 #define VC5_DIRTY_SHADER_IMAGE (1 << 5)
62
63 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
64 #define VC5_DIRTY_STENCIL_REF (1 << 8)
65 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
66 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
67 #define VC5_DIRTY_STIPPLE (1 << 11)
68 #define VC5_DIRTY_VIEWPORT (1 << 12)
69 #define VC5_DIRTY_CONSTBUF (1 << 13)
70 #define VC5_DIRTY_VTXSTATE (1 << 14)
71 #define VC5_DIRTY_VTXBUF (1 << 15)
72 #define VC5_DIRTY_SCISSOR (1 << 17)
73 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
74 #define VC5_DIRTY_PRIM_MODE (1 << 19)
75 #define VC5_DIRTY_CLIP (1 << 20)
76 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
77 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
78 #define VC5_DIRTY_COMPILED_CS (1 << 23)
79 #define VC5_DIRTY_COMPILED_VS (1 << 24)
80 #define VC5_DIRTY_COMPILED_FS (1 << 25)
81 #define VC5_DIRTY_FS_INPUTS (1 << 26)
82 #define VC5_DIRTY_STREAMOUT (1 << 27)
83 #define VC5_DIRTY_OQ (1 << 28)
84 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
85 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
86 #define VC5_DIRTY_SSBO (1 << 31)
87
88 #define VC5_MAX_FS_INPUTS 64
89
90 struct v3d_sampler_view {
91 struct pipe_sampler_view base;
92 uint32_t p0;
93 uint32_t p1;
94 /* Precomputed swizzles to pass in to the shader key. */
95 uint8_t swizzle[4];
96
97 uint8_t texture_shader_state[32];
98 /* V3D 4.x: Texture state struct. */
99 struct v3d_bo *bo;
100
101 /* Actual texture to be read by this sampler view. May be different
102 * from base.texture in the case of having a shadow tiled copy of a
103 * raster texture.
104 */
105 struct pipe_resource *texture;
106 };
107
108 struct v3d_sampler_state {
109 struct pipe_sampler_state base;
110 uint32_t p0;
111 uint32_t p1;
112
113 /* V3D 3.x: Packed texture state. */
114 uint8_t texture_shader_state[32];
115 /* V3D 4.x: Sampler state struct. */
116 struct v3d_bo *bo;
117 };
118
119 struct v3d_texture_stateobj {
120 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
121 unsigned num_textures;
122 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
123 unsigned num_samplers;
124 struct v3d_cl_reloc texture_state[PIPE_MAX_SAMPLERS];
125 };
126
127 struct v3d_shader_uniform_info {
128 enum quniform_contents *contents;
129 uint32_t *data;
130 uint32_t count;
131 };
132
133 struct v3d_uncompiled_shader {
134 /** A name for this program, so you can track it in shader-db output. */
135 uint32_t program_id;
136 /** How many variants of this program were compiled, for shader-db. */
137 uint32_t compiled_variant_count;
138 struct pipe_shader_state base;
139 uint32_t num_tf_outputs;
140 struct v3d_varying_slot *tf_outputs;
141 uint16_t tf_specs[16];
142 uint16_t tf_specs_psiz[16];
143 uint32_t num_tf_specs;
144
145 /**
146 * Flag for if the NIR in this shader originally came from TGSI. If
147 * so, we need to do some fixups at compile time, due to missing
148 * information in TGSI that exists in NIR.
149 */
150 bool was_tgsi;
151 };
152
153 struct v3d_compiled_shader {
154 struct pipe_resource *resource;
155 uint32_t offset;
156
157 union {
158 struct v3d_prog_data *base;
159 struct v3d_vs_prog_data *vs;
160 struct v3d_fs_prog_data *fs;
161 } prog_data;
162
163 /**
164 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
165 * uniforms have to be rewritten (and therefore the shader state
166 * reemitted).
167 */
168 uint32_t uniform_dirty_bits;
169 };
170
171 struct v3d_program_stateobj {
172 struct v3d_uncompiled_shader *bind_vs, *bind_fs;
173 struct v3d_compiled_shader *cs, *vs, *fs;
174
175 struct v3d_bo *spill_bo;
176 int spill_size_per_thread;
177 };
178
179 struct v3d_constbuf_stateobj {
180 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
181 uint32_t enabled_mask;
182 uint32_t dirty_mask;
183 };
184
185 struct v3d_vertexbuf_stateobj {
186 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
187 unsigned count;
188 uint32_t enabled_mask;
189 uint32_t dirty_mask;
190 };
191
192 struct v3d_vertex_stateobj {
193 struct pipe_vertex_element pipe[VC5_MAX_ATTRIBUTES];
194 unsigned num_elements;
195
196 uint8_t attrs[16 * VC5_MAX_ATTRIBUTES];
197 struct pipe_resource *defaults;
198 uint32_t defaults_offset;
199 };
200
201 struct v3d_streamout_stateobj {
202 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
203 /* Number of vertices we've written into the buffer so far. */
204 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
205 unsigned num_targets;
206 };
207
208 struct v3d_ssbo_stateobj {
209 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
210 uint32_t enabled_mask;
211 };
212
213 /* Hash table key for v3d->jobs */
214 struct v3d_job_key {
215 struct pipe_surface *cbufs[4];
216 struct pipe_surface *zsbuf;
217 };
218
219 enum v3d_ez_state {
220 VC5_EZ_UNDECIDED = 0,
221 VC5_EZ_GT_GE,
222 VC5_EZ_LT_LE,
223 VC5_EZ_DISABLED,
224 };
225
226 struct v3d_image_view {
227 struct pipe_image_view base;
228 /* V3D 4.x texture shader state struct */
229 struct pipe_resource *tex_state;
230 uint32_t tex_state_offset;
231 };
232
233 struct v3d_shaderimg_stateobj {
234 struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
235 uint32_t enabled_mask;
236 };
237
238 /**
239 * A complete bin/render job.
240 *
241 * This is all of the state necessary to submit a bin/render to the kernel.
242 * We want to be able to have multiple in progress at a time, so that we don't
243 * need to flush an existing CL just to switch to rendering to a new render
244 * target (which would mean reading back from the old render target when
245 * starting to render to it again).
246 */
247 struct v3d_job {
248 struct v3d_context *v3d;
249 struct v3d_cl bcl;
250 struct v3d_cl rcl;
251 struct v3d_cl indirect;
252 struct v3d_bo *tile_alloc;
253 struct v3d_bo *tile_state;
254 uint32_t shader_rec_count;
255
256 struct drm_v3d_submit_cl submit;
257
258 /**
259 * Set of all BOs referenced by the job. This will be used for making
260 * the list of BOs that the kernel will need to have paged in to
261 * execute our job.
262 */
263 struct set *bos;
264
265 /** Sum of the sizes of the BOs referenced by the job. */
266 uint32_t referenced_size;
267
268 struct set *write_prscs;
269
270 /* Size of the submit.bo_handles array. */
271 uint32_t bo_handles_size;
272
273 /** @{ Surfaces to submit rendering for. */
274 struct pipe_surface *cbufs[4];
275 struct pipe_surface *zsbuf;
276 /** @} */
277 /** @{
278 * Bounding box of the scissor across all queued drawing.
279 *
280 * Note that the max values are exclusive.
281 */
282 uint32_t draw_min_x;
283 uint32_t draw_min_y;
284 uint32_t draw_max_x;
285 uint32_t draw_max_y;
286 /** @} */
287 /** @{
288 * Width/height of the color framebuffer being rendered to,
289 * for VC5_TILE_RENDERING_MODE_CONFIG.
290 */
291 uint32_t draw_width;
292 uint32_t draw_height;
293 /** @} */
294 /** @{ Tile information, depending on MSAA and float color buffer. */
295 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
296 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
297
298 uint32_t tile_width; /** @< Width of a tile. */
299 uint32_t tile_height; /** @< Height of a tile. */
300 /** maximum internal_bpp of all color render targets. */
301 uint32_t internal_bpp;
302
303 /** Whether the current rendering is in a 4X MSAA tile buffer. */
304 bool msaa;
305 /** @} */
306
307 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
308 * first rendering.
309 */
310 uint32_t clear;
311 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
312 * call without having been cleared first.
313 */
314 uint32_t load;
315 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
316 * (either clears or draws) and should be stored.
317 */
318 uint32_t store;
319 uint32_t clear_color[4][4];
320 float clear_z;
321 uint8_t clear_s;
322
323 /**
324 * Set if some drawing (triangles, blits, or just a glClear()) has
325 * been done to the FBO, meaning that we need to
326 * DRM_IOCTL_VC5_SUBMIT_CL.
327 */
328 bool needs_flush;
329
330 /* Set if any shader has dirtied cachelines in the TMU that need to be
331 * flushed before job end.
332 */
333 bool tmu_dirty_rcl;
334
335 /**
336 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
337 */
338 bool tf_enabled;
339
340 /**
341 * Current EZ state for drawing. Updated at the start of draw after
342 * we've decided on the shader being rendered.
343 */
344 enum v3d_ez_state ez_state;
345 /**
346 * The first EZ state that was used for drawing with a decided EZ
347 * direction (so either UNDECIDED, GT, or LT).
348 */
349 enum v3d_ez_state first_ez_state;
350
351 /**
352 * Number of draw calls (not counting full buffer clears) queued in
353 * the current job.
354 */
355 uint32_t draw_calls_queued;
356
357 struct v3d_job_key key;
358 };
359
360 struct v3d_context {
361 struct pipe_context base;
362
363 int fd;
364 struct v3d_screen *screen;
365
366 /** The 3D rendering job for the currently bound FBO. */
367 struct v3d_job *job;
368
369 /* Map from struct v3d_job_key to the job for that FBO.
370 */
371 struct hash_table *jobs;
372
373 /**
374 * Map from v3d_resource to a job writing to that resource.
375 *
376 * Primarily for flushing jobs rendering to textures that are now
377 * being read from.
378 */
379 struct hash_table *write_jobs;
380
381 struct slab_child_pool transfer_pool;
382 struct blitter_context *blitter;
383
384 /** bitfield of VC5_DIRTY_* */
385 uint32_t dirty;
386
387 struct primconvert_context *primconvert;
388
389 struct hash_table *fs_cache, *vs_cache;
390 uint32_t next_uncompiled_program_id;
391 uint64_t next_compiled_program_id;
392
393 struct v3d_compiler_state *compiler_state;
394
395 uint8_t prim_mode;
396
397 /** Maximum index buffer valid for the current shader_rec. */
398 uint32_t max_index;
399
400 /** Sync object that our RCL or TFU job will update as its out_sync. */
401 uint32_t out_sync;
402
403 /* Stream uploader used by gallium internals. This could also be used
404 * by driver internals, but we tend to use the v3d_cl.h interfaces
405 * instead.
406 */
407 struct u_upload_mgr *uploader;
408 /* State uploader used inside the driver. This is for packing bits of
409 * long-term state inside buffers, since the kernel interfaces
410 * allocate a page at a time.
411 */
412 struct u_upload_mgr *state_uploader;
413
414 /** @{ Current pipeline state objects */
415 struct pipe_scissor_state scissor;
416 struct v3d_blend_state *blend;
417 struct v3d_rasterizer_state *rasterizer;
418 struct v3d_depth_stencil_alpha_state *zsa;
419
420 struct v3d_program_stateobj prog;
421
422 struct v3d_vertex_stateobj *vtx;
423
424 struct {
425 struct pipe_blend_color f;
426 uint16_t hf[4];
427 } blend_color;
428 struct pipe_stencil_ref stencil_ref;
429 unsigned sample_mask;
430 struct pipe_framebuffer_state framebuffer;
431
432 /* Per render target, whether we should swap the R and B fields in the
433 * shader's color output and in blending. If render targets disagree
434 * on the R/B swap and use the constant color, then we would need to
435 * fall back to in-shader blending.
436 */
437 uint8_t swap_color_rb;
438
439 /* Per render target, whether we should treat the dst alpha values as
440 * one in blending.
441 *
442 * For RGBX formats, the tile buffer's alpha channel will be
443 * undefined.
444 */
445 uint8_t blend_dst_alpha_one;
446
447 bool active_queries;
448
449 uint32_t tf_prims_generated;
450 uint32_t prims_generated;
451
452 struct pipe_poly_stipple stipple;
453 struct pipe_clip_state clip;
454 struct pipe_viewport_state viewport;
455 struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
456 struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
457 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
458 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
459 struct v3d_vertexbuf_stateobj vertexbuf;
460 struct v3d_streamout_stateobj streamout;
461 struct v3d_bo *current_oq;
462 struct pipe_debug_callback debug;
463 /** @} */
464 };
465
466 struct v3d_rasterizer_state {
467 struct pipe_rasterizer_state base;
468
469 float point_size;
470
471 uint8_t depth_offset[9];
472 uint8_t depth_offset_z16[9];
473 };
474
475 struct v3d_depth_stencil_alpha_state {
476 struct pipe_depth_stencil_alpha_state base;
477
478 enum v3d_ez_state ez_state;
479
480 uint8_t stencil_front[6];
481 uint8_t stencil_back[6];
482 };
483
484 struct v3d_blend_state {
485 struct pipe_blend_state base;
486
487 /* Per-RT mask of whether blending is enabled. */
488 uint8_t blend_enables;
489 };
490
491 #define perf_debug(...) do { \
492 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
493 fprintf(stderr, __VA_ARGS__); \
494 if (unlikely(v3d->debug.debug_message)) \
495 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
496 } while (0)
497
498 #define foreach_bit(b, mask) \
499 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
500
501 static inline struct v3d_context *
502 v3d_context(struct pipe_context *pcontext)
503 {
504 return (struct v3d_context *)pcontext;
505 }
506
507 static inline struct v3d_sampler_view *
508 v3d_sampler_view(struct pipe_sampler_view *psview)
509 {
510 return (struct v3d_sampler_view *)psview;
511 }
512
513 static inline struct v3d_sampler_state *
514 v3d_sampler_state(struct pipe_sampler_state *psampler)
515 {
516 return (struct v3d_sampler_state *)psampler;
517 }
518
519 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
520 void *priv, unsigned flags);
521 void v3d_program_init(struct pipe_context *pctx);
522 void v3d_program_fini(struct pipe_context *pctx);
523 void v3d_query_init(struct pipe_context *pctx);
524
525 void v3d_simulator_init(struct v3d_screen *screen);
526 void v3d_simulator_destroy(struct v3d_screen *screen);
527 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
528 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
529
530 static inline int
531 v3d_ioctl(int fd, unsigned long request, void *arg)
532 {
533 if (using_v3d_simulator)
534 return v3d_simulator_ioctl(fd, request, arg);
535 else
536 return drmIoctl(fd, request, arg);
537 }
538
539 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
540 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
541 struct v3d_compiled_shader *shader,
542 enum pipe_shader_type stage);
543
544 void v3d_flush(struct pipe_context *pctx);
545 void v3d_job_init(struct v3d_context *v3d);
546 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
547 struct pipe_surface **cbufs,
548 struct pipe_surface *zsbuf);
549 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
550 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
551 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
552 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
553 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
554 struct pipe_resource *prsc);
555 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
556 struct pipe_resource *prsc);
557 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
558
559 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
560 enum pipe_format f);
561 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
562 enum pipe_format f);
563 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
564 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
565 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
566 enum pipe_format f,
567 enum pipe_tex_compare compare);
568 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
569 enum pipe_format f);
570 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
571 enum pipe_format f);
572 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
573 uint32_t format,
574 uint32_t *type,
575 uint32_t *bpp);
576 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
577 uint32_t tex_format);
578
579 void v3d_init_query_functions(struct v3d_context *v3d);
580 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
581 void v3d_blitter_save(struct v3d_context *v3d);
582 boolean v3d_generate_mipmap(struct pipe_context *pctx,
583 struct pipe_resource *prsc,
584 enum pipe_format format,
585 unsigned int base_level,
586 unsigned int last_level,
587 unsigned int first_layer,
588 unsigned int last_layer);
589
590 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
591
592 #ifdef v3dX
593 # include "v3dx_context.h"
594 #else
595 # define v3dX(x) v3d33_##x
596 # include "v3dx_context.h"
597 # undef v3dX
598
599 # define v3dX(x) v3d41_##x
600 # include "v3dx_context.h"
601 # undef v3dX
602 #endif
603
604 #endif /* VC5_CONTEXT_H */