5f19504dbae10d2c42c61aa013807f3f09329a3b
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "drm-uapi/v3d_drm.h"
40 #include "v3d_screen.h"
41 #include "broadcom/common/v3d_limits.h"
42
43 struct v3d_job;
44 struct v3d_bo;
45 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
46
47 #include "v3d_bufmgr.h"
48 #include "v3d_resource.h"
49 #include "v3d_cl.h"
50
51 #ifdef USE_V3D_SIMULATOR
52 #define using_v3d_simulator true
53 #else
54 #define using_v3d_simulator false
55 #endif
56
57 #define VC5_DIRTY_BLEND (1 << 0)
58 #define VC5_DIRTY_RASTERIZER (1 << 1)
59 #define VC5_DIRTY_ZSA (1 << 2)
60 #define VC5_DIRTY_FRAGTEX (1 << 3)
61 #define VC5_DIRTY_VERTTEX (1 << 4)
62 #define VC5_DIRTY_SHADER_IMAGE (1 << 5)
63
64 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
65 #define VC5_DIRTY_STENCIL_REF (1 << 8)
66 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
67 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
68 #define VC5_DIRTY_STIPPLE (1 << 11)
69 #define VC5_DIRTY_VIEWPORT (1 << 12)
70 #define VC5_DIRTY_CONSTBUF (1 << 13)
71 #define VC5_DIRTY_VTXSTATE (1 << 14)
72 #define VC5_DIRTY_VTXBUF (1 << 15)
73 #define VC5_DIRTY_SCISSOR (1 << 17)
74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
75 #define VC5_DIRTY_PRIM_MODE (1 << 19)
76 #define VC5_DIRTY_CLIP (1 << 20)
77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
79 #define VC5_DIRTY_COMPILED_CS (1 << 23)
80 #define VC5_DIRTY_COMPILED_VS (1 << 24)
81 #define VC5_DIRTY_COMPILED_FS (1 << 25)
82 #define VC5_DIRTY_FS_INPUTS (1 << 26)
83 #define VC5_DIRTY_STREAMOUT (1 << 27)
84 #define VC5_DIRTY_OQ (1 << 28)
85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
87 #define VC5_DIRTY_SSBO (1 << 31)
88
89 #define VC5_MAX_FS_INPUTS 64
90
91 enum v3d_sampler_state_variant {
92 V3D_SAMPLER_STATE_BORDER_0,
93 V3D_SAMPLER_STATE_F16,
94 V3D_SAMPLER_STATE_F16_UNORM,
95 V3D_SAMPLER_STATE_F16_SNORM,
96 V3D_SAMPLER_STATE_F16_BGRA,
97 V3D_SAMPLER_STATE_F16_BGRA_UNORM,
98 V3D_SAMPLER_STATE_F16_BGRA_SNORM,
99 V3D_SAMPLER_STATE_F16_A,
100 V3D_SAMPLER_STATE_F16_A_SNORM,
101 V3D_SAMPLER_STATE_F16_A_UNORM,
102 V3D_SAMPLER_STATE_F16_LA,
103 V3D_SAMPLER_STATE_F16_LA_UNORM,
104 V3D_SAMPLER_STATE_F16_LA_SNORM,
105 V3D_SAMPLER_STATE_32,
106 V3D_SAMPLER_STATE_32_UNORM,
107 V3D_SAMPLER_STATE_32_SNORM,
108 V3D_SAMPLER_STATE_32_A,
109 V3D_SAMPLER_STATE_32_A_UNORM,
110 V3D_SAMPLER_STATE_32_A_SNORM,
111 V3D_SAMPLER_STATE_1010102U,
112 V3D_SAMPLER_STATE_16U,
113 V3D_SAMPLER_STATE_16I,
114 V3D_SAMPLER_STATE_8I,
115 V3D_SAMPLER_STATE_8U,
116
117 V3D_SAMPLER_STATE_VARIANT_COUNT,
118 };
119
120 struct v3d_sampler_view {
121 struct pipe_sampler_view base;
122 uint32_t p0;
123 uint32_t p1;
124 /* Precomputed swizzles to pass in to the shader key. */
125 uint8_t swizzle[4];
126
127 uint8_t texture_shader_state[32];
128 /* V3D 4.x: Texture state struct. */
129 struct v3d_bo *bo;
130
131 enum v3d_sampler_state_variant sampler_variant;
132
133 /* Actual texture to be read by this sampler view. May be different
134 * from base.texture in the case of having a shadow tiled copy of a
135 * raster texture.
136 */
137 struct pipe_resource *texture;
138 };
139
140 struct v3d_sampler_state {
141 struct pipe_sampler_state base;
142 uint32_t p0;
143 uint32_t p1;
144
145 /* V3D 3.x: Packed texture state. */
146 uint8_t texture_shader_state[32];
147 /* V3D 4.x: Sampler state struct. */
148 struct pipe_resource *sampler_state;
149 uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT];
150
151 bool border_color_variants;
152 };
153
154 struct v3d_texture_stateobj {
155 struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];
156 unsigned num_textures;
157 struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];
158 unsigned num_samplers;
159 struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];
160 };
161
162 struct v3d_shader_uniform_info {
163 enum quniform_contents *contents;
164 uint32_t *data;
165 uint32_t count;
166 };
167
168 struct v3d_uncompiled_shader {
169 /** A name for this program, so you can track it in shader-db output. */
170 uint32_t program_id;
171 /** How many variants of this program were compiled, for shader-db. */
172 uint32_t compiled_variant_count;
173 struct pipe_shader_state base;
174 uint32_t num_tf_outputs;
175 struct v3d_varying_slot *tf_outputs;
176 uint16_t tf_specs[16];
177 uint16_t tf_specs_psiz[16];
178 uint32_t num_tf_specs;
179 };
180
181 struct v3d_compiled_shader {
182 struct pipe_resource *resource;
183 uint32_t offset;
184
185 union {
186 struct v3d_prog_data *base;
187 struct v3d_vs_prog_data *vs;
188 struct v3d_fs_prog_data *fs;
189 struct v3d_compute_prog_data *compute;
190 } prog_data;
191
192 /**
193 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
194 * uniforms have to be rewritten (and therefore the shader state
195 * reemitted).
196 */
197 uint32_t uniform_dirty_bits;
198 };
199
200 struct v3d_program_stateobj {
201 struct v3d_uncompiled_shader *bind_vs, *bind_fs, *bind_compute;
202 struct v3d_compiled_shader *cs, *vs, *fs, *compute;
203
204 struct hash_table *cache[MESA_SHADER_STAGES];
205
206 struct v3d_bo *spill_bo;
207 int spill_size_per_thread;
208 };
209
210 struct v3d_constbuf_stateobj {
211 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
212 uint32_t enabled_mask;
213 uint32_t dirty_mask;
214 };
215
216 struct v3d_vertexbuf_stateobj {
217 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
218 unsigned count;
219 uint32_t enabled_mask;
220 uint32_t dirty_mask;
221 };
222
223 struct v3d_vertex_stateobj {
224 struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];
225 unsigned num_elements;
226
227 uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];
228 struct pipe_resource *defaults;
229 uint32_t defaults_offset;
230 };
231
232 struct v3d_stream_output_target {
233 struct pipe_stream_output_target base;
234 /* Number of transform feedback vertices written to this target */
235 uint32_t recorded_vertex_count;
236 };
237
238 struct v3d_streamout_stateobj {
239 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
240 /* Number of vertices we've written into the buffer so far. */
241 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
242 unsigned num_targets;
243 };
244
245 struct v3d_ssbo_stateobj {
246 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
247 uint32_t enabled_mask;
248 };
249
250 /* Hash table key for v3d->jobs */
251 struct v3d_job_key {
252 struct pipe_surface *cbufs[4];
253 struct pipe_surface *zsbuf;
254 };
255
256 enum v3d_ez_state {
257 VC5_EZ_UNDECIDED = 0,
258 VC5_EZ_GT_GE,
259 VC5_EZ_LT_LE,
260 VC5_EZ_DISABLED,
261 };
262
263 struct v3d_image_view {
264 struct pipe_image_view base;
265 /* V3D 4.x texture shader state struct */
266 struct pipe_resource *tex_state;
267 uint32_t tex_state_offset;
268 };
269
270 struct v3d_shaderimg_stateobj {
271 struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
272 uint32_t enabled_mask;
273 };
274
275 /**
276 * A complete bin/render job.
277 *
278 * This is all of the state necessary to submit a bin/render to the kernel.
279 * We want to be able to have multiple in progress at a time, so that we don't
280 * need to flush an existing CL just to switch to rendering to a new render
281 * target (which would mean reading back from the old render target when
282 * starting to render to it again).
283 */
284 struct v3d_job {
285 struct v3d_context *v3d;
286 struct v3d_cl bcl;
287 struct v3d_cl rcl;
288 struct v3d_cl indirect;
289 struct v3d_bo *tile_alloc;
290 struct v3d_bo *tile_state;
291 uint32_t shader_rec_count;
292
293 struct drm_v3d_submit_cl submit;
294
295 /**
296 * Set of all BOs referenced by the job. This will be used for making
297 * the list of BOs that the kernel will need to have paged in to
298 * execute our job.
299 */
300 struct set *bos;
301
302 /** Sum of the sizes of the BOs referenced by the job. */
303 uint32_t referenced_size;
304
305 struct set *write_prscs;
306 struct set *tf_write_prscs;
307
308 /* Size of the submit.bo_handles array. */
309 uint32_t bo_handles_size;
310
311 /** @{ Surfaces to submit rendering for. */
312 struct pipe_surface *cbufs[4];
313 struct pipe_surface *zsbuf;
314 /** @} */
315 /** @{
316 * Bounding box of the scissor across all queued drawing.
317 *
318 * Note that the max values are exclusive.
319 */
320 uint32_t draw_min_x;
321 uint32_t draw_min_y;
322 uint32_t draw_max_x;
323 uint32_t draw_max_y;
324 /** @} */
325 /** @{
326 * Width/height of the color framebuffer being rendered to,
327 * for VC5_TILE_RENDERING_MODE_CONFIG.
328 */
329 uint32_t draw_width;
330 uint32_t draw_height;
331 /** @} */
332 /** @{ Tile information, depending on MSAA and float color buffer. */
333 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
334 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
335
336 uint32_t tile_width; /** @< Width of a tile. */
337 uint32_t tile_height; /** @< Height of a tile. */
338 /** maximum internal_bpp of all color render targets. */
339 uint32_t internal_bpp;
340
341 /** Whether the current rendering is in a 4X MSAA tile buffer. */
342 bool msaa;
343 /** @} */
344
345 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
346 * first rendering.
347 */
348 uint32_t clear;
349 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
350 * call without having been cleared first.
351 */
352 uint32_t load;
353 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
354 * (either clears or draws) and should be stored.
355 */
356 uint32_t store;
357 uint32_t clear_color[4][4];
358 float clear_z;
359 uint8_t clear_s;
360
361 /**
362 * Set if some drawing (triangles, blits, or just a glClear()) has
363 * been done to the FBO, meaning that we need to
364 * DRM_IOCTL_VC5_SUBMIT_CL.
365 */
366 bool needs_flush;
367
368 /* Set if any shader has dirtied cachelines in the TMU that need to be
369 * flushed before job end.
370 */
371 bool tmu_dirty_rcl;
372
373 /**
374 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
375 */
376 bool tf_enabled;
377
378 /**
379 * Current EZ state for drawing. Updated at the start of draw after
380 * we've decided on the shader being rendered.
381 */
382 enum v3d_ez_state ez_state;
383 /**
384 * The first EZ state that was used for drawing with a decided EZ
385 * direction (so either UNDECIDED, GT, or LT).
386 */
387 enum v3d_ez_state first_ez_state;
388
389 /**
390 * Number of draw calls (not counting full buffer clears) queued in
391 * the current job.
392 */
393 uint32_t draw_calls_queued;
394
395 struct v3d_job_key key;
396 };
397
398 struct v3d_context {
399 struct pipe_context base;
400
401 int fd;
402 struct v3d_screen *screen;
403
404 /** The 3D rendering job for the currently bound FBO. */
405 struct v3d_job *job;
406
407 /* Map from struct v3d_job_key to the job for that FBO.
408 */
409 struct hash_table *jobs;
410
411 /**
412 * Map from v3d_resource to a job writing to that resource.
413 *
414 * Primarily for flushing jobs rendering to textures that are now
415 * being read from.
416 */
417 struct hash_table *write_jobs;
418
419 struct slab_child_pool transfer_pool;
420 struct blitter_context *blitter;
421
422 /** bitfield of VC5_DIRTY_* */
423 uint32_t dirty;
424
425 struct primconvert_context *primconvert;
426
427 uint32_t next_uncompiled_program_id;
428 uint64_t next_compiled_program_id;
429
430 struct v3d_compiler_state *compiler_state;
431
432 uint8_t prim_mode;
433
434 /** Maximum index buffer valid for the current shader_rec. */
435 uint32_t max_index;
436
437 /** Sync object that our RCL or TFU job will update as its out_sync. */
438 uint32_t out_sync;
439
440 /* Stream uploader used by gallium internals. This could also be used
441 * by driver internals, but we tend to use the v3d_cl.h interfaces
442 * instead.
443 */
444 struct u_upload_mgr *uploader;
445 /* State uploader used inside the driver. This is for packing bits of
446 * long-term state inside buffers, since the kernel interfaces
447 * allocate a page at a time.
448 */
449 struct u_upload_mgr *state_uploader;
450
451 /** @{ Current pipeline state objects */
452 struct pipe_scissor_state scissor;
453 struct v3d_blend_state *blend;
454 struct v3d_rasterizer_state *rasterizer;
455 struct v3d_depth_stencil_alpha_state *zsa;
456
457 struct v3d_program_stateobj prog;
458 uint32_t compute_num_workgroups[3];
459 struct v3d_bo *compute_shared_memory;
460
461 struct v3d_vertex_stateobj *vtx;
462
463 struct {
464 struct pipe_blend_color f;
465 uint16_t hf[4];
466 } blend_color;
467 struct pipe_stencil_ref stencil_ref;
468 unsigned sample_mask;
469 struct pipe_framebuffer_state framebuffer;
470
471 /* Per render target, whether we should swap the R and B fields in the
472 * shader's color output and in blending. If render targets disagree
473 * on the R/B swap and use the constant color, then we would need to
474 * fall back to in-shader blending.
475 */
476 uint8_t swap_color_rb;
477
478 /* Per render target, whether we should treat the dst alpha values as
479 * one in blending.
480 *
481 * For RGBX formats, the tile buffer's alpha channel will be
482 * undefined.
483 */
484 uint8_t blend_dst_alpha_one;
485
486 bool active_queries;
487
488 uint32_t tf_prims_generated;
489 uint32_t prims_generated;
490
491 struct pipe_poly_stipple stipple;
492 struct pipe_clip_state clip;
493 struct pipe_viewport_state viewport;
494 struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
495 struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
496 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
497 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
498 struct v3d_vertexbuf_stateobj vertexbuf;
499 struct v3d_streamout_stateobj streamout;
500 struct v3d_bo *current_oq;
501 struct pipe_debug_callback debug;
502 /** @} */
503 };
504
505 struct v3d_rasterizer_state {
506 struct pipe_rasterizer_state base;
507
508 float point_size;
509
510 uint8_t depth_offset[9];
511 uint8_t depth_offset_z16[9];
512 };
513
514 struct v3d_depth_stencil_alpha_state {
515 struct pipe_depth_stencil_alpha_state base;
516
517 enum v3d_ez_state ez_state;
518
519 uint8_t stencil_front[6];
520 uint8_t stencil_back[6];
521 };
522
523 struct v3d_blend_state {
524 struct pipe_blend_state base;
525
526 /* Per-RT mask of whether blending is enabled. */
527 uint8_t blend_enables;
528 };
529
530 #define perf_debug(...) do { \
531 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
532 fprintf(stderr, __VA_ARGS__); \
533 if (unlikely(v3d->debug.debug_message)) \
534 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \
535 } while (0)
536
537 #define foreach_bit(b, mask) \
538 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
539
540 static inline struct v3d_context *
541 v3d_context(struct pipe_context *pcontext)
542 {
543 return (struct v3d_context *)pcontext;
544 }
545
546 static inline struct v3d_sampler_view *
547 v3d_sampler_view(struct pipe_sampler_view *psview)
548 {
549 return (struct v3d_sampler_view *)psview;
550 }
551
552 static inline struct v3d_sampler_state *
553 v3d_sampler_state(struct pipe_sampler_state *psampler)
554 {
555 return (struct v3d_sampler_state *)psampler;
556 }
557
558 static inline struct v3d_stream_output_target *
559 v3d_stream_output_target(struct pipe_stream_output_target *ptarget)
560 {
561 return (struct v3d_stream_output_target *)ptarget;
562 }
563
564 static inline uint32_t
565 v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target *ptarget)
566 {
567 return v3d_stream_output_target(ptarget)->recorded_vertex_count;
568 }
569
570 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
571 void *priv, unsigned flags);
572 void v3d_program_init(struct pipe_context *pctx);
573 void v3d_program_fini(struct pipe_context *pctx);
574 void v3d_query_init(struct pipe_context *pctx);
575
576 void v3d_simulator_init(struct v3d_screen *screen);
577 void v3d_simulator_destroy(struct v3d_screen *screen);
578 uint32_t v3d_simulator_get_spill(uint32_t spill_size);
579 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
580 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
581
582 static inline int
583 v3d_ioctl(int fd, unsigned long request, void *arg)
584 {
585 if (using_v3d_simulator)
586 return v3d_simulator_ioctl(fd, request, arg);
587 else
588 return drmIoctl(fd, request, arg);
589 }
590
591 static inline bool
592 v3d_transform_feedback_enabled(struct v3d_context *v3d)
593 {
594 return v3d->prog.bind_vs->num_tf_specs != 0 &&
595 v3d->active_queries;
596 }
597
598 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
599 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
600 struct v3d_compiled_shader *shader,
601 enum pipe_shader_type stage);
602
603 void v3d_flush(struct pipe_context *pctx);
604 void v3d_job_init(struct v3d_context *v3d);
605 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
606 struct pipe_surface **cbufs,
607 struct pipe_surface *zsbuf);
608 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
609 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
610 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
611 void v3d_job_add_tf_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
612 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
613 void v3d_flush_jobs_using_bo(struct v3d_context *v3d, struct v3d_bo *bo);
614 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
615 struct pipe_resource *prsc,
616 bool always_flush);
617 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
618 struct pipe_resource *prsc);
619 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
620 void v3d_update_compiled_cs(struct v3d_context *v3d);
621
622 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
623 enum pipe_format f);
624 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
625 enum pipe_format f);
626 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
627 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
628 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
629 enum pipe_format f,
630 enum pipe_tex_compare compare);
631 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
632 enum pipe_format f);
633 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
634 enum pipe_format f);
635 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
636 uint32_t format,
637 uint32_t *type,
638 uint32_t *bpp);
639 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
640 uint32_t tex_format);
641
642 void v3d_init_query_functions(struct v3d_context *v3d);
643 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
644 void v3d_blitter_save(struct v3d_context *v3d);
645 bool v3d_generate_mipmap(struct pipe_context *pctx,
646 struct pipe_resource *prsc,
647 enum pipe_format format,
648 unsigned int base_level,
649 unsigned int last_level,
650 unsigned int first_layer,
651 unsigned int last_layer);
652
653 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
654
655 #ifdef v3dX
656 # include "v3dx_context.h"
657 #else
658 # define v3dX(x) v3d33_##x
659 # include "v3dx_context.h"
660 # undef v3dX
661
662 # define v3dX(x) v3d41_##x
663 # include "v3dx_context.h"
664 # undef v3dX
665 #endif
666
667 #endif /* VC5_CONTEXT_H */