src/gallium/drivers/v3d/v3d_context.h

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #ifndef VC5_CONTEXT_H
  26 #define VC5_CONTEXT_H
  27
  28 #ifdef V3D_VERSION
  29 #include "broadcom/common/v3d_macros.h"
  30 #endif
  31
  32 #include <stdio.h>
  33
  34 #include "pipe/p_context.h"
  35 #include "pipe/p_state.h"
  36 #include "util/bitset.h"
  37 #include "util/slab.h"
  38 #include "xf86drm.h"
  39 #include "v3d_drm.h"
  40 #include "v3d_screen.h"
  41 #include "broadcom/common/v3d_limits.h"
  42
  43 struct v3d_job;
  44 struct v3d_bo;
  45 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
  46
  47 #include "v3d_bufmgr.h"
  48 #include "v3d_resource.h"
  49 #include "v3d_cl.h"
  50
  51 #ifdef USE_V3D_SIMULATOR
  52 #define using_v3d_simulator true
  53 #else
  54 #define using_v3d_simulator false
  55 #endif
  56
  57 #define VC5_DIRTY_BLEND         (1 <<  0)
  58 #define VC5_DIRTY_RASTERIZER    (1 <<  1)
  59 #define VC5_DIRTY_ZSA           (1 <<  2)
  60 #define VC5_DIRTY_FRAGTEX       (1 <<  3)
  61 #define VC5_DIRTY_VERTTEX       (1 <<  4)
  62 #define VC5_DIRTY_SHADER_IMAGE  (1 <<  5)
  63
  64 #define VC5_DIRTY_BLEND_COLOR   (1 <<  7)
  65 #define VC5_DIRTY_STENCIL_REF   (1 <<  8)
  66 #define VC5_DIRTY_SAMPLE_STATE  (1 <<  9)
  67 #define VC5_DIRTY_FRAMEBUFFER   (1 << 10)
  68 #define VC5_DIRTY_STIPPLE       (1 << 11)
  69 #define VC5_DIRTY_VIEWPORT      (1 << 12)
  70 #define VC5_DIRTY_CONSTBUF      (1 << 13)
  71 #define VC5_DIRTY_VTXSTATE      (1 << 14)
  72 #define VC5_DIRTY_VTXBUF        (1 << 15)
  73 #define VC5_DIRTY_SCISSOR       (1 << 17)
  74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
  75 #define VC5_DIRTY_PRIM_MODE     (1 << 19)
  76 #define VC5_DIRTY_CLIP          (1 << 20)
  77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
  78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
  79 #define VC5_DIRTY_COMPILED_CS   (1 << 23)
  80 #define VC5_DIRTY_COMPILED_VS   (1 << 24)
  81 #define VC5_DIRTY_COMPILED_FS   (1 << 25)
  82 #define VC5_DIRTY_FS_INPUTS     (1 << 26)
  83 #define VC5_DIRTY_STREAMOUT     (1 << 27)
  84 #define VC5_DIRTY_OQ            (1 << 28)
  85 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
  86 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
  87 #define VC5_DIRTY_SSBO          (1 << 31)
  88
  89 #define VC5_MAX_FS_INPUTS 64
  90
  91 enum v3d_sampler_state_variant {
  92         V3D_SAMPLER_STATE_BORDER_0,
  93         V3D_SAMPLER_STATE_F16,
  94         V3D_SAMPLER_STATE_F16_UNORM,
  95         V3D_SAMPLER_STATE_F16_SNORM,
  96         V3D_SAMPLER_STATE_F16_BGRA,
  97         V3D_SAMPLER_STATE_F16_BGRA_UNORM,
  98         V3D_SAMPLER_STATE_F16_BGRA_SNORM,
  99         V3D_SAMPLER_STATE_F16_A,
 100         V3D_SAMPLER_STATE_F16_A_SNORM,
 101         V3D_SAMPLER_STATE_F16_A_UNORM,
 102         V3D_SAMPLER_STATE_F16_LA,
 103         V3D_SAMPLER_STATE_F16_LA_UNORM,
 104         V3D_SAMPLER_STATE_F16_LA_SNORM,
 105         V3D_SAMPLER_STATE_32,
 106         V3D_SAMPLER_STATE_32_UNORM,
 107         V3D_SAMPLER_STATE_32_SNORM,
 108         V3D_SAMPLER_STATE_32_A,
 109         V3D_SAMPLER_STATE_32_A_UNORM,
 110         V3D_SAMPLER_STATE_32_A_SNORM,
 111         V3D_SAMPLER_STATE_1010102U,
 112         V3D_SAMPLER_STATE_16U,
 113         V3D_SAMPLER_STATE_16I,
 114         V3D_SAMPLER_STATE_8I,
 115         V3D_SAMPLER_STATE_8U,
 116
 117         V3D_SAMPLER_STATE_VARIANT_COUNT,
 118 };
 119
 120 struct v3d_sampler_view {
 121         struct pipe_sampler_view base;
 122         uint32_t p0;
 123         uint32_t p1;
 124         /* Precomputed swizzles to pass in to the shader key. */
 125         uint8_t swizzle[4];
 126
 127         uint8_t texture_shader_state[32];
 128         /* V3D 4.x: Texture state struct. */
 129         struct v3d_bo *bo;
 130
 131         enum v3d_sampler_state_variant sampler_variant;
 132
 133         /* Actual texture to be read by this sampler view.  May be different
 134          * from base.texture in the case of having a shadow tiled copy of a
 135          * raster texture.
 136          */
 137         struct pipe_resource *texture;
 138 };
 139
 140 struct v3d_sampler_state {
 141         struct pipe_sampler_state base;
 142         uint32_t p0;
 143         uint32_t p1;
 144
 145         /* V3D 3.x: Packed texture state. */
 146         uint8_t texture_shader_state[32];
 147         /* V3D 4.x: Sampler state struct. */
 148         struct pipe_resource *sampler_state;
 149         uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT];
 150
 151         bool border_color_variants;
 152 };
 153
 154 struct v3d_texture_stateobj {
 155         struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS];
 156         unsigned num_textures;
 157         struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS];
 158         unsigned num_samplers;
 159         struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS];
 160 };
 161
 162 struct v3d_shader_uniform_info {
 163         enum quniform_contents *contents;
 164         uint32_t *data;
 165         uint32_t count;
 166 };
 167
 168 struct v3d_uncompiled_shader {
 169         /** A name for this program, so you can track it in shader-db output. */
 170         uint32_t program_id;
 171         /** How many variants of this program were compiled, for shader-db. */
 172         uint32_t compiled_variant_count;
 173         struct pipe_shader_state base;
 174         uint32_t num_tf_outputs;
 175         struct v3d_varying_slot *tf_outputs;
 176         uint16_t tf_specs[16];
 177         uint16_t tf_specs_psiz[16];
 178         uint32_t num_tf_specs;
 179 };
 180
 181 struct v3d_compiled_shader {
 182         struct pipe_resource *resource;
 183         uint32_t offset;
 184
 185         union {
 186                 struct v3d_prog_data *base;
 187                 struct v3d_vs_prog_data *vs;
 188                 struct v3d_fs_prog_data *fs;
 189         } prog_data;
 190
 191         /**
 192          * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
 193          * uniforms have to be rewritten (and therefore the shader state
 194          * reemitted).
 195          */
 196         uint32_t uniform_dirty_bits;
 197 };
 198
 199 struct v3d_program_stateobj {
 200         struct v3d_uncompiled_shader *bind_vs, *bind_fs;
 201         struct v3d_compiled_shader *cs, *vs, *fs;
 202
 203         struct v3d_bo *spill_bo;
 204         int spill_size_per_thread;
 205 };
 206
 207 struct v3d_constbuf_stateobj {
 208         struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
 209         uint32_t enabled_mask;
 210         uint32_t dirty_mask;
 211 };
 212
 213 struct v3d_vertexbuf_stateobj {
 214         struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 215         unsigned count;
 216         uint32_t enabled_mask;
 217         uint32_t dirty_mask;
 218 };
 219
 220 struct v3d_vertex_stateobj {
 221         struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4];
 222         unsigned num_elements;
 223
 224         uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)];
 225         struct pipe_resource *defaults;
 226         uint32_t defaults_offset;
 227 };
 228
 229 struct v3d_streamout_stateobj {
 230         struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
 231         /* Number of vertices we've written into the buffer so far. */
 232         uint32_t offsets[PIPE_MAX_SO_BUFFERS];
 233         unsigned num_targets;
 234 };
 235
 236 struct v3d_ssbo_stateobj {
 237         struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
 238         uint32_t enabled_mask;
 239 };
 240
 241 /* Hash table key for v3d->jobs */
 242 struct v3d_job_key {
 243         struct pipe_surface *cbufs[4];
 244         struct pipe_surface *zsbuf;
 245 };
 246
 247 enum v3d_ez_state {
 248         VC5_EZ_UNDECIDED = 0,
 249         VC5_EZ_GT_GE,
 250         VC5_EZ_LT_LE,
 251         VC5_EZ_DISABLED,
 252 };
 253
 254 struct v3d_image_view {
 255         struct pipe_image_view base;
 256         /* V3D 4.x texture shader state struct */
 257         struct pipe_resource *tex_state;
 258         uint32_t tex_state_offset;
 259 };
 260
 261 struct v3d_shaderimg_stateobj {
 262         struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES];
 263         uint32_t enabled_mask;
 264 };
 265
 266 /**
 267  * A complete bin/render job.
 268  *
 269  * This is all of the state necessary to submit a bin/render to the kernel.
 270  * We want to be able to have multiple in progress at a time, so that we don't
 271  * need to flush an existing CL just to switch to rendering to a new render
 272  * target (which would mean reading back from the old render target when
 273  * starting to render to it again).
 274  */
 275 struct v3d_job {
 276         struct v3d_context *v3d;
 277         struct v3d_cl bcl;
 278         struct v3d_cl rcl;
 279         struct v3d_cl indirect;
 280         struct v3d_bo *tile_alloc;
 281         struct v3d_bo *tile_state;
 282         uint32_t shader_rec_count;
 283
 284         struct drm_v3d_submit_cl submit;
 285
 286         /**
 287          * Set of all BOs referenced by the job.  This will be used for making
 288          * the list of BOs that the kernel will need to have paged in to
 289          * execute our job.
 290          */
 291         struct set *bos;
 292
 293         /** Sum of the sizes of the BOs referenced by the job. */
 294         uint32_t referenced_size;
 295
 296         struct set *write_prscs;
 297
 298         /* Size of the submit.bo_handles array. */
 299         uint32_t bo_handles_size;
 300
 301         /** @{ Surfaces to submit rendering for. */
 302         struct pipe_surface *cbufs[4];
 303         struct pipe_surface *zsbuf;
 304         /** @} */
 305         /** @{
 306          * Bounding box of the scissor across all queued drawing.
 307          *
 308          * Note that the max values are exclusive.
 309          */
 310         uint32_t draw_min_x;
 311         uint32_t draw_min_y;
 312         uint32_t draw_max_x;
 313         uint32_t draw_max_y;
 314         /** @} */
 315         /** @{
 316          * Width/height of the color framebuffer being rendered to,
 317          * for VC5_TILE_RENDERING_MODE_CONFIG.
 318         */
 319         uint32_t draw_width;
 320         uint32_t draw_height;
 321         /** @} */
 322         /** @{ Tile information, depending on MSAA and float color buffer. */
 323         uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
 324         uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
 325
 326         uint32_t tile_width; /** @< Width of a tile. */
 327         uint32_t tile_height; /** @< Height of a tile. */
 328         /** maximum internal_bpp of all color render targets. */
 329         uint32_t internal_bpp;
 330
 331         /** Whether the current rendering is in a 4X MSAA tile buffer. */
 332         bool msaa;
 333         /** @} */
 334
 335         /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
 336          * first rendering.
 337          */
 338         uint32_t clear;
 339         /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
 340          * call without having been cleared first.
 341          */
 342         uint32_t load;
 343         /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
 344          * (either clears or draws) and should be stored.
 345          */
 346         uint32_t store;
 347         uint32_t clear_color[4][4];
 348         float clear_z;
 349         uint8_t clear_s;
 350
 351         /**
 352          * Set if some drawing (triangles, blits, or just a glClear()) has
 353          * been done to the FBO, meaning that we need to
 354          * DRM_IOCTL_VC5_SUBMIT_CL.
 355          */
 356         bool needs_flush;
 357
 358         /* Set if any shader has dirtied cachelines in the TMU that need to be
 359          * flushed before job end.
 360          */
 361         bool tmu_dirty_rcl;
 362
 363         /**
 364          * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
 365          */
 366         bool tf_enabled;
 367
 368         /**
 369          * Current EZ state for drawing. Updated at the start of draw after
 370          * we've decided on the shader being rendered.
 371          */
 372         enum v3d_ez_state ez_state;
 373         /**
 374          * The first EZ state that was used for drawing with a decided EZ
 375          * direction (so either UNDECIDED, GT, or LT).
 376          */
 377         enum v3d_ez_state first_ez_state;
 378
 379         /**
 380          * Number of draw calls (not counting full buffer clears) queued in
 381          * the current job.
 382          */
 383         uint32_t draw_calls_queued;
 384
 385         struct v3d_job_key key;
 386 };
 387
 388 struct v3d_context {
 389         struct pipe_context base;
 390
 391         int fd;
 392         struct v3d_screen *screen;
 393
 394         /** The 3D rendering job for the currently bound FBO. */
 395         struct v3d_job *job;
 396
 397         /* Map from struct v3d_job_key to the job for that FBO.
 398          */
 399         struct hash_table *jobs;
 400
 401         /**
 402          * Map from v3d_resource to a job writing to that resource.
 403          *
 404          * Primarily for flushing jobs rendering to textures that are now
 405          * being read from.
 406          */
 407         struct hash_table *write_jobs;
 408
 409         struct slab_child_pool transfer_pool;
 410         struct blitter_context *blitter;
 411
 412         /** bitfield of VC5_DIRTY_* */
 413         uint32_t dirty;
 414
 415         struct primconvert_context *primconvert;
 416
 417         struct hash_table *fs_cache, *vs_cache;
 418         uint32_t next_uncompiled_program_id;
 419         uint64_t next_compiled_program_id;
 420
 421         struct v3d_compiler_state *compiler_state;
 422
 423         uint8_t prim_mode;
 424
 425         /** Maximum index buffer valid for the current shader_rec. */
 426         uint32_t max_index;
 427
 428         /** Sync object that our RCL or TFU job will update as its out_sync. */
 429         uint32_t out_sync;
 430
 431         /* Stream uploader used by gallium internals.  This could also be used
 432          * by driver internals, but we tend to use the v3d_cl.h interfaces
 433          * instead.
 434          */
 435         struct u_upload_mgr *uploader;
 436         /* State uploader used inside the driver.  This is for packing bits of
 437          * long-term state inside buffers, since the kernel interfaces
 438          * allocate a page at a time.
 439          */
 440         struct u_upload_mgr *state_uploader;
 441
 442         /** @{ Current pipeline state objects */
 443         struct pipe_scissor_state scissor;
 444         struct v3d_blend_state *blend;
 445         struct v3d_rasterizer_state *rasterizer;
 446         struct v3d_depth_stencil_alpha_state *zsa;
 447
 448         struct v3d_program_stateobj prog;
 449
 450         struct v3d_vertex_stateobj *vtx;
 451
 452         struct {
 453                 struct pipe_blend_color f;
 454                 uint16_t hf[4];
 455         } blend_color;
 456         struct pipe_stencil_ref stencil_ref;
 457         unsigned sample_mask;
 458         struct pipe_framebuffer_state framebuffer;
 459
 460         /* Per render target, whether we should swap the R and B fields in the
 461          * shader's color output and in blending.  If render targets disagree
 462          * on the R/B swap and use the constant color, then we would need to
 463          * fall back to in-shader blending.
 464          */
 465         uint8_t swap_color_rb;
 466
 467         /* Per render target, whether we should treat the dst alpha values as
 468          * one in blending.
 469          *
 470          * For RGBX formats, the tile buffer's alpha channel will be
 471          * undefined.
 472          */
 473         uint8_t blend_dst_alpha_one;
 474
 475         bool active_queries;
 476
 477         uint32_t tf_prims_generated;
 478         uint32_t prims_generated;
 479
 480         struct pipe_poly_stipple stipple;
 481         struct pipe_clip_state clip;
 482         struct pipe_viewport_state viewport;
 483         struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES];
 484         struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
 485         struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
 486         struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
 487         struct v3d_vertexbuf_stateobj vertexbuf;
 488         struct v3d_streamout_stateobj streamout;
 489         struct v3d_bo *current_oq;
 490         struct pipe_debug_callback debug;
 491         /** @} */
 492 };
 493
 494 struct v3d_rasterizer_state {
 495         struct pipe_rasterizer_state base;
 496
 497         float point_size;
 498
 499         uint8_t depth_offset[9];
 500         uint8_t depth_offset_z16[9];
 501 };
 502
 503 struct v3d_depth_stencil_alpha_state {
 504         struct pipe_depth_stencil_alpha_state base;
 505
 506         enum v3d_ez_state ez_state;
 507
 508         uint8_t stencil_front[6];
 509         uint8_t stencil_back[6];
 510 };
 511
 512 struct v3d_blend_state {
 513         struct pipe_blend_state base;
 514
 515         /* Per-RT mask of whether blending is enabled. */
 516         uint8_t blend_enables;
 517 };
 518
 519 #define perf_debug(...) do {                            \
 520         if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF))       \
 521                 fprintf(stderr, __VA_ARGS__);           \
 522         if (unlikely(v3d->debug.debug_message))         \
 523                 pipe_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__);    \
 524 } while (0)
 525
 526 #define foreach_bit(b, mask)                                            \
 527         for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
 528
 529 static inline struct v3d_context *
 530 v3d_context(struct pipe_context *pcontext)
 531 {
 532         return (struct v3d_context *)pcontext;
 533 }
 534
 535 static inline struct v3d_sampler_view *
 536 v3d_sampler_view(struct pipe_sampler_view *psview)
 537 {
 538         return (struct v3d_sampler_view *)psview;
 539 }
 540
 541 static inline struct v3d_sampler_state *
 542 v3d_sampler_state(struct pipe_sampler_state *psampler)
 543 {
 544         return (struct v3d_sampler_state *)psampler;
 545 }
 546
 547 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
 548                                         void *priv, unsigned flags);
 549 void v3d_program_init(struct pipe_context *pctx);
 550 void v3d_program_fini(struct pipe_context *pctx);
 551 void v3d_query_init(struct pipe_context *pctx);
 552
 553 void v3d_simulator_init(struct v3d_screen *screen);
 554 void v3d_simulator_destroy(struct v3d_screen *screen);
 555 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
 556 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
 557
 558 static inline int
 559 v3d_ioctl(int fd, unsigned long request, void *arg)
 560 {
 561         if (using_v3d_simulator)
 562                 return v3d_simulator_ioctl(fd, request, arg);
 563         else
 564                 return drmIoctl(fd, request, arg);
 565 }
 566
 567 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
 568 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
 569                                        struct v3d_compiled_shader *shader,
 570                                        enum pipe_shader_type stage);
 571
 572 void v3d_flush(struct pipe_context *pctx);
 573 void v3d_job_init(struct v3d_context *v3d);
 574 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
 575                             struct pipe_surface **cbufs,
 576                             struct pipe_surface *zsbuf);
 577 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
 578 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
 579 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
 580 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
 581 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
 582                                      struct pipe_resource *prsc);
 583 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
 584                                      struct pipe_resource *prsc);
 585 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
 586
 587 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
 588                              enum pipe_format f);
 589 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
 590                               enum pipe_format f);
 591 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
 592 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
 593 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
 594                                 enum pipe_format f,
 595                                 enum pipe_tex_compare compare);
 596 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
 597                                     enum pipe_format f);
 598 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
 599                                       enum pipe_format f);
 600 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
 601                                                  uint32_t format,
 602                                                  uint32_t *type,
 603                                                  uint32_t *bpp);
 604 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
 605                                  uint32_t tex_format);
 606
 607 void v3d_init_query_functions(struct v3d_context *v3d);
 608 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
 609 void v3d_blitter_save(struct v3d_context *v3d);
 610 boolean v3d_generate_mipmap(struct pipe_context *pctx,
 611                             struct pipe_resource *prsc,
 612                             enum pipe_format format,
 613                             unsigned int base_level,
 614                             unsigned int last_level,
 615                             unsigned int first_layer,
 616                             unsigned int last_layer);
 617
 618 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
 619
 620 #ifdef v3dX
 621 #  include "v3dx_context.h"
 622 #else
 623 #  define v3dX(x) v3d33_##x
 624 #  include "v3dx_context.h"
 625 #  undef v3dX
 626
 627 #  define v3dX(x) v3d41_##x
 628 #  include "v3dx_context.h"
 629 #  undef v3dX
 630 #endif
 631
 632 #endif /* VC5_CONTEXT_H */