src/gallium/drivers/v3d/v3d_resource.h

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #ifndef VC5_RESOURCE_H
  26 #define VC5_RESOURCE_H
  27
  28 #include "v3d_screen.h"
  29 #include "util/u_transfer.h"
  30
  31 /* A UIFblock is a 256-byte region of memory that's 256-byte aligned.  These
  32  * will be grouped in 4x4 blocks (left-to-right, then top-to-bottom) in a 4KB
  33  * page.  Those pages are then arranged left-to-right, top-to-bottom, to cover
  34  * an image.
  35  *
  36  * The inside of a UIFblock, for packed pixels, will be split into 4 64-byte
  37  * utiles.  Utiles may be 8x8 (8bpp), 8x4(16bpp) or 4x4 (32bpp).
  38  */
  39
  40 /**
  41  * Tiling mode enum used for v3d_resource.c, which maps directly to the Memory
  42  * Format field of render target and Z/Stencil config.
  43  */
  44 enum v3d_tiling_mode {
  45         /* Untiled resources.  Not valid as texture inputs. */
  46         VC5_TILING_RASTER,
  47
  48         /* Single line of u-tiles. */
  49         VC5_TILING_LINEARTILE,
  50
  51         /* Departure from standard 4-UIF block column format. */
  52         VC5_TILING_UBLINEAR_1_COLUMN,
  53
  54         /* Departure from standard 4-UIF block column format. */
  55         VC5_TILING_UBLINEAR_2_COLUMN,
  56
  57         /* Normal tiling format: grouped in 4x4 UIFblocks, each of which is
  58          * split 2x2 into utiles.
  59          */
  60         VC5_TILING_UIF_NO_XOR,
  61
  62         /* Normal tiling format: grouped in 4x4 UIFblocks, each of which is
  63          * split 2x2 into utiles.
  64          */
  65         VC5_TILING_UIF_XOR,
  66 };
  67
  68 struct v3d_transfer {
  69         struct pipe_transfer base;
  70         void *map;
  71 };
  72
  73 struct v3d_resource_slice {
  74         uint32_t offset;
  75         uint32_t stride;
  76         uint32_t padded_height;
  77         /* Size of a single pane of the slice.  For 3D textures, there will be
  78          * a number of panes equal to the minified, power-of-two-aligned
  79          * depth.
  80          */
  81         uint32_t size;
  82         uint8_t ub_pad;
  83         enum v3d_tiling_mode tiling;
  84 };
  85
  86 struct v3d_surface {
  87         struct pipe_surface base;
  88         uint32_t offset;
  89         enum v3d_tiling_mode tiling;
  90         /**
  91          * Output image format for TILE_RENDERING_MODE_CONFIGURATION
  92          */
  93         uint8_t format;
  94
  95         /**
  96          * Internal format of the tile buffer for
  97          * TILE_RENDERING_MODE_CONFIGURATION.
  98          */
  99         uint8_t internal_type;
 100
 101         /**
 102          * internal bpp value (0=32bpp, 2=128bpp) for color buffers in
 103          * TILE_RENDERING_MODE_CONFIGURATION.
 104          */
 105         uint8_t internal_bpp;
 106
 107         /**
 108          * If the R and B channels should be swapped.  On V3D 3.x, we do it in
 109          * the shader and the blend equation.  On V3D 4.1+, we can use the new
 110          * TLB load/store flags instead of recompiling.
 111          */
 112         bool swap_rb;
 113
 114         uint32_t padded_height_of_output_image_in_uif_blocks;
 115
 116         /* If the resource being referenced is separate stencil, then this is
 117          * the surface to use when reading/writing stencil.
 118          */
 119         struct pipe_surface *separate_stencil;
 120 };
 121
 122 struct v3d_resource {
 123         struct pipe_resource base;
 124         struct v3d_bo *bo;
 125         struct renderonly_scanout *scanout;
 126         struct v3d_resource_slice slices[V3D_MAX_MIP_LEVELS];
 127         uint32_t cube_map_stride;
 128         uint32_t size;
 129         int cpp;
 130         bool tiled;
 131
 132         /**
 133          * Indicates if the CS has written the resource
 134          */
 135         bool compute_written;
 136
 137         /**
 138          * Number of times the resource has been written to.
 139          *
 140          * This is used to track whether we need to load the surface on first
 141          * rendering.
 142          */
 143         uint64_t writes;
 144
 145         /**
 146          * Bitmask of PIPE_CLEAR_COLOR0, PIPE_CLEAR_DEPTH, PIPE_CLEAR_STENCIL
 147          * for which parts of the resource are defined.
 148          *
 149          * Used for avoiding fallback to quad clears for clearing just depth,
 150          * when the stencil contents have never been initialized.  Note that
 151          * we're lazy and fields not present in the buffer (DEPTH in a color
 152          * buffer) may get marked.
 153          */
 154         uint32_t initialized_buffers;
 155
 156         enum pipe_format internal_format;
 157
 158         /* Resource storing the S8 part of a Z32F_S8 resource, or NULL. */
 159         struct v3d_resource *separate_stencil;
 160 };
 161
 162 static inline struct v3d_resource *
 163 v3d_resource(struct pipe_resource *prsc)
 164 {
 165         return (struct v3d_resource *)prsc;
 166 }
 167
 168 static inline struct v3d_surface *
 169 v3d_surface(struct pipe_surface *psurf)
 170 {
 171         return (struct v3d_surface *)psurf;
 172 }
 173
 174 static inline struct v3d_transfer *
 175 v3d_transfer(struct pipe_transfer *ptrans)
 176 {
 177         return (struct v3d_transfer *)ptrans;
 178 }
 179
 180 void v3d_resource_screen_init(struct pipe_screen *pscreen);
 181 void v3d_resource_context_init(struct pipe_context *pctx);
 182 struct pipe_resource *v3d_resource_create(struct pipe_screen *pscreen,
 183                                           const struct pipe_resource *tmpl);
 184 void v3d_update_shadow_texture(struct pipe_context *pctx,
 185                                struct pipe_sampler_view *view);
 186 uint32_t v3d_layer_offset(struct pipe_resource *prsc, uint32_t level,
 187                           uint32_t layer);
 188
 189
 190 #endif /* VC5_RESOURCE_H */