2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include <sys/sysinfo.h>
27 #include "util/os_misc.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30 #include "pipe/p_state.h"
32 #include "util/u_debug.h"
33 #include "util/u_memory.h"
34 #include "util/u_format.h"
35 #include "util/u_hash_table.h"
36 #include "util/u_screen.h"
37 #include "util/u_transfer_helper.h"
38 #include "util/ralloc.h"
41 #include "v3d_screen.h"
42 #include "v3d_context.h"
43 #include "v3d_resource.h"
44 #include "compiler/v3d_compiler.h"
45 #include "drm-uapi/drm_fourcc.h"
48 v3d_screen_get_name(struct pipe_screen
*pscreen
)
50 struct v3d_screen
*screen
= v3d_screen(pscreen
);
53 screen
->name
= ralloc_asprintf(screen
,
55 screen
->devinfo
.ver
/ 10,
56 screen
->devinfo
.ver
% 10);
63 v3d_screen_get_vendor(struct pipe_screen
*pscreen
)
69 v3d_screen_destroy(struct pipe_screen
*pscreen
)
71 struct v3d_screen
*screen
= v3d_screen(pscreen
);
73 util_hash_table_destroy(screen
->bo_handles
);
74 v3d_bufmgr_destroy(pscreen
);
75 slab_destroy_parent(&screen
->transfer_pool
);
78 if (using_v3d_simulator
)
79 v3d_simulator_destroy(screen
);
81 v3d_compiler_free(screen
->compiler
);
82 u_transfer_helper_destroy(pscreen
->transfer_helper
);
89 v3d_has_feature(struct v3d_screen
*screen
, enum drm_v3d_param feature
)
91 struct drm_v3d_get_param p
= {
94 int ret
= v3d_ioctl(screen
->fd
, DRM_IOCTL_V3D_GET_PARAM
, &p
);
103 v3d_screen_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
105 struct v3d_screen
*screen
= v3d_screen(pscreen
);
108 /* Supported features (boolean caps). */
109 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
110 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
111 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
112 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
:
113 case PIPE_CAP_NPOT_TEXTURES
:
114 case PIPE_CAP_SHAREABLE_SHADERS
:
115 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
116 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
117 case PIPE_CAP_TEXTURE_SWIZZLE
:
118 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
119 case PIPE_CAP_START_INSTANCE
:
120 case PIPE_CAP_TGSI_INSTANCEID
:
122 case PIPE_CAP_TEXTURE_QUERY_LOD
:
123 case PIPE_CAP_PRIMITIVE_RESTART
:
124 case PIPE_CAP_OCCLUSION_QUERY
:
125 case PIPE_CAP_POINT_SPRITE
:
126 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
:
127 case PIPE_CAP_DRAW_INDIRECT
:
128 case PIPE_CAP_MULTI_DRAW_INDIRECT
:
129 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
:
130 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET
:
131 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS
:
132 case PIPE_CAP_TGSI_PACK_HALF_FLOAT
:
133 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
134 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT
:
137 case PIPE_CAP_PACKED_UNIFORMS
:
138 /* We can't enable this flag, because it results in load_ubo
139 * intrinsics across a 16b boundary, but v3d's TMU general
140 * memory accesses wrap on 16b boundaries.
144 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
147 case PIPE_CAP_COMPUTE
:
148 return screen
->has_csd
&& screen
->devinfo
.ver
>= 41;
150 case PIPE_CAP_GENERATE_MIPMAP
:
151 return v3d_has_feature(screen
, DRM_V3D_PARAM_SUPPORTS_TFU
);
153 case PIPE_CAP_INDEP_BLEND_ENABLE
:
154 return screen
->devinfo
.ver
>= 40;
156 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
159 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
160 if (screen
->devinfo
.ver
< 40)
164 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
167 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
170 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
173 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
175 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
177 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
178 if (screen
->devinfo
.ver
>= 40)
182 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
183 if (screen
->devinfo
.ver
>= 40)
188 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
189 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
190 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS
:
193 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
196 case PIPE_CAP_MAX_VARYINGS
:
197 return V3D_MAX_FS_INPUTS
/ 4;
200 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
201 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
202 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
203 if (screen
->devinfo
.ver
< 40)
206 return V3D_MAX_MIP_LEVELS
;
207 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
210 /* Render targets. */
211 case PIPE_CAP_MAX_RENDER_TARGETS
:
214 case PIPE_CAP_VENDOR_ID
:
216 case PIPE_CAP_ACCELERATED
:
218 case PIPE_CAP_VIDEO_MEMORY
: {
219 uint64_t system_memory
;
221 if (!os_get_total_physical_memory(&system_memory
))
224 return (int)(system_memory
>> 20);
230 return u_pipe_screen_get_param_defaults(pscreen
, param
);
235 v3d_screen_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
238 case PIPE_CAPF_MAX_LINE_WIDTH
:
239 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
242 case PIPE_CAPF_MAX_POINT_WIDTH
:
243 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
246 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
248 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
251 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
252 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
253 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
256 fprintf(stderr
, "unknown paramf %d\n", param
);
262 v3d_screen_get_shader_param(struct pipe_screen
*pscreen
, unsigned shader
,
263 enum pipe_shader_cap param
)
265 struct v3d_screen
*screen
= v3d_screen(pscreen
);
268 case PIPE_SHADER_VERTEX
:
269 case PIPE_SHADER_FRAGMENT
:
271 case PIPE_SHADER_COMPUTE
:
272 if (!screen
->has_csd
)
279 /* this is probably not totally correct.. but it's a start: */
281 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
282 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
283 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
284 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
287 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
290 case PIPE_SHADER_CAP_MAX_INPUTS
:
291 if (shader
== PIPE_SHADER_FRAGMENT
)
292 return V3D_MAX_FS_INPUTS
/ 4;
294 return V3D_MAX_VS_INPUTS
/ 4;
295 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
296 if (shader
== PIPE_SHADER_FRAGMENT
)
299 return V3D_MAX_FS_INPUTS
/ 4;
300 case PIPE_SHADER_CAP_MAX_TEMPS
:
301 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
302 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
303 /* Note: Limited by the offset size in
304 * v3d_unit_data_create().
306 return 16 * 1024 * sizeof(float);
307 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
309 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
311 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
312 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
314 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
316 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
318 case PIPE_SHADER_CAP_SUBROUTINES
:
320 case PIPE_SHADER_CAP_INTEGERS
:
322 case PIPE_SHADER_CAP_FP16
:
323 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
324 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
325 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
326 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
327 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
328 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
329 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
330 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
332 case PIPE_SHADER_CAP_SCALAR_ISA
:
334 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
335 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
336 return V3D_MAX_TEXTURE_SAMPLERS
;
338 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
339 return PIPE_MAX_SHADER_BUFFERS
;
341 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
342 if (screen
->devinfo
.ver
< 41)
345 return PIPE_MAX_SHADER_IMAGES
;
347 case PIPE_SHADER_CAP_PREFERRED_IR
:
348 return PIPE_SHADER_IR_NIR
;
349 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
350 return 1 << PIPE_SHADER_IR_NIR
;
351 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
353 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
354 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
357 fprintf(stderr
, "unknown shader param %d\n", param
);
364 v3d_get_compute_param(struct pipe_screen
*pscreen
, enum pipe_shader_ir ir_type
,
365 enum pipe_compute_cap param
, void *ret
)
367 struct v3d_screen
*screen
= v3d_screen(pscreen
);
369 if (!screen
->has_csd
)
372 #define RET(x) do { \
374 memcpy(ret, x, sizeof(x)); \
379 case PIPE_COMPUTE_CAP_ADDRESS_BITS
:
380 RET((uint32_t []) { 32 });
383 case PIPE_COMPUTE_CAP_IR_TARGET
:
387 case PIPE_COMPUTE_CAP_GRID_DIMENSION
:
388 RET((uint64_t []) { 3 });
390 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE
:
391 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
392 * 16-bit field for the number of workgroups in each
395 RET(((uint64_t []) { 65535, 65535, 65535 }));
397 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE
:
398 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
399 RET(((uint64_t []) { 256, 256, 256 }));
401 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK
:
402 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK
:
403 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
404 * limited by WG_SIZE in the CSD.
406 RET((uint64_t []) { 256 });
408 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE
:
409 RET((uint64_t []) { 1024 * 1024 * 1024 });
411 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE
:
412 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
413 RET((uint64_t []) { 32768 });
415 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE
:
416 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE
:
417 RET((uint64_t []) { 4096 });
419 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
: {
422 RET((uint64_t []) { si
.totalram
});
425 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
:
427 RET((uint32_t []) { 0 });
429 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS
:
430 RET((uint32_t []) { 1 });
432 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED
:
433 RET((uint32_t []) { 1 });
435 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE
:
436 RET((uint32_t []) { 16 });
444 v3d_screen_is_format_supported(struct pipe_screen
*pscreen
,
445 enum pipe_format format
,
446 enum pipe_texture_target target
,
447 unsigned sample_count
,
448 unsigned storage_sample_count
,
451 struct v3d_screen
*screen
= v3d_screen(pscreen
);
453 if (MAX2(1, sample_count
) != MAX2(1, storage_sample_count
))
456 if (sample_count
> 1 && sample_count
!= V3D_MAX_SAMPLES
)
459 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
463 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
465 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
466 case PIPE_FORMAT_R32G32B32_FLOAT
:
467 case PIPE_FORMAT_R32G32_FLOAT
:
468 case PIPE_FORMAT_R32_FLOAT
:
469 case PIPE_FORMAT_R32G32B32A32_SNORM
:
470 case PIPE_FORMAT_R32G32B32_SNORM
:
471 case PIPE_FORMAT_R32G32_SNORM
:
472 case PIPE_FORMAT_R32_SNORM
:
473 case PIPE_FORMAT_R32G32B32A32_SSCALED
:
474 case PIPE_FORMAT_R32G32B32_SSCALED
:
475 case PIPE_FORMAT_R32G32_SSCALED
:
476 case PIPE_FORMAT_R32_SSCALED
:
477 case PIPE_FORMAT_R16G16B16A16_UNORM
:
478 case PIPE_FORMAT_R16G16B16_UNORM
:
479 case PIPE_FORMAT_R16G16_UNORM
:
480 case PIPE_FORMAT_R16_UNORM
:
481 case PIPE_FORMAT_R16G16B16A16_SNORM
:
482 case PIPE_FORMAT_R16G16B16_SNORM
:
483 case PIPE_FORMAT_R16G16_SNORM
:
484 case PIPE_FORMAT_R16_SNORM
:
485 case PIPE_FORMAT_R16G16B16A16_USCALED
:
486 case PIPE_FORMAT_R16G16B16_USCALED
:
487 case PIPE_FORMAT_R16G16_USCALED
:
488 case PIPE_FORMAT_R16_USCALED
:
489 case PIPE_FORMAT_R16G16B16A16_SSCALED
:
490 case PIPE_FORMAT_R16G16B16_SSCALED
:
491 case PIPE_FORMAT_R16G16_SSCALED
:
492 case PIPE_FORMAT_R16_SSCALED
:
493 case PIPE_FORMAT_R8G8B8A8_UNORM
:
494 case PIPE_FORMAT_R8G8B8_UNORM
:
495 case PIPE_FORMAT_R8G8_UNORM
:
496 case PIPE_FORMAT_R8_UNORM
:
497 case PIPE_FORMAT_R8G8B8A8_SNORM
:
498 case PIPE_FORMAT_R8G8B8_SNORM
:
499 case PIPE_FORMAT_R8G8_SNORM
:
500 case PIPE_FORMAT_R8_SNORM
:
501 case PIPE_FORMAT_R8G8B8A8_USCALED
:
502 case PIPE_FORMAT_R8G8B8_USCALED
:
503 case PIPE_FORMAT_R8G8_USCALED
:
504 case PIPE_FORMAT_R8_USCALED
:
505 case PIPE_FORMAT_R8G8B8A8_SSCALED
:
506 case PIPE_FORMAT_R8G8B8_SSCALED
:
507 case PIPE_FORMAT_R8G8_SSCALED
:
508 case PIPE_FORMAT_R8_SSCALED
:
509 case PIPE_FORMAT_R10G10B10A2_UNORM
:
510 case PIPE_FORMAT_B10G10R10A2_UNORM
:
511 case PIPE_FORMAT_R10G10B10A2_SNORM
:
512 case PIPE_FORMAT_B10G10R10A2_SNORM
:
513 case PIPE_FORMAT_R10G10B10A2_USCALED
:
514 case PIPE_FORMAT_B10G10R10A2_USCALED
:
515 case PIPE_FORMAT_R10G10B10A2_SSCALED
:
516 case PIPE_FORMAT_B10G10R10A2_SSCALED
:
523 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
524 * of FRAMEBUFFER_MAX_SAMPLES
526 if ((usage
& PIPE_BIND_RENDER_TARGET
) &&
527 format
!= PIPE_FORMAT_NONE
&&
528 !v3d_rt_format_supported(&screen
->devinfo
, format
)) {
532 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
533 !v3d_tex_format_supported(&screen
->devinfo
, format
)) {
537 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
538 !(format
== PIPE_FORMAT_S8_UINT_Z24_UNORM
||
539 format
== PIPE_FORMAT_X8Z24_UNORM
||
540 format
== PIPE_FORMAT_Z16_UNORM
||
541 format
== PIPE_FORMAT_Z32_FLOAT
||
542 format
== PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
)) {
546 if ((usage
& PIPE_BIND_INDEX_BUFFER
) &&
547 !(format
== PIPE_FORMAT_I8_UINT
||
548 format
== PIPE_FORMAT_I16_UINT
||
549 format
== PIPE_FORMAT_I32_UINT
)) {
556 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
558 static unsigned handle_hash(void *key
)
560 return PTR_TO_UINT(key
);
563 static int handle_compare(void *key1
, void *key2
)
565 return PTR_TO_UINT(key1
) != PTR_TO_UINT(key2
);
569 v3d_get_device_info(struct v3d_screen
*screen
)
571 struct drm_v3d_get_param ident0
= {
572 .param
= DRM_V3D_PARAM_V3D_CORE0_IDENT0
,
574 struct drm_v3d_get_param ident1
= {
575 .param
= DRM_V3D_PARAM_V3D_CORE0_IDENT1
,
579 ret
= v3d_ioctl(screen
->fd
, DRM_IOCTL_V3D_GET_PARAM
, &ident0
);
581 fprintf(stderr
, "Couldn't get V3D core IDENT0: %s\n",
585 ret
= v3d_ioctl(screen
->fd
, DRM_IOCTL_V3D_GET_PARAM
, &ident1
);
587 fprintf(stderr
, "Couldn't get V3D core IDENT1: %s\n",
592 uint32_t major
= (ident0
.value
>> 24) & 0xff;
593 uint32_t minor
= (ident1
.value
>> 0) & 0xf;
594 screen
->devinfo
.ver
= major
* 10 + minor
;
596 screen
->devinfo
.vpm_size
= (ident1
.value
>> 28 & 0xf) * 8192;
598 int nslc
= (ident1
.value
>> 4) & 0xf;
599 int qups
= (ident1
.value
>> 8) & 0xf;
600 screen
->devinfo
.qpu_count
= nslc
* qups
;
602 switch (screen
->devinfo
.ver
) {
609 "V3D %d.%d not supported by this version of Mesa.\n",
610 screen
->devinfo
.ver
/ 10,
611 screen
->devinfo
.ver
% 10);
619 v3d_screen_get_compiler_options(struct pipe_screen
*pscreen
,
620 enum pipe_shader_ir ir
, unsigned shader
)
622 return &v3d_nir_options
;
626 v3d_screen_query_dmabuf_modifiers(struct pipe_screen
*pscreen
,
627 enum pipe_format format
, int max
,
629 unsigned int *external_only
,
633 uint64_t available_modifiers
[] = {
634 DRM_FORMAT_MOD_BROADCOM_UIF
,
635 DRM_FORMAT_MOD_LINEAR
,
637 int num_modifiers
= ARRAY_SIZE(available_modifiers
);
640 *count
= num_modifiers
;
644 *count
= MIN2(max
, num_modifiers
);
645 for (i
= 0; i
< *count
; i
++) {
646 modifiers
[i
] = available_modifiers
[i
];
648 external_only
[i
] = false;
653 v3d_screen_create(int fd
, struct renderonly
*ro
)
655 struct v3d_screen
*screen
= rzalloc(NULL
, struct v3d_screen
);
656 struct pipe_screen
*pscreen
;
658 pscreen
= &screen
->base
;
660 pscreen
->destroy
= v3d_screen_destroy
;
661 pscreen
->get_param
= v3d_screen_get_param
;
662 pscreen
->get_paramf
= v3d_screen_get_paramf
;
663 pscreen
->get_shader_param
= v3d_screen_get_shader_param
;
664 pscreen
->get_compute_param
= v3d_get_compute_param
;
665 pscreen
->context_create
= v3d_context_create
;
666 pscreen
->is_format_supported
= v3d_screen_is_format_supported
;
670 screen
->ro
= renderonly_dup(ro
);
672 fprintf(stderr
, "Failed to dup renderonly object\n");
677 list_inithead(&screen
->bo_cache
.time_list
);
678 (void)mtx_init(&screen
->bo_handles_mutex
, mtx_plain
);
679 screen
->bo_handles
= util_hash_table_create(handle_hash
, handle_compare
);
681 #if defined(USE_V3D_SIMULATOR)
682 v3d_simulator_init(screen
);
685 if (!v3d_get_device_info(screen
))
688 slab_create_parent(&screen
->transfer_pool
, sizeof(struct v3d_transfer
), 16);
690 screen
->has_csd
= false; /* until the UABI is enabled. */
692 v3d_fence_init(screen
);
694 v3d_process_debug_variable();
696 v3d_resource_screen_init(pscreen
);
698 screen
->compiler
= v3d_compiler_init(&screen
->devinfo
);
700 pscreen
->get_name
= v3d_screen_get_name
;
701 pscreen
->get_vendor
= v3d_screen_get_vendor
;
702 pscreen
->get_device_vendor
= v3d_screen_get_vendor
;
703 pscreen
->get_compiler_options
= v3d_screen_get_compiler_options
;
704 pscreen
->query_dmabuf_modifiers
= v3d_screen_query_dmabuf_modifiers
;
710 ralloc_free(pscreen
);