v3d: Enable PIPE_CAP_TGSI_TEXCOORD.
[mesa.git] / src / gallium / drivers / v3d / v3d_screen.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "common/v3d_device_info.h"
28 #include "util/os_misc.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_screen.h"
31 #include "pipe/p_state.h"
32
33 #include "util/u_debug.h"
34 #include "util/u_memory.h"
35 #include "util/format/u_format.h"
36 #include "util/u_hash_table.h"
37 #include "util/u_screen.h"
38 #include "util/u_transfer_helper.h"
39 #include "util/ralloc.h"
40 #include "util/xmlconfig.h"
41
42 #include <xf86drm.h>
43 #include "v3d_screen.h"
44 #include "v3d_context.h"
45 #include "v3d_resource.h"
46 #include "compiler/v3d_compiler.h"
47 #include "drm-uapi/drm_fourcc.h"
48
49 static const char *
50 v3d_screen_get_name(struct pipe_screen *pscreen)
51 {
52 struct v3d_screen *screen = v3d_screen(pscreen);
53
54 if (!screen->name) {
55 screen->name = ralloc_asprintf(screen,
56 "V3D %d.%d",
57 screen->devinfo.ver / 10,
58 screen->devinfo.ver % 10);
59 }
60
61 return screen->name;
62 }
63
64 static const char *
65 v3d_screen_get_vendor(struct pipe_screen *pscreen)
66 {
67 return "Broadcom";
68 }
69
70 static void
71 v3d_screen_destroy(struct pipe_screen *pscreen)
72 {
73 struct v3d_screen *screen = v3d_screen(pscreen);
74
75 _mesa_hash_table_destroy(screen->bo_handles, NULL);
76 v3d_bufmgr_destroy(pscreen);
77 slab_destroy_parent(&screen->transfer_pool);
78 free(screen->ro);
79
80 if (using_v3d_simulator)
81 v3d_simulator_destroy(screen->sim_file);
82
83 v3d_compiler_free(screen->compiler);
84 u_transfer_helper_destroy(pscreen->transfer_helper);
85
86 close(screen->fd);
87 ralloc_free(pscreen);
88 }
89
90 static bool
91 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
92 {
93 struct drm_v3d_get_param p = {
94 .param = feature,
95 };
96 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
97
98 if (ret != 0)
99 return false;
100
101 return p.value;
102 }
103
104 static int
105 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
106 {
107 struct v3d_screen *screen = v3d_screen(pscreen);
108
109 switch (param) {
110 /* Supported features (boolean caps). */
111 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
112 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
113 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_NPOT_TEXTURES:
116 case PIPE_CAP_SHAREABLE_SHADERS:
117 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
118 case PIPE_CAP_TEXTURE_MULTISAMPLE:
119 case PIPE_CAP_TEXTURE_SWIZZLE:
120 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
121 case PIPE_CAP_START_INSTANCE:
122 case PIPE_CAP_TGSI_INSTANCEID:
123 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
124 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
125 case PIPE_CAP_VERTEX_SHADER_SATURATE:
126 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
127 case PIPE_CAP_OCCLUSION_QUERY:
128 case PIPE_CAP_POINT_SPRITE:
129 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
130 case PIPE_CAP_DRAW_INDIRECT:
131 case PIPE_CAP_MULTI_DRAW_INDIRECT:
132 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
133 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
134 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
135 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
136 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
137 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
138 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
139 case PIPE_CAP_TGSI_TEXCOORD:
140 return 1;
141
142 case PIPE_CAP_TEXTURE_QUERY_LOD:
143 return screen->devinfo.ver >= 42;
144 break;
145
146 case PIPE_CAP_PACKED_UNIFORMS:
147 /* We can't enable this flag, because it results in load_ubo
148 * intrinsics across a 16b boundary, but v3d's TMU general
149 * memory accesses wrap on 16b boundaries.
150 */
151 return 0;
152
153 case PIPE_CAP_NIR_IMAGES_AS_DEREF:
154 return 0;
155
156 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
157 /* XXX perf: we don't want to emit these extra blits for
158 * glReadPixels(), since we still have to do an uncached read
159 * from the GPU of the result after waiting for the TFU blit
160 * to happen. However, disabling this introduces instability
161 * in
162 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
163 * and corruption in chromium's rendering.
164 */
165 return 1;
166
167 case PIPE_CAP_COMPUTE:
168 return screen->has_csd && screen->devinfo.ver >= 41;
169
170 case PIPE_CAP_GENERATE_MIPMAP:
171 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
172
173 case PIPE_CAP_INDEP_BLEND_ENABLE:
174 return screen->devinfo.ver >= 40;
175
176 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
177 return 256;
178
179 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
180 if (screen->devinfo.ver < 40)
181 return 0;
182 return 4;
183
184 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
185 if (screen->has_cache_flush)
186 return 4;
187 else
188 return 0; /* Disables shader storage */
189
190 case PIPE_CAP_GLSL_FEATURE_LEVEL:
191 return 330;
192
193 case PIPE_CAP_ESSL_FEATURE_LEVEL:
194 return 310;
195
196 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
197 return 140;
198
199 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
200 return 1;
201 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
202 return 0;
203 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
204 if (screen->devinfo.ver >= 40)
205 return 0;
206 else
207 return 1;
208 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
209 if (screen->devinfo.ver >= 40)
210 return 1;
211 else
212 return 0;
213
214 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
215 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
216 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
217 return 1;
218
219 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
220 return 4;
221
222 case PIPE_CAP_MAX_VARYINGS:
223 return V3D_MAX_FS_INPUTS / 4;
224
225 /* Texturing. */
226 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
227 if (screen->devinfo.ver < 40)
228 return 2048;
229 else if (screen->nonmsaa_texture_size_limit)
230 return 7680;
231 else
232 return 4096;
233 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
234 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
235 if (screen->devinfo.ver < 40)
236 return 12;
237 else
238 return V3D_MAX_MIP_LEVELS;
239 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
240 return 2048;
241
242 /* Render targets. */
243 case PIPE_CAP_MAX_RENDER_TARGETS:
244 return 4;
245
246 case PIPE_CAP_VENDOR_ID:
247 return 0x14E4;
248 case PIPE_CAP_ACCELERATED:
249 return 1;
250 case PIPE_CAP_VIDEO_MEMORY: {
251 uint64_t system_memory;
252
253 if (!os_get_total_physical_memory(&system_memory))
254 return 0;
255
256 return (int)(system_memory >> 20);
257 }
258 case PIPE_CAP_UMA:
259 return 1;
260
261 /* Geometry shaders */
262 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
263 /* Minimum required by GLES 3.2 */
264 return 1024;
265 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
266 /* MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS / 4 */
267 return 256;
268 case PIPE_CAP_MAX_GS_INVOCATIONS:
269 return 32;
270
271 default:
272 return u_pipe_screen_get_param_defaults(pscreen, param);
273 }
274 }
275
276 static float
277 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
278 {
279 switch (param) {
280 case PIPE_CAPF_MAX_LINE_WIDTH:
281 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
282 return 32;
283
284 case PIPE_CAPF_MAX_POINT_WIDTH:
285 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
286 return 512.0f;
287
288 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
289 return 0.0f;
290 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
291 return 16.0f;
292
293 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
294 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
295 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
296 return 0.0f;
297 default:
298 fprintf(stderr, "unknown paramf %d\n", param);
299 return 0;
300 }
301 }
302
303 static int
304 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
305 enum pipe_shader_cap param)
306 {
307 struct v3d_screen *screen = v3d_screen(pscreen);
308
309 switch (shader) {
310 case PIPE_SHADER_VERTEX:
311 case PIPE_SHADER_FRAGMENT:
312 break;
313 case PIPE_SHADER_COMPUTE:
314 if (!screen->has_csd)
315 return 0;
316 break;
317 case PIPE_SHADER_GEOMETRY:
318 if (screen->devinfo.ver < 41)
319 return 0;
320 break;
321 default:
322 return 0;
323 }
324
325 /* this is probably not totally correct.. but it's a start: */
326 switch (param) {
327 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
328 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
329 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
330 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
331 return 16384;
332
333 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
334 return UINT_MAX;
335
336 case PIPE_SHADER_CAP_MAX_INPUTS:
337 switch (shader) {
338 case PIPE_SHADER_VERTEX:
339 return V3D_MAX_VS_INPUTS / 4;
340 case PIPE_SHADER_GEOMETRY:
341 return V3D_MAX_GS_INPUTS / 4;
342 case PIPE_SHADER_FRAGMENT:
343 return V3D_MAX_FS_INPUTS / 4;
344 default:
345 return 0;
346 };
347 case PIPE_SHADER_CAP_MAX_OUTPUTS:
348 if (shader == PIPE_SHADER_FRAGMENT)
349 return 4;
350 else
351 return V3D_MAX_FS_INPUTS / 4;
352 case PIPE_SHADER_CAP_MAX_TEMPS:
353 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
354 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
355 /* Note: Limited by the offset size in
356 * v3d_unit_data_create().
357 */
358 return 16 * 1024 * sizeof(float);
359 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
360 return 16;
361 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
362 return 0;
363 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
364 return 1;
365 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
366 return 0;
367 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
368 return 1;
369 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
370 return 1;
371 case PIPE_SHADER_CAP_SUBROUTINES:
372 return 0;
373 case PIPE_SHADER_CAP_INTEGERS:
374 return 1;
375 case PIPE_SHADER_CAP_FP16:
376 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
377 case PIPE_SHADER_CAP_INT16:
378 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
379 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
380 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
381 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
382 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
383 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
384 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
385 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
386 return 0;
387 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
388 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
389 return V3D_MAX_TEXTURE_SAMPLERS;
390
391 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
392 if (screen->has_cache_flush) {
393 if (shader == PIPE_SHADER_VERTEX ||
394 shader == PIPE_SHADER_GEOMETRY) {
395 return 0;
396 }
397 return PIPE_MAX_SHADER_BUFFERS;
398 } else {
399 return 0;
400 }
401
402 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
403 if (screen->has_cache_flush) {
404 if (screen->devinfo.ver < 41)
405 return 0;
406 else
407 return PIPE_MAX_SHADER_IMAGES;
408 } else {
409 return 0;
410 }
411
412 case PIPE_SHADER_CAP_PREFERRED_IR:
413 return PIPE_SHADER_IR_NIR;
414 case PIPE_SHADER_CAP_SUPPORTED_IRS:
415 return 1 << PIPE_SHADER_IR_NIR;
416 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
417 return 32;
418 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
419 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
420 return 0;
421 default:
422 fprintf(stderr, "unknown shader param %d\n", param);
423 return 0;
424 }
425 return 0;
426 }
427
428 static int
429 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
430 enum pipe_compute_cap param, void *ret)
431 {
432 struct v3d_screen *screen = v3d_screen(pscreen);
433
434 if (!screen->has_csd)
435 return 0;
436
437 #define RET(x) do { \
438 if (ret) \
439 memcpy(ret, x, sizeof(x)); \
440 return sizeof(x); \
441 } while (0)
442
443 switch (param) {
444 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
445 RET((uint32_t []) { 32 });
446 break;
447
448 case PIPE_COMPUTE_CAP_IR_TARGET:
449 sprintf(ret, "v3d");
450 return strlen(ret);
451
452 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
453 RET((uint64_t []) { 3 });
454
455 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
456 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
457 * 16-bit field for the number of workgroups in each
458 * dimension.
459 */
460 RET(((uint64_t []) { 65535, 65535, 65535 }));
461
462 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
463 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
464 RET(((uint64_t []) { 256, 256, 256 }));
465
466 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
467 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
468 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
469 * limited by WG_SIZE in the CSD.
470 */
471 RET((uint64_t []) { 256 });
472
473 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
474 RET((uint64_t []) { 1024 * 1024 * 1024 });
475
476 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
477 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
478 RET((uint64_t []) { 32768 });
479
480 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
481 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
482 RET((uint64_t []) { 4096 });
483
484 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
485 struct sysinfo si;
486 sysinfo(&si);
487 RET((uint64_t []) { si.totalram });
488 }
489
490 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
491 /* OpenCL only */
492 RET((uint32_t []) { 0 });
493
494 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
495 RET((uint32_t []) { 1 });
496
497 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
498 RET((uint32_t []) { 1 });
499
500 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
501 RET((uint32_t []) { 16 });
502
503 }
504
505 return 0;
506 }
507
508 static bool
509 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
510 enum pipe_format format,
511 enum pipe_texture_target target,
512 unsigned sample_count,
513 unsigned storage_sample_count,
514 unsigned usage)
515 {
516 struct v3d_screen *screen = v3d_screen(pscreen);
517
518 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
519 return false;
520
521 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
522 return false;
523
524 if (target >= PIPE_MAX_TEXTURE_TYPES) {
525 return false;
526 }
527
528 if (usage & PIPE_BIND_VERTEX_BUFFER) {
529 switch (format) {
530 case PIPE_FORMAT_R32G32B32A32_FLOAT:
531 case PIPE_FORMAT_R32G32B32_FLOAT:
532 case PIPE_FORMAT_R32G32_FLOAT:
533 case PIPE_FORMAT_R32_FLOAT:
534 case PIPE_FORMAT_R32G32B32A32_SNORM:
535 case PIPE_FORMAT_R32G32B32_SNORM:
536 case PIPE_FORMAT_R32G32_SNORM:
537 case PIPE_FORMAT_R32_SNORM:
538 case PIPE_FORMAT_R32G32B32A32_SSCALED:
539 case PIPE_FORMAT_R32G32B32_SSCALED:
540 case PIPE_FORMAT_R32G32_SSCALED:
541 case PIPE_FORMAT_R32_SSCALED:
542 case PIPE_FORMAT_R16G16B16A16_UNORM:
543 case PIPE_FORMAT_R16G16B16_UNORM:
544 case PIPE_FORMAT_R16G16_UNORM:
545 case PIPE_FORMAT_R16_UNORM:
546 case PIPE_FORMAT_R16G16B16A16_SNORM:
547 case PIPE_FORMAT_R16G16B16_SNORM:
548 case PIPE_FORMAT_R16G16_SNORM:
549 case PIPE_FORMAT_R16_SNORM:
550 case PIPE_FORMAT_R16G16B16A16_USCALED:
551 case PIPE_FORMAT_R16G16B16_USCALED:
552 case PIPE_FORMAT_R16G16_USCALED:
553 case PIPE_FORMAT_R16_USCALED:
554 case PIPE_FORMAT_R16G16B16A16_SSCALED:
555 case PIPE_FORMAT_R16G16B16_SSCALED:
556 case PIPE_FORMAT_R16G16_SSCALED:
557 case PIPE_FORMAT_R16_SSCALED:
558 case PIPE_FORMAT_R8G8B8A8_UNORM:
559 case PIPE_FORMAT_R8G8B8_UNORM:
560 case PIPE_FORMAT_R8G8_UNORM:
561 case PIPE_FORMAT_R8_UNORM:
562 case PIPE_FORMAT_R8G8B8A8_SNORM:
563 case PIPE_FORMAT_R8G8B8_SNORM:
564 case PIPE_FORMAT_R8G8_SNORM:
565 case PIPE_FORMAT_R8_SNORM:
566 case PIPE_FORMAT_R8G8B8A8_USCALED:
567 case PIPE_FORMAT_R8G8B8_USCALED:
568 case PIPE_FORMAT_R8G8_USCALED:
569 case PIPE_FORMAT_R8_USCALED:
570 case PIPE_FORMAT_R8G8B8A8_SSCALED:
571 case PIPE_FORMAT_R8G8B8_SSCALED:
572 case PIPE_FORMAT_R8G8_SSCALED:
573 case PIPE_FORMAT_R8_SSCALED:
574 case PIPE_FORMAT_R10G10B10A2_UNORM:
575 case PIPE_FORMAT_B10G10R10A2_UNORM:
576 case PIPE_FORMAT_R10G10B10A2_SNORM:
577 case PIPE_FORMAT_B10G10R10A2_SNORM:
578 case PIPE_FORMAT_R10G10B10A2_USCALED:
579 case PIPE_FORMAT_B10G10R10A2_USCALED:
580 case PIPE_FORMAT_R10G10B10A2_SSCALED:
581 case PIPE_FORMAT_B10G10R10A2_SSCALED:
582 break;
583 default:
584 return false;
585 }
586 }
587
588 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
589 * of FRAMEBUFFER_MAX_SAMPLES
590 */
591 if ((usage & PIPE_BIND_RENDER_TARGET) &&
592 format != PIPE_FORMAT_NONE &&
593 !v3d_rt_format_supported(&screen->devinfo, format)) {
594 return false;
595 }
596
597 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
598 !v3d_tex_format_supported(&screen->devinfo, format)) {
599 return false;
600 }
601
602 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
603 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
604 format == PIPE_FORMAT_X8Z24_UNORM ||
605 format == PIPE_FORMAT_Z16_UNORM ||
606 format == PIPE_FORMAT_Z32_FLOAT ||
607 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
608 return false;
609 }
610
611 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
612 !(format == PIPE_FORMAT_I8_UINT ||
613 format == PIPE_FORMAT_I16_UINT ||
614 format == PIPE_FORMAT_I32_UINT)) {
615 return false;
616 }
617
618 return true;
619 }
620
621 static const void *
622 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
623 enum pipe_shader_ir ir, unsigned shader)
624 {
625 return &v3d_nir_options;
626 }
627
628 static void
629 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
630 enum pipe_format format, int max,
631 uint64_t *modifiers,
632 unsigned int *external_only,
633 int *count)
634 {
635 int i;
636 uint64_t available_modifiers[] = {
637 DRM_FORMAT_MOD_BROADCOM_UIF,
638 DRM_FORMAT_MOD_LINEAR,
639 };
640 int num_modifiers = ARRAY_SIZE(available_modifiers);
641
642 if (!modifiers) {
643 *count = num_modifiers;
644 return;
645 }
646
647 *count = MIN2(max, num_modifiers);
648 for (i = 0; i < *count; i++) {
649 modifiers[i] = available_modifiers[i];
650 if (external_only)
651 external_only[i] = false;
652 }
653 }
654
655 struct pipe_screen *
656 v3d_screen_create(int fd, const struct pipe_screen_config *config,
657 struct renderonly *ro)
658 {
659 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
660 struct pipe_screen *pscreen;
661
662 pscreen = &screen->base;
663
664 pscreen->destroy = v3d_screen_destroy;
665 pscreen->get_param = v3d_screen_get_param;
666 pscreen->get_paramf = v3d_screen_get_paramf;
667 pscreen->get_shader_param = v3d_screen_get_shader_param;
668 pscreen->get_compute_param = v3d_get_compute_param;
669 pscreen->context_create = v3d_context_create;
670 pscreen->is_format_supported = v3d_screen_is_format_supported;
671
672 screen->fd = fd;
673 if (ro) {
674 screen->ro = renderonly_dup(ro);
675 if (!screen->ro) {
676 fprintf(stderr, "Failed to dup renderonly object\n");
677 ralloc_free(screen);
678 return NULL;
679 }
680 }
681 list_inithead(&screen->bo_cache.time_list);
682 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
683 screen->bo_handles = util_hash_table_create_ptr_keys();
684
685 #if defined(USE_V3D_SIMULATOR)
686 screen->sim_file = v3d_simulator_init(screen->fd);
687 #endif
688
689 if (!v3d_get_device_info(screen->fd, &screen->devinfo, &v3d_ioctl))
690 goto fail;
691
692 /* We have to driCheckOption for the simulator mode to not assertion
693 * fail on not having our XML config.
694 */
695 const char *nonmsaa_name = "v3d_nonmsaa_texture_size_limit";
696 screen->nonmsaa_texture_size_limit =
697 driCheckOption(config->options, nonmsaa_name, DRI_BOOL) &&
698 driQueryOptionb(config->options, nonmsaa_name);
699
700 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
701
702 screen->has_csd = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CSD);
703 screen->has_cache_flush =
704 v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH);
705
706 v3d_fence_init(screen);
707
708 v3d_process_debug_variable();
709
710 v3d_resource_screen_init(pscreen);
711
712 screen->compiler = v3d_compiler_init(&screen->devinfo);
713
714 pscreen->get_name = v3d_screen_get_name;
715 pscreen->get_vendor = v3d_screen_get_vendor;
716 pscreen->get_device_vendor = v3d_screen_get_vendor;
717 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
718 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
719
720 return pscreen;
721
722 fail:
723 close(fd);
724 ralloc_free(pscreen);
725 return NULL;
726 }