6f91e35521a16f72ae895c0abbc85e61e71e7a02
[mesa.git] / src / gallium / drivers / v3d / v3d_screen.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "util/os_misc.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30 #include "pipe/p_state.h"
31
32 #include "util/u_debug.h"
33 #include "util/u_memory.h"
34 #include "util/u_format.h"
35 #include "util/u_hash_table.h"
36 #include "util/u_screen.h"
37 #include "util/u_transfer_helper.h"
38 #include "util/ralloc.h"
39
40 #include <xf86drm.h>
41 #include "v3d_screen.h"
42 #include "v3d_context.h"
43 #include "v3d_resource.h"
44 #include "compiler/v3d_compiler.h"
45 #include "drm-uapi/drm_fourcc.h"
46
47 static const char *
48 v3d_screen_get_name(struct pipe_screen *pscreen)
49 {
50 struct v3d_screen *screen = v3d_screen(pscreen);
51
52 if (!screen->name) {
53 screen->name = ralloc_asprintf(screen,
54 "V3D %d.%d",
55 screen->devinfo.ver / 10,
56 screen->devinfo.ver % 10);
57 }
58
59 return screen->name;
60 }
61
62 static const char *
63 v3d_screen_get_vendor(struct pipe_screen *pscreen)
64 {
65 return "Broadcom";
66 }
67
68 static void
69 v3d_screen_destroy(struct pipe_screen *pscreen)
70 {
71 struct v3d_screen *screen = v3d_screen(pscreen);
72
73 util_hash_table_destroy(screen->bo_handles);
74 v3d_bufmgr_destroy(pscreen);
75 slab_destroy_parent(&screen->transfer_pool);
76 free(screen->ro);
77
78 if (using_v3d_simulator)
79 v3d_simulator_destroy(screen);
80
81 v3d_compiler_free(screen->compiler);
82 u_transfer_helper_destroy(pscreen->transfer_helper);
83
84 close(screen->fd);
85 ralloc_free(pscreen);
86 }
87
88 static bool
89 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
90 {
91 struct drm_v3d_get_param p = {
92 .param = feature,
93 };
94 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
95
96 if (ret != 0)
97 return false;
98
99 return p.value;
100 }
101
102 static int
103 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
104 {
105 struct v3d_screen *screen = v3d_screen(pscreen);
106
107 switch (param) {
108 /* Supported features (boolean caps). */
109 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
110 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
111 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
112 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
113 case PIPE_CAP_NPOT_TEXTURES:
114 case PIPE_CAP_SHAREABLE_SHADERS:
115 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
116 case PIPE_CAP_TEXTURE_MULTISAMPLE:
117 case PIPE_CAP_TEXTURE_SWIZZLE:
118 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
119 case PIPE_CAP_START_INSTANCE:
120 case PIPE_CAP_TGSI_INSTANCEID:
121 case PIPE_CAP_SM3:
122 case PIPE_CAP_TEXTURE_QUERY_LOD:
123 case PIPE_CAP_PRIMITIVE_RESTART:
124 case PIPE_CAP_OCCLUSION_QUERY:
125 case PIPE_CAP_POINT_SPRITE:
126 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
127 case PIPE_CAP_DRAW_INDIRECT:
128 case PIPE_CAP_MULTI_DRAW_INDIRECT:
129 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
130 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
131 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
132 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
133 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
134 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
135 return 1;
136
137 case PIPE_CAP_PACKED_UNIFORMS:
138 /* We can't enable this flag, because it results in load_ubo
139 * intrinsics across a 16b boundary, but v3d's TMU general
140 * memory accesses wrap on 16b boundaries.
141 */
142 return 0;
143
144 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
145 return 0;
146
147 case PIPE_CAP_COMPUTE:
148 return screen->has_csd && screen->devinfo.ver >= 41;
149
150 case PIPE_CAP_GENERATE_MIPMAP:
151 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
152
153 case PIPE_CAP_INDEP_BLEND_ENABLE:
154 return screen->devinfo.ver >= 40;
155
156 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
157 return 256;
158
159 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
160 if (screen->devinfo.ver < 40)
161 return 0;
162 return 4;
163
164 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
165 return 4;
166
167 case PIPE_CAP_GLSL_FEATURE_LEVEL:
168 return 330;
169
170 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
171 return 140;
172
173 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
174 return 1;
175 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
176 return 0;
177 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
178 if (screen->devinfo.ver >= 40)
179 return 0;
180 else
181 return 1;
182 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
183 if (screen->devinfo.ver >= 40)
184 return 1;
185 else
186 return 0;
187
188 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
189 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
190 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
191 return 1;
192
193 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
194 return 4;
195
196 case PIPE_CAP_MAX_VARYINGS:
197 return V3D_MAX_FS_INPUTS / 4;
198
199 /* Texturing. */
200 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
201 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
202 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
203 if (screen->devinfo.ver < 40)
204 return 12;
205 else
206 return V3D_MAX_MIP_LEVELS;
207 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
208 return 2048;
209
210 /* Render targets. */
211 case PIPE_CAP_MAX_RENDER_TARGETS:
212 return 4;
213
214 case PIPE_CAP_VENDOR_ID:
215 return 0x14E4;
216 case PIPE_CAP_ACCELERATED:
217 return 1;
218 case PIPE_CAP_VIDEO_MEMORY: {
219 uint64_t system_memory;
220
221 if (!os_get_total_physical_memory(&system_memory))
222 return 0;
223
224 return (int)(system_memory >> 20);
225 }
226 case PIPE_CAP_UMA:
227 return 1;
228
229 default:
230 return u_pipe_screen_get_param_defaults(pscreen, param);
231 }
232 }
233
234 static float
235 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
236 {
237 switch (param) {
238 case PIPE_CAPF_MAX_LINE_WIDTH:
239 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
240 return 32;
241
242 case PIPE_CAPF_MAX_POINT_WIDTH:
243 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
244 return 512.0f;
245
246 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
247 return 0.0f;
248 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
249 return 16.0f;
250
251 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
252 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
253 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
254 return 0.0f;
255 default:
256 fprintf(stderr, "unknown paramf %d\n", param);
257 return 0;
258 }
259 }
260
261 static int
262 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
263 enum pipe_shader_cap param)
264 {
265 struct v3d_screen *screen = v3d_screen(pscreen);
266
267 switch (shader) {
268 case PIPE_SHADER_VERTEX:
269 case PIPE_SHADER_FRAGMENT:
270 break;
271 case PIPE_SHADER_COMPUTE:
272 if (!screen->has_csd)
273 return 0;
274 break;
275 default:
276 return 0;
277 }
278
279 /* this is probably not totally correct.. but it's a start: */
280 switch (param) {
281 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
282 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
283 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
284 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
285 return 16384;
286
287 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
288 return UINT_MAX;
289
290 case PIPE_SHADER_CAP_MAX_INPUTS:
291 if (shader == PIPE_SHADER_FRAGMENT)
292 return V3D_MAX_FS_INPUTS / 4;
293 else
294 return V3D_MAX_VS_INPUTS / 4;
295 case PIPE_SHADER_CAP_MAX_OUTPUTS:
296 if (shader == PIPE_SHADER_FRAGMENT)
297 return 4;
298 else
299 return V3D_MAX_FS_INPUTS / 4;
300 case PIPE_SHADER_CAP_MAX_TEMPS:
301 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
302 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
303 /* Note: Limited by the offset size in
304 * v3d_unit_data_create().
305 */
306 return 16 * 1024 * sizeof(float);
307 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
308 return 16;
309 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
310 return 0;
311 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
312 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
313 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
314 return 0;
315 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
316 return 1;
317 case PIPE_SHADER_CAP_SUBROUTINES:
318 return 0;
319 case PIPE_SHADER_CAP_INTEGERS:
320 return 1;
321 case PIPE_SHADER_CAP_FP16:
322 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
323 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
324 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
325 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
326 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
327 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
328 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
329 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
330 return 0;
331 case PIPE_SHADER_CAP_SCALAR_ISA:
332 return 1;
333 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
334 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
335 return V3D_MAX_TEXTURE_SAMPLERS;
336
337 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
338 return PIPE_MAX_SHADER_BUFFERS;
339
340 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
341 if (screen->devinfo.ver < 41)
342 return 0;
343 else
344 return PIPE_MAX_SHADER_IMAGES;
345
346 case PIPE_SHADER_CAP_PREFERRED_IR:
347 return PIPE_SHADER_IR_NIR;
348 case PIPE_SHADER_CAP_SUPPORTED_IRS:
349 return 1 << PIPE_SHADER_IR_NIR;
350 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
351 return 32;
352 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
353 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
354 return 0;
355 default:
356 fprintf(stderr, "unknown shader param %d\n", param);
357 return 0;
358 }
359 return 0;
360 }
361
362 static int
363 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
364 enum pipe_compute_cap param, void *ret)
365 {
366 struct v3d_screen *screen = v3d_screen(pscreen);
367
368 if (!screen->has_csd)
369 return 0;
370
371 #define RET(x) do { \
372 if (ret) \
373 memcpy(ret, x, sizeof(x)); \
374 return sizeof(x); \
375 } while (0)
376
377 switch (param) {
378 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
379 RET((uint32_t []) { 32 });
380 break;
381
382 case PIPE_COMPUTE_CAP_IR_TARGET:
383 sprintf(ret, "v3d");
384 return strlen(ret);
385
386 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
387 RET((uint64_t []) { 3 });
388
389 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
390 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
391 * 16-bit field for the number of workgroups in each
392 * dimension.
393 */
394 RET(((uint64_t []) { 65535, 65535, 65535 }));
395
396 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
397 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
398 RET(((uint64_t []) { 256, 256, 256 }));
399
400 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
401 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
402 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
403 * limited by WG_SIZE in the CSD.
404 */
405 RET((uint64_t []) { 256 });
406
407 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
408 RET((uint64_t []) { 1024 * 1024 * 1024 });
409
410 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
411 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
412 RET((uint64_t []) { 32768 });
413
414 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
415 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
416 RET((uint64_t []) { 4096 });
417
418 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
419 struct sysinfo si;
420 sysinfo(&si);
421 RET((uint64_t []) { si.totalram });
422 }
423
424 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
425 /* OpenCL only */
426 RET((uint32_t []) { 0 });
427
428 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
429 RET((uint32_t []) { 1 });
430
431 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
432 RET((uint32_t []) { 1 });
433
434 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
435 RET((uint32_t []) { 16 });
436
437 }
438
439 return 0;
440 }
441
442 static boolean
443 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
444 enum pipe_format format,
445 enum pipe_texture_target target,
446 unsigned sample_count,
447 unsigned storage_sample_count,
448 unsigned usage)
449 {
450 struct v3d_screen *screen = v3d_screen(pscreen);
451
452 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
453 return false;
454
455 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
456 return FALSE;
457
458 if (target >= PIPE_MAX_TEXTURE_TYPES) {
459 return FALSE;
460 }
461
462 if (usage & PIPE_BIND_VERTEX_BUFFER) {
463 switch (format) {
464 case PIPE_FORMAT_R32G32B32A32_FLOAT:
465 case PIPE_FORMAT_R32G32B32_FLOAT:
466 case PIPE_FORMAT_R32G32_FLOAT:
467 case PIPE_FORMAT_R32_FLOAT:
468 case PIPE_FORMAT_R32G32B32A32_SNORM:
469 case PIPE_FORMAT_R32G32B32_SNORM:
470 case PIPE_FORMAT_R32G32_SNORM:
471 case PIPE_FORMAT_R32_SNORM:
472 case PIPE_FORMAT_R32G32B32A32_SSCALED:
473 case PIPE_FORMAT_R32G32B32_SSCALED:
474 case PIPE_FORMAT_R32G32_SSCALED:
475 case PIPE_FORMAT_R32_SSCALED:
476 case PIPE_FORMAT_R16G16B16A16_UNORM:
477 case PIPE_FORMAT_R16G16B16_UNORM:
478 case PIPE_FORMAT_R16G16_UNORM:
479 case PIPE_FORMAT_R16_UNORM:
480 case PIPE_FORMAT_R16G16B16A16_SNORM:
481 case PIPE_FORMAT_R16G16B16_SNORM:
482 case PIPE_FORMAT_R16G16_SNORM:
483 case PIPE_FORMAT_R16_SNORM:
484 case PIPE_FORMAT_R16G16B16A16_USCALED:
485 case PIPE_FORMAT_R16G16B16_USCALED:
486 case PIPE_FORMAT_R16G16_USCALED:
487 case PIPE_FORMAT_R16_USCALED:
488 case PIPE_FORMAT_R16G16B16A16_SSCALED:
489 case PIPE_FORMAT_R16G16B16_SSCALED:
490 case PIPE_FORMAT_R16G16_SSCALED:
491 case PIPE_FORMAT_R16_SSCALED:
492 case PIPE_FORMAT_R8G8B8A8_UNORM:
493 case PIPE_FORMAT_R8G8B8_UNORM:
494 case PIPE_FORMAT_R8G8_UNORM:
495 case PIPE_FORMAT_R8_UNORM:
496 case PIPE_FORMAT_R8G8B8A8_SNORM:
497 case PIPE_FORMAT_R8G8B8_SNORM:
498 case PIPE_FORMAT_R8G8_SNORM:
499 case PIPE_FORMAT_R8_SNORM:
500 case PIPE_FORMAT_R8G8B8A8_USCALED:
501 case PIPE_FORMAT_R8G8B8_USCALED:
502 case PIPE_FORMAT_R8G8_USCALED:
503 case PIPE_FORMAT_R8_USCALED:
504 case PIPE_FORMAT_R8G8B8A8_SSCALED:
505 case PIPE_FORMAT_R8G8B8_SSCALED:
506 case PIPE_FORMAT_R8G8_SSCALED:
507 case PIPE_FORMAT_R8_SSCALED:
508 case PIPE_FORMAT_R10G10B10A2_UNORM:
509 case PIPE_FORMAT_B10G10R10A2_UNORM:
510 case PIPE_FORMAT_R10G10B10A2_SNORM:
511 case PIPE_FORMAT_B10G10R10A2_SNORM:
512 case PIPE_FORMAT_R10G10B10A2_USCALED:
513 case PIPE_FORMAT_B10G10R10A2_USCALED:
514 case PIPE_FORMAT_R10G10B10A2_SSCALED:
515 case PIPE_FORMAT_B10G10R10A2_SSCALED:
516 break;
517 default:
518 return FALSE;
519 }
520 }
521
522 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
523 * of FRAMEBUFFER_MAX_SAMPLES
524 */
525 if ((usage & PIPE_BIND_RENDER_TARGET) &&
526 format != PIPE_FORMAT_NONE &&
527 !v3d_rt_format_supported(&screen->devinfo, format)) {
528 return FALSE;
529 }
530
531 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
532 !v3d_tex_format_supported(&screen->devinfo, format)) {
533 return FALSE;
534 }
535
536 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
537 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
538 format == PIPE_FORMAT_X8Z24_UNORM ||
539 format == PIPE_FORMAT_Z16_UNORM ||
540 format == PIPE_FORMAT_Z32_FLOAT ||
541 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
542 return FALSE;
543 }
544
545 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
546 !(format == PIPE_FORMAT_I8_UINT ||
547 format == PIPE_FORMAT_I16_UINT ||
548 format == PIPE_FORMAT_I32_UINT)) {
549 return FALSE;
550 }
551
552 return TRUE;
553 }
554
555 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
556
557 static unsigned handle_hash(void *key)
558 {
559 return PTR_TO_UINT(key);
560 }
561
562 static int handle_compare(void *key1, void *key2)
563 {
564 return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
565 }
566
567 static bool
568 v3d_get_device_info(struct v3d_screen *screen)
569 {
570 struct drm_v3d_get_param ident0 = {
571 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT0,
572 };
573 struct drm_v3d_get_param ident1 = {
574 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT1,
575 };
576 int ret;
577
578 ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident0);
579 if (ret != 0) {
580 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
581 strerror(errno));
582 return false;
583 }
584 ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident1);
585 if (ret != 0) {
586 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
587 strerror(errno));
588 return false;
589 }
590
591 uint32_t major = (ident0.value >> 24) & 0xff;
592 uint32_t minor = (ident1.value >> 0) & 0xf;
593 screen->devinfo.ver = major * 10 + minor;
594
595 screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 8192;
596
597 int nslc = (ident1.value >> 4) & 0xf;
598 int qups = (ident1.value >> 8) & 0xf;
599 screen->devinfo.qpu_count = nslc * qups;
600
601 switch (screen->devinfo.ver) {
602 case 33:
603 case 41:
604 case 42:
605 break;
606 default:
607 fprintf(stderr,
608 "V3D %d.%d not supported by this version of Mesa.\n",
609 screen->devinfo.ver / 10,
610 screen->devinfo.ver % 10);
611 return false;
612 }
613
614 return true;
615 }
616
617 static const void *
618 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
619 enum pipe_shader_ir ir, unsigned shader)
620 {
621 return &v3d_nir_options;
622 }
623
624 static void
625 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
626 enum pipe_format format, int max,
627 uint64_t *modifiers,
628 unsigned int *external_only,
629 int *count)
630 {
631 int i;
632 uint64_t available_modifiers[] = {
633 DRM_FORMAT_MOD_BROADCOM_UIF,
634 DRM_FORMAT_MOD_LINEAR,
635 };
636 int num_modifiers = ARRAY_SIZE(available_modifiers);
637
638 if (!modifiers) {
639 *count = num_modifiers;
640 return;
641 }
642
643 *count = MIN2(max, num_modifiers);
644 for (i = 0; i < *count; i++) {
645 modifiers[i] = available_modifiers[i];
646 if (external_only)
647 external_only[i] = false;
648 }
649 }
650
651 struct pipe_screen *
652 v3d_screen_create(int fd, struct renderonly *ro)
653 {
654 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
655 struct pipe_screen *pscreen;
656
657 pscreen = &screen->base;
658
659 pscreen->destroy = v3d_screen_destroy;
660 pscreen->get_param = v3d_screen_get_param;
661 pscreen->get_paramf = v3d_screen_get_paramf;
662 pscreen->get_shader_param = v3d_screen_get_shader_param;
663 pscreen->get_compute_param = v3d_get_compute_param;
664 pscreen->context_create = v3d_context_create;
665 pscreen->is_format_supported = v3d_screen_is_format_supported;
666
667 screen->fd = fd;
668 if (ro) {
669 screen->ro = renderonly_dup(ro);
670 if (!screen->ro) {
671 fprintf(stderr, "Failed to dup renderonly object\n");
672 ralloc_free(screen);
673 return NULL;
674 }
675 }
676 list_inithead(&screen->bo_cache.time_list);
677 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
678 screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
679
680 #if defined(USE_V3D_SIMULATOR)
681 v3d_simulator_init(screen);
682 #endif
683
684 if (!v3d_get_device_info(screen))
685 goto fail;
686
687 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
688
689 screen->has_csd = false; /* until the UABI is enabled. */
690
691 v3d_fence_init(screen);
692
693 v3d_process_debug_variable();
694
695 v3d_resource_screen_init(pscreen);
696
697 screen->compiler = v3d_compiler_init(&screen->devinfo);
698
699 pscreen->get_name = v3d_screen_get_name;
700 pscreen->get_vendor = v3d_screen_get_vendor;
701 pscreen->get_device_vendor = v3d_screen_get_vendor;
702 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
703 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
704
705 return pscreen;
706
707 fail:
708 close(fd);
709 ralloc_free(pscreen);
710 return NULL;
711 }