src/gallium/drivers/v3d/v3d_screen.c

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "util/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_debug.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/u_hash_table.h"
  34 #include "util/u_screen.h"
  35 #include "util/ralloc.h"
  36
  37 #include <xf86drm.h>
  38 #include "v3d_screen.h"
  39 #include "v3d_context.h"
  40 #include "v3d_resource.h"
  41 #include "compiler/v3d_compiler.h"
  42
  43 static const char *
  44 v3d_screen_get_name(struct pipe_screen *pscreen)
  45 {
  46         struct v3d_screen *screen = v3d_screen(pscreen);
  47
  48         if (!screen->name) {
  49                 screen->name = ralloc_asprintf(screen,
  50                                                "V3D %d.%d",
  51                                                screen->devinfo.ver / 10,
  52                                                screen->devinfo.ver % 10);
  53         }
  54
  55         return screen->name;
  56 }
  57
  58 static const char *
  59 v3d_screen_get_vendor(struct pipe_screen *pscreen)
  60 {
  61         return "Broadcom";
  62 }
  63
  64 static void
  65 v3d_screen_destroy(struct pipe_screen *pscreen)
  66 {
  67         struct v3d_screen *screen = v3d_screen(pscreen);
  68
  69         util_hash_table_destroy(screen->bo_handles);
  70         v3d_bufmgr_destroy(pscreen);
  71         slab_destroy_parent(&screen->transfer_pool);
  72
  73         if (using_v3d_simulator)
  74                 v3d_simulator_destroy(screen);
  75
  76         v3d_compiler_free(screen->compiler);
  77
  78         close(screen->fd);
  79         ralloc_free(pscreen);
  80 }
  81
  82 static int
  83 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  84 {
  85         struct v3d_screen *screen = v3d_screen(pscreen);
  86
  87         switch (param) {
  88                 /* Supported features (boolean caps). */
  89         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
  90         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
  91         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
  92         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
  93         case PIPE_CAP_NPOT_TEXTURES:
  94         case PIPE_CAP_SHAREABLE_SHADERS:
  95         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  96         case PIPE_CAP_TEXTURE_MULTISAMPLE:
  97         case PIPE_CAP_TEXTURE_SWIZZLE:
  98         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
  99         case PIPE_CAP_START_INSTANCE:
 100         case PIPE_CAP_TGSI_INSTANCEID:
 101         case PIPE_CAP_SM3:
 102         case PIPE_CAP_TEXTURE_QUERY_LOD:
 103         case PIPE_CAP_PRIMITIVE_RESTART:
 104         case PIPE_CAP_OCCLUSION_QUERY:
 105         case PIPE_CAP_POINT_SPRITE:
 106         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 107         case PIPE_CAP_COMPUTE:
 108         case PIPE_CAP_DRAW_INDIRECT:
 109         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 110         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 111         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 112         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 113                 return 1;
 114
 115         case PIPE_CAP_INDEP_BLEND_ENABLE:
 116                 return screen->devinfo.ver >= 40;
 117
 118         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 119                 return 256;
 120
 121         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 122                 return 4;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125                 return 400;
 126
 127         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 128                 return 140;
 129
 130         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 131                 return 1;
 132         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 133                 return 0;
 134         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 135                 if (screen->devinfo.ver >= 40)
 136                         return 0;
 137                 else
 138                         return 1;
 139         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 140                 if (screen->devinfo.ver >= 40)
 141                         return 1;
 142                 else
 143                         return 0;
 144
 145         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 146         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 147         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 148                 return 1;
 149
 150         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 151                 return 4;
 152
 153                 /* Texturing. */
 154         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 155         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 156         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 157                 return VC5_MAX_MIP_LEVELS;
 158         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 159                 return 2048;
 160
 161                 /* Render targets. */
 162         case PIPE_CAP_MAX_RENDER_TARGETS:
 163                 return 4;
 164
 165         case PIPE_CAP_VENDOR_ID:
 166                 return 0x14E4;
 167         case PIPE_CAP_ACCELERATED:
 168                 return 1;
 169         case PIPE_CAP_VIDEO_MEMORY: {
 170                 uint64_t system_memory;
 171
 172                 if (!os_get_total_physical_memory(&system_memory))
 173                         return 0;
 174
 175                 return (int)(system_memory >> 20);
 176         }
 177         case PIPE_CAP_UMA:
 178                 return 1;
 179
 180         default:
 181                 return u_pipe_screen_get_param_defaults(pscreen, param);
 182         }
 183 }
 184
 185 static float
 186 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 187 {
 188         switch (param) {
 189         case PIPE_CAPF_MAX_LINE_WIDTH:
 190         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 191                 return 32;
 192
 193         case PIPE_CAPF_MAX_POINT_WIDTH:
 194         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 195                 return 512.0f;
 196
 197         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 198                 return 0.0f;
 199         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 200                 return 16.0f;
 201
 202         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 203         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 204         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 205                 return 0.0f;
 206         default:
 207                 fprintf(stderr, "unknown paramf %d\n", param);
 208                 return 0;
 209         }
 210 }
 211
 212 static int
 213 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 214                            enum pipe_shader_cap param)
 215 {
 216         if (shader != PIPE_SHADER_VERTEX &&
 217             shader != PIPE_SHADER_FRAGMENT) {
 218                 return 0;
 219         }
 220
 221         /* this is probably not totally correct.. but it's a start: */
 222         switch (param) {
 223         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 224         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 225         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 226         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 227                 return 16384;
 228
 229         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 230                 return UINT_MAX;
 231
 232         case PIPE_SHADER_CAP_MAX_INPUTS:
 233                 if (shader == PIPE_SHADER_FRAGMENT)
 234                         return VC5_MAX_FS_INPUTS / 4;
 235                 else
 236                         return VC5_MAX_ATTRIBUTES;
 237         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 238                 if (shader == PIPE_SHADER_FRAGMENT)
 239                         return 4;
 240                 else
 241                         return VC5_MAX_FS_INPUTS / 4;
 242         case PIPE_SHADER_CAP_MAX_TEMPS:
 243                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 244         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 245                 return 16 * 1024 * sizeof(float);
 246         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 247                 return 16;
 248         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 249                 return 0;
 250         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 251         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 252         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 253                 return 0;
 254         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 255                 return 1;
 256         case PIPE_SHADER_CAP_SUBROUTINES:
 257                 return 0;
 258         case PIPE_SHADER_CAP_INTEGERS:
 259                 return 1;
 260         case PIPE_SHADER_CAP_FP16:
 261         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 262         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 263         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 264         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 265         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 266         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 267         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 268         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 269                 return 0;
 270         case PIPE_SHADER_CAP_SCALAR_ISA:
 271                 return 1;
 272         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 273         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 274         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 275         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 276                 return VC5_MAX_TEXTURE_SAMPLERS;
 277         case PIPE_SHADER_CAP_PREFERRED_IR:
 278                 return PIPE_SHADER_IR_NIR;
 279         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 280                 return 0;
 281         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 282                 return 32;
 283         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 284         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 285                 return 0;
 286         default:
 287                 fprintf(stderr, "unknown shader param %d\n", param);
 288                 return 0;
 289         }
 290         return 0;
 291 }
 292
 293 static boolean
 294 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
 295                                enum pipe_format format,
 296                                enum pipe_texture_target target,
 297                                unsigned sample_count,
 298                                unsigned storage_sample_count,
 299                                unsigned usage)
 300 {
 301         struct v3d_screen *screen = v3d_screen(pscreen);
 302
 303         if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 304                 return false;
 305
 306         if (sample_count > 1 && sample_count != VC5_MAX_SAMPLES)
 307                 return FALSE;
 308
 309         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 310                 return FALSE;
 311         }
 312
 313         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 314                 switch (format) {
 315                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 316                 case PIPE_FORMAT_R32G32B32_FLOAT:
 317                 case PIPE_FORMAT_R32G32_FLOAT:
 318                 case PIPE_FORMAT_R32_FLOAT:
 319                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 320                 case PIPE_FORMAT_R32G32B32_SNORM:
 321                 case PIPE_FORMAT_R32G32_SNORM:
 322                 case PIPE_FORMAT_R32_SNORM:
 323                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 324                 case PIPE_FORMAT_R32G32B32_SSCALED:
 325                 case PIPE_FORMAT_R32G32_SSCALED:
 326                 case PIPE_FORMAT_R32_SSCALED:
 327                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 328                 case PIPE_FORMAT_R16G16B16_UNORM:
 329                 case PIPE_FORMAT_R16G16_UNORM:
 330                 case PIPE_FORMAT_R16_UNORM:
 331                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 332                 case PIPE_FORMAT_R16G16B16_SNORM:
 333                 case PIPE_FORMAT_R16G16_SNORM:
 334                 case PIPE_FORMAT_R16_SNORM:
 335                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 336                 case PIPE_FORMAT_R16G16B16_USCALED:
 337                 case PIPE_FORMAT_R16G16_USCALED:
 338                 case PIPE_FORMAT_R16_USCALED:
 339                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 340                 case PIPE_FORMAT_R16G16B16_SSCALED:
 341                 case PIPE_FORMAT_R16G16_SSCALED:
 342                 case PIPE_FORMAT_R16_SSCALED:
 343                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 344                 case PIPE_FORMAT_R8G8B8_UNORM:
 345                 case PIPE_FORMAT_R8G8_UNORM:
 346                 case PIPE_FORMAT_R8_UNORM:
 347                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 348                 case PIPE_FORMAT_R8G8B8_SNORM:
 349                 case PIPE_FORMAT_R8G8_SNORM:
 350                 case PIPE_FORMAT_R8_SNORM:
 351                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 352                 case PIPE_FORMAT_R8G8B8_USCALED:
 353                 case PIPE_FORMAT_R8G8_USCALED:
 354                 case PIPE_FORMAT_R8_USCALED:
 355                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 356                 case PIPE_FORMAT_R8G8B8_SSCALED:
 357                 case PIPE_FORMAT_R8G8_SSCALED:
 358                 case PIPE_FORMAT_R8_SSCALED:
 359                 case PIPE_FORMAT_R10G10B10A2_UNORM:
 360                 case PIPE_FORMAT_B10G10R10A2_UNORM:
 361                 case PIPE_FORMAT_R10G10B10A2_SNORM:
 362                 case PIPE_FORMAT_B10G10R10A2_SNORM:
 363                 case PIPE_FORMAT_R10G10B10A2_USCALED:
 364                 case PIPE_FORMAT_B10G10R10A2_USCALED:
 365                 case PIPE_FORMAT_R10G10B10A2_SSCALED:
 366                 case PIPE_FORMAT_B10G10R10A2_SSCALED:
 367                         break;
 368                 default:
 369                         return FALSE;
 370                 }
 371         }
 372
 373         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 374             !v3d_rt_format_supported(&screen->devinfo, format)) {
 375                 return FALSE;
 376         }
 377
 378         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 379             !v3d_tex_format_supported(&screen->devinfo, format)) {
 380                 return FALSE;
 381         }
 382
 383         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 384             !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 385               format == PIPE_FORMAT_X8Z24_UNORM ||
 386               format == PIPE_FORMAT_Z16_UNORM ||
 387               format == PIPE_FORMAT_Z32_FLOAT ||
 388               format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
 389                 return FALSE;
 390         }
 391
 392         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 393             !(format == PIPE_FORMAT_I8_UINT ||
 394               format == PIPE_FORMAT_I16_UINT ||
 395               format == PIPE_FORMAT_I32_UINT)) {
 396                 return FALSE;
 397         }
 398
 399         return TRUE;
 400 }
 401
 402 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 403
 404 static unsigned handle_hash(void *key)
 405 {
 406     return PTR_TO_UINT(key);
 407 }
 408
 409 static int handle_compare(void *key1, void *key2)
 410 {
 411     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 412 }
 413
 414 static bool
 415 v3d_get_device_info(struct v3d_screen *screen)
 416 {
 417         struct drm_v3d_get_param ident0 = {
 418                 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT0,
 419         };
 420         struct drm_v3d_get_param ident1 = {
 421                 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT1,
 422         };
 423         int ret;
 424
 425         ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident0);
 426         if (ret != 0) {
 427                 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
 428                         strerror(errno));
 429                 return false;
 430         }
 431         ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident1);
 432         if (ret != 0) {
 433                 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
 434                         strerror(errno));
 435                 return false;
 436         }
 437
 438         uint32_t major = (ident0.value >> 24) & 0xff;
 439         uint32_t minor = (ident1.value >> 0) & 0xf;
 440         screen->devinfo.ver = major * 10 + minor;
 441
 442         screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 8192;
 443
 444         switch (screen->devinfo.ver) {
 445         case 33:
 446         case 41:
 447         case 42:
 448                 break;
 449         default:
 450                 fprintf(stderr,
 451                         "V3D %d.%d not supported by this version of Mesa.\n",
 452                         screen->devinfo.ver / 10,
 453                         screen->devinfo.ver % 10);
 454                 return false;
 455         }
 456
 457         return true;
 458 }
 459
 460 static const void *
 461 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
 462                                 enum pipe_shader_ir ir, unsigned shader)
 463 {
 464         return &v3d_nir_options;
 465 }
 466
 467 struct pipe_screen *
 468 v3d_screen_create(int fd)
 469 {
 470         struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
 471         struct pipe_screen *pscreen;
 472
 473         pscreen = &screen->base;
 474
 475         pscreen->destroy = v3d_screen_destroy;
 476         pscreen->get_param = v3d_screen_get_param;
 477         pscreen->get_paramf = v3d_screen_get_paramf;
 478         pscreen->get_shader_param = v3d_screen_get_shader_param;
 479         pscreen->context_create = v3d_context_create;
 480         pscreen->is_format_supported = v3d_screen_is_format_supported;
 481
 482         screen->fd = fd;
 483         list_inithead(&screen->bo_cache.time_list);
 484         (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
 485         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 486
 487 #if defined(USE_V3D_SIMULATOR)
 488         v3d_simulator_init(screen);
 489 #endif
 490
 491         if (!v3d_get_device_info(screen))
 492                 goto fail;
 493
 494         slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
 495
 496         v3d_fence_init(screen);
 497
 498         v3d_process_debug_variable();
 499
 500         v3d_resource_screen_init(pscreen);
 501
 502         screen->compiler = v3d_compiler_init(&screen->devinfo);
 503
 504         pscreen->get_name = v3d_screen_get_name;
 505         pscreen->get_vendor = v3d_screen_get_vendor;
 506         pscreen->get_device_vendor = v3d_screen_get_vendor;
 507         pscreen->get_compiler_options = v3d_screen_get_compiler_options;
 508
 509         return pscreen;
 510
 511 fail:
 512         close(fd);
 513         ralloc_free(pscreen);
 514         return NULL;
 515 }