2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include <sys/sysinfo.h>
27 #include "common/v3d_device_info.h"
28 #include "util/os_misc.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_screen.h"
31 #include "pipe/p_state.h"
33 #include "util/u_debug.h"
34 #include "util/u_memory.h"
35 #include "util/format/u_format.h"
36 #include "util/u_hash_table.h"
37 #include "util/u_screen.h"
38 #include "util/u_transfer_helper.h"
39 #include "util/ralloc.h"
40 #include "util/xmlconfig.h"
43 #include "v3d_screen.h"
44 #include "v3d_context.h"
45 #include "v3d_resource.h"
46 #include "compiler/v3d_compiler.h"
47 #include "drm-uapi/drm_fourcc.h"
50 v3d_screen_get_name(struct pipe_screen
*pscreen
)
52 struct v3d_screen
*screen
= v3d_screen(pscreen
);
55 screen
->name
= ralloc_asprintf(screen
,
57 screen
->devinfo
.ver
/ 10,
58 screen
->devinfo
.ver
% 10);
65 v3d_screen_get_vendor(struct pipe_screen
*pscreen
)
71 v3d_screen_destroy(struct pipe_screen
*pscreen
)
73 struct v3d_screen
*screen
= v3d_screen(pscreen
);
75 util_hash_table_destroy(screen
->bo_handles
);
76 v3d_bufmgr_destroy(pscreen
);
77 slab_destroy_parent(&screen
->transfer_pool
);
80 if (using_v3d_simulator
)
81 v3d_simulator_destroy(screen
);
83 v3d_compiler_free(screen
->compiler
);
84 u_transfer_helper_destroy(pscreen
->transfer_helper
);
91 v3d_has_feature(struct v3d_screen
*screen
, enum drm_v3d_param feature
)
93 struct drm_v3d_get_param p
= {
96 int ret
= v3d_ioctl(screen
->fd
, DRM_IOCTL_V3D_GET_PARAM
, &p
);
105 v3d_screen_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
107 struct v3d_screen
*screen
= v3d_screen(pscreen
);
110 /* Supported features (boolean caps). */
111 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
112 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
113 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
:
115 case PIPE_CAP_NPOT_TEXTURES
:
116 case PIPE_CAP_SHAREABLE_SHADERS
:
117 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
118 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
119 case PIPE_CAP_TEXTURE_SWIZZLE
:
120 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
121 case PIPE_CAP_START_INSTANCE
:
122 case PIPE_CAP_TGSI_INSTANCEID
:
123 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD
:
124 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES
:
125 case PIPE_CAP_VERTEX_SHADER_SATURATE
:
126 case PIPE_CAP_TEXTURE_QUERY_LOD
:
127 case PIPE_CAP_PRIMITIVE_RESTART
:
128 case PIPE_CAP_OCCLUSION_QUERY
:
129 case PIPE_CAP_POINT_SPRITE
:
130 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
:
131 case PIPE_CAP_DRAW_INDIRECT
:
132 case PIPE_CAP_MULTI_DRAW_INDIRECT
:
133 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
:
134 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET
:
135 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS
:
136 case PIPE_CAP_TGSI_PACK_HALF_FLOAT
:
137 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
138 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT
:
139 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL
:
142 case PIPE_CAP_PACKED_UNIFORMS
:
143 /* We can't enable this flag, because it results in load_ubo
144 * intrinsics across a 16b boundary, but v3d's TMU general
145 * memory accesses wrap on 16b boundaries.
149 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
150 /* XXX perf: we don't want to emit these extra blits for
151 * glReadPixels(), since we still have to do an uncached read
152 * from the GPU of the result after waiting for the TFU blit
153 * to happen. However, disabling this introduces instability
155 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
156 * and corruption in chromium's rendering.
160 case PIPE_CAP_COMPUTE
:
161 return screen
->has_csd
&& screen
->devinfo
.ver
>= 41;
163 case PIPE_CAP_GENERATE_MIPMAP
:
164 return v3d_has_feature(screen
, DRM_V3D_PARAM_SUPPORTS_TFU
);
166 case PIPE_CAP_INDEP_BLEND_ENABLE
:
167 return screen
->devinfo
.ver
>= 40;
169 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
172 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
173 if (screen
->devinfo
.ver
< 40)
177 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
178 if (screen
->has_cache_flush
)
181 return 0; /* Disables shader storage */
183 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
186 case PIPE_CAP_ESSL_FEATURE_LEVEL
:
189 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
192 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
194 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
196 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
197 if (screen
->devinfo
.ver
>= 40)
201 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
202 if (screen
->devinfo
.ver
>= 40)
207 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
208 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
209 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS
:
212 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
215 case PIPE_CAP_MAX_VARYINGS
:
216 return V3D_MAX_FS_INPUTS
/ 4;
219 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
220 if (screen
->devinfo
.ver
< 40)
222 else if (screen
->nonmsaa_texture_size_limit
)
226 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
227 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
228 if (screen
->devinfo
.ver
< 40)
231 return V3D_MAX_MIP_LEVELS
;
232 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
235 /* Render targets. */
236 case PIPE_CAP_MAX_RENDER_TARGETS
:
239 case PIPE_CAP_VENDOR_ID
:
241 case PIPE_CAP_ACCELERATED
:
243 case PIPE_CAP_VIDEO_MEMORY
: {
244 uint64_t system_memory
;
246 if (!os_get_total_physical_memory(&system_memory
))
249 return (int)(system_memory
>> 20);
254 /* Geometry shaders */
255 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
:
256 /* Minimum required by GLES 3.2 */
258 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
:
259 /* MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS / 4 */
261 case PIPE_CAP_MAX_GS_INVOCATIONS
:
265 return u_pipe_screen_get_param_defaults(pscreen
, param
);
270 v3d_screen_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
273 case PIPE_CAPF_MAX_LINE_WIDTH
:
274 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
277 case PIPE_CAPF_MAX_POINT_WIDTH
:
278 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
281 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
283 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
286 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
287 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
288 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
291 fprintf(stderr
, "unknown paramf %d\n", param
);
297 v3d_screen_get_shader_param(struct pipe_screen
*pscreen
, unsigned shader
,
298 enum pipe_shader_cap param
)
300 struct v3d_screen
*screen
= v3d_screen(pscreen
);
303 case PIPE_SHADER_VERTEX
:
304 case PIPE_SHADER_FRAGMENT
:
306 case PIPE_SHADER_COMPUTE
:
307 if (!screen
->has_csd
)
310 case PIPE_SHADER_GEOMETRY
:
311 if (screen
->devinfo
.ver
< 41)
318 /* this is probably not totally correct.. but it's a start: */
320 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
321 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
322 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
323 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
326 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
329 case PIPE_SHADER_CAP_MAX_INPUTS
:
331 case PIPE_SHADER_VERTEX
:
332 return V3D_MAX_VS_INPUTS
/ 4;
333 case PIPE_SHADER_GEOMETRY
:
334 return V3D_MAX_GS_INPUTS
/ 4;
335 case PIPE_SHADER_FRAGMENT
:
336 return V3D_MAX_FS_INPUTS
/ 4;
340 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
341 if (shader
== PIPE_SHADER_FRAGMENT
)
344 return V3D_MAX_FS_INPUTS
/ 4;
345 case PIPE_SHADER_CAP_MAX_TEMPS
:
346 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
347 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
348 /* Note: Limited by the offset size in
349 * v3d_unit_data_create().
351 return 16 * 1024 * sizeof(float);
352 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
354 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
356 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
358 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
360 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
362 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
364 case PIPE_SHADER_CAP_SUBROUTINES
:
366 case PIPE_SHADER_CAP_INTEGERS
:
368 case PIPE_SHADER_CAP_FP16
:
369 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
370 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
371 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
372 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
373 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
374 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
375 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
376 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
378 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
379 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
380 return V3D_MAX_TEXTURE_SAMPLERS
;
382 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
383 if (screen
->has_cache_flush
) {
384 if (shader
== PIPE_SHADER_VERTEX
||
385 shader
== PIPE_SHADER_GEOMETRY
) {
388 return PIPE_MAX_SHADER_BUFFERS
;
393 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
394 if (screen
->has_cache_flush
) {
395 if (screen
->devinfo
.ver
< 41)
398 return PIPE_MAX_SHADER_IMAGES
;
403 case PIPE_SHADER_CAP_PREFERRED_IR
:
404 return PIPE_SHADER_IR_NIR
;
405 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
406 return 1 << PIPE_SHADER_IR_NIR
;
407 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
409 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
410 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
413 fprintf(stderr
, "unknown shader param %d\n", param
);
420 v3d_get_compute_param(struct pipe_screen
*pscreen
, enum pipe_shader_ir ir_type
,
421 enum pipe_compute_cap param
, void *ret
)
423 struct v3d_screen
*screen
= v3d_screen(pscreen
);
425 if (!screen
->has_csd
)
428 #define RET(x) do { \
430 memcpy(ret, x, sizeof(x)); \
435 case PIPE_COMPUTE_CAP_ADDRESS_BITS
:
436 RET((uint32_t []) { 32 });
439 case PIPE_COMPUTE_CAP_IR_TARGET
:
443 case PIPE_COMPUTE_CAP_GRID_DIMENSION
:
444 RET((uint64_t []) { 3 });
446 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE
:
447 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
448 * 16-bit field for the number of workgroups in each
451 RET(((uint64_t []) { 65535, 65535, 65535 }));
453 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE
:
454 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
455 RET(((uint64_t []) { 256, 256, 256 }));
457 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK
:
458 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK
:
459 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
460 * limited by WG_SIZE in the CSD.
462 RET((uint64_t []) { 256 });
464 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE
:
465 RET((uint64_t []) { 1024 * 1024 * 1024 });
467 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE
:
468 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
469 RET((uint64_t []) { 32768 });
471 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE
:
472 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE
:
473 RET((uint64_t []) { 4096 });
475 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
: {
478 RET((uint64_t []) { si
.totalram
});
481 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
:
483 RET((uint32_t []) { 0 });
485 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS
:
486 RET((uint32_t []) { 1 });
488 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED
:
489 RET((uint32_t []) { 1 });
491 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE
:
492 RET((uint32_t []) { 16 });
500 v3d_screen_is_format_supported(struct pipe_screen
*pscreen
,
501 enum pipe_format format
,
502 enum pipe_texture_target target
,
503 unsigned sample_count
,
504 unsigned storage_sample_count
,
507 struct v3d_screen
*screen
= v3d_screen(pscreen
);
509 if (MAX2(1, sample_count
) != MAX2(1, storage_sample_count
))
512 if (sample_count
> 1 && sample_count
!= V3D_MAX_SAMPLES
)
515 if (target
>= PIPE_MAX_TEXTURE_TYPES
) {
519 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
521 case PIPE_FORMAT_R32G32B32A32_FLOAT
:
522 case PIPE_FORMAT_R32G32B32_FLOAT
:
523 case PIPE_FORMAT_R32G32_FLOAT
:
524 case PIPE_FORMAT_R32_FLOAT
:
525 case PIPE_FORMAT_R32G32B32A32_SNORM
:
526 case PIPE_FORMAT_R32G32B32_SNORM
:
527 case PIPE_FORMAT_R32G32_SNORM
:
528 case PIPE_FORMAT_R32_SNORM
:
529 case PIPE_FORMAT_R32G32B32A32_SSCALED
:
530 case PIPE_FORMAT_R32G32B32_SSCALED
:
531 case PIPE_FORMAT_R32G32_SSCALED
:
532 case PIPE_FORMAT_R32_SSCALED
:
533 case PIPE_FORMAT_R16G16B16A16_UNORM
:
534 case PIPE_FORMAT_R16G16B16_UNORM
:
535 case PIPE_FORMAT_R16G16_UNORM
:
536 case PIPE_FORMAT_R16_UNORM
:
537 case PIPE_FORMAT_R16G16B16A16_SNORM
:
538 case PIPE_FORMAT_R16G16B16_SNORM
:
539 case PIPE_FORMAT_R16G16_SNORM
:
540 case PIPE_FORMAT_R16_SNORM
:
541 case PIPE_FORMAT_R16G16B16A16_USCALED
:
542 case PIPE_FORMAT_R16G16B16_USCALED
:
543 case PIPE_FORMAT_R16G16_USCALED
:
544 case PIPE_FORMAT_R16_USCALED
:
545 case PIPE_FORMAT_R16G16B16A16_SSCALED
:
546 case PIPE_FORMAT_R16G16B16_SSCALED
:
547 case PIPE_FORMAT_R16G16_SSCALED
:
548 case PIPE_FORMAT_R16_SSCALED
:
549 case PIPE_FORMAT_R8G8B8A8_UNORM
:
550 case PIPE_FORMAT_R8G8B8_UNORM
:
551 case PIPE_FORMAT_R8G8_UNORM
:
552 case PIPE_FORMAT_R8_UNORM
:
553 case PIPE_FORMAT_R8G8B8A8_SNORM
:
554 case PIPE_FORMAT_R8G8B8_SNORM
:
555 case PIPE_FORMAT_R8G8_SNORM
:
556 case PIPE_FORMAT_R8_SNORM
:
557 case PIPE_FORMAT_R8G8B8A8_USCALED
:
558 case PIPE_FORMAT_R8G8B8_USCALED
:
559 case PIPE_FORMAT_R8G8_USCALED
:
560 case PIPE_FORMAT_R8_USCALED
:
561 case PIPE_FORMAT_R8G8B8A8_SSCALED
:
562 case PIPE_FORMAT_R8G8B8_SSCALED
:
563 case PIPE_FORMAT_R8G8_SSCALED
:
564 case PIPE_FORMAT_R8_SSCALED
:
565 case PIPE_FORMAT_R10G10B10A2_UNORM
:
566 case PIPE_FORMAT_B10G10R10A2_UNORM
:
567 case PIPE_FORMAT_R10G10B10A2_SNORM
:
568 case PIPE_FORMAT_B10G10R10A2_SNORM
:
569 case PIPE_FORMAT_R10G10B10A2_USCALED
:
570 case PIPE_FORMAT_B10G10R10A2_USCALED
:
571 case PIPE_FORMAT_R10G10B10A2_SSCALED
:
572 case PIPE_FORMAT_B10G10R10A2_SSCALED
:
579 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
580 * of FRAMEBUFFER_MAX_SAMPLES
582 if ((usage
& PIPE_BIND_RENDER_TARGET
) &&
583 format
!= PIPE_FORMAT_NONE
&&
584 !v3d_rt_format_supported(&screen
->devinfo
, format
)) {
588 if ((usage
& PIPE_BIND_SAMPLER_VIEW
) &&
589 !v3d_tex_format_supported(&screen
->devinfo
, format
)) {
593 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
594 !(format
== PIPE_FORMAT_S8_UINT_Z24_UNORM
||
595 format
== PIPE_FORMAT_X8Z24_UNORM
||
596 format
== PIPE_FORMAT_Z16_UNORM
||
597 format
== PIPE_FORMAT_Z32_FLOAT
||
598 format
== PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
)) {
602 if ((usage
& PIPE_BIND_INDEX_BUFFER
) &&
603 !(format
== PIPE_FORMAT_I8_UINT
||
604 format
== PIPE_FORMAT_I16_UINT
||
605 format
== PIPE_FORMAT_I32_UINT
)) {
612 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
614 static unsigned handle_hash(void *key
)
616 return PTR_TO_UINT(key
);
619 static int handle_compare(void *key1
, void *key2
)
621 return PTR_TO_UINT(key1
) != PTR_TO_UINT(key2
);
625 v3d_screen_get_compiler_options(struct pipe_screen
*pscreen
,
626 enum pipe_shader_ir ir
, unsigned shader
)
628 return &v3d_nir_options
;
632 v3d_screen_query_dmabuf_modifiers(struct pipe_screen
*pscreen
,
633 enum pipe_format format
, int max
,
635 unsigned int *external_only
,
639 uint64_t available_modifiers
[] = {
640 DRM_FORMAT_MOD_BROADCOM_UIF
,
641 DRM_FORMAT_MOD_LINEAR
,
643 int num_modifiers
= ARRAY_SIZE(available_modifiers
);
646 *count
= num_modifiers
;
650 *count
= MIN2(max
, num_modifiers
);
651 for (i
= 0; i
< *count
; i
++) {
652 modifiers
[i
] = available_modifiers
[i
];
654 external_only
[i
] = false;
659 v3d_screen_create(int fd
, const struct pipe_screen_config
*config
,
660 struct renderonly
*ro
)
662 struct v3d_screen
*screen
= rzalloc(NULL
, struct v3d_screen
);
663 struct pipe_screen
*pscreen
;
665 pscreen
= &screen
->base
;
667 pscreen
->destroy
= v3d_screen_destroy
;
668 pscreen
->get_param
= v3d_screen_get_param
;
669 pscreen
->get_paramf
= v3d_screen_get_paramf
;
670 pscreen
->get_shader_param
= v3d_screen_get_shader_param
;
671 pscreen
->get_compute_param
= v3d_get_compute_param
;
672 pscreen
->context_create
= v3d_context_create
;
673 pscreen
->is_format_supported
= v3d_screen_is_format_supported
;
677 screen
->ro
= renderonly_dup(ro
);
679 fprintf(stderr
, "Failed to dup renderonly object\n");
684 list_inithead(&screen
->bo_cache
.time_list
);
685 (void)mtx_init(&screen
->bo_handles_mutex
, mtx_plain
);
686 screen
->bo_handles
= util_hash_table_create(handle_hash
, handle_compare
);
688 #if defined(USE_V3D_SIMULATOR)
689 v3d_simulator_init(screen
);
692 if (!v3d_get_device_info(screen
->fd
, &screen
->devinfo
, &v3d_ioctl
))
695 /* We have to driCheckOption for the simulator mode to not assertion
696 * fail on not having our XML config.
698 const char *nonmsaa_name
= "v3d_nonmsaa_texture_size_limit";
699 screen
->nonmsaa_texture_size_limit
=
700 driCheckOption(config
->options
, nonmsaa_name
, DRI_BOOL
) &&
701 driQueryOptionb(config
->options
, nonmsaa_name
);
703 slab_create_parent(&screen
->transfer_pool
, sizeof(struct v3d_transfer
), 16);
705 screen
->has_csd
= v3d_has_feature(screen
, DRM_V3D_PARAM_SUPPORTS_CSD
);
706 screen
->has_cache_flush
=
707 v3d_has_feature(screen
, DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH
);
709 v3d_fence_init(screen
);
711 v3d_process_debug_variable();
713 v3d_resource_screen_init(pscreen
);
715 screen
->compiler
= v3d_compiler_init(&screen
->devinfo
);
717 pscreen
->get_name
= v3d_screen_get_name
;
718 pscreen
->get_vendor
= v3d_screen_get_vendor
;
719 pscreen
->get_device_vendor
= v3d_screen_get_vendor
;
720 pscreen
->get_compiler_options
= v3d_screen_get_compiler_options
;
721 pscreen
->query_dmabuf_modifiers
= v3d_screen_query_dmabuf_modifiers
;
727 ralloc_free(pscreen
);