src/gallium/drivers/v3d/v3d_screen.c

   1 /*
   2  * Copyright © 2014-2017 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_debug.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_format.h"
  33 #include "util/u_hash_table.h"
  34 #include "util/u_screen.h"
  35 #include "util/ralloc.h"
  36
  37 #include <xf86drm.h>
  38 #include "v3d_screen.h"
  39 #include "v3d_context.h"
  40 #include "v3d_resource.h"
  41 #include "compiler/v3d_compiler.h"
  42
  43 static const char *
  44 v3d_screen_get_name(struct pipe_screen *pscreen)
  45 {
  46         struct v3d_screen *screen = v3d_screen(pscreen);
  47
  48         if (!screen->name) {
  49                 screen->name = ralloc_asprintf(screen,
  50                                                "V3D %d.%d",
  51                                                screen->devinfo.ver / 10,
  52                                                screen->devinfo.ver % 10);
  53         }
  54
  55         return screen->name;
  56 }
  57
  58 static const char *
  59 v3d_screen_get_vendor(struct pipe_screen *pscreen)
  60 {
  61         return "Broadcom";
  62 }
  63
  64 static void
  65 v3d_screen_destroy(struct pipe_screen *pscreen)
  66 {
  67         struct v3d_screen *screen = v3d_screen(pscreen);
  68
  69         util_hash_table_destroy(screen->bo_handles);
  70         v3d_bufmgr_destroy(pscreen);
  71         slab_destroy_parent(&screen->transfer_pool);
  72
  73         if (using_v3d_simulator)
  74                 v3d_simulator_destroy(screen);
  75
  76         v3d_compiler_free(screen->compiler);
  77
  78         close(screen->fd);
  79         ralloc_free(pscreen);
  80 }
  81
  82 static int
  83 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  84 {
  85         struct v3d_screen *screen = v3d_screen(pscreen);
  86
  87         switch (param) {
  88                 /* Supported features (boolean caps). */
  89         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
  90         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
  91         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
  92         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
  93         case PIPE_CAP_NPOT_TEXTURES:
  94         case PIPE_CAP_SHAREABLE_SHADERS:
  95         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  96         case PIPE_CAP_TEXTURE_MULTISAMPLE:
  97         case PIPE_CAP_TEXTURE_SWIZZLE:
  98         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
  99         case PIPE_CAP_START_INSTANCE:
 100         case PIPE_CAP_TGSI_INSTANCEID:
 101         case PIPE_CAP_SM3:
 102         case PIPE_CAP_TEXTURE_QUERY_LOD:
 103         case PIPE_CAP_PRIMITIVE_RESTART:
 104         case PIPE_CAP_OCCLUSION_QUERY:
 105         case PIPE_CAP_POINT_SPRITE:
 106         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 107         case PIPE_CAP_COMPUTE:
 108         case PIPE_CAP_DRAW_INDIRECT:
 109         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 110         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 111         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 112                 return 1;
 113
 114         case PIPE_CAP_INDEP_BLEND_ENABLE:
 115                 return screen->devinfo.ver >= 40;
 116
 117         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 118                 return 256;
 119
 120         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 121                 return 4;
 122
 123         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 124                 return 400;
 125
 126         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 127                 return 140;
 128
 129         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 130                 return 1;
 131         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 132                 return 0;
 133         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 134                 if (screen->devinfo.ver >= 40)
 135                         return 0;
 136                 else
 137                         return 1;
 138         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 139                 if (screen->devinfo.ver >= 40)
 140                         return 1;
 141                 else
 142                         return 0;
 143
 144         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 145         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 146         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 147                 return 1;
 148
 149         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 150                 return 4;
 151
 152                 /* Texturing. */
 153         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 154         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 155         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 156                 return VC5_MAX_MIP_LEVELS;
 157         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 158                 return 2048;
 159
 160                 /* Render targets. */
 161         case PIPE_CAP_MAX_RENDER_TARGETS:
 162                 return 4;
 163
 164         case PIPE_CAP_VENDOR_ID:
 165                 return 0x14E4;
 166         case PIPE_CAP_ACCELERATED:
 167                 return 1;
 168         case PIPE_CAP_VIDEO_MEMORY: {
 169                 uint64_t system_memory;
 170
 171                 if (!os_get_total_physical_memory(&system_memory))
 172                         return 0;
 173
 174                 return (int)(system_memory >> 20);
 175         }
 176         case PIPE_CAP_UMA:
 177                 return 1;
 178
 179         default:
 180                 return u_pipe_screen_get_param_defaults(pscreen, param);
 181         }
 182 }
 183
 184 static float
 185 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 186 {
 187         switch (param) {
 188         case PIPE_CAPF_MAX_LINE_WIDTH:
 189         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 190                 return 32;
 191
 192         case PIPE_CAPF_MAX_POINT_WIDTH:
 193         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 194                 return 512.0f;
 195
 196         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 197                 return 0.0f;
 198         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 199                 return 16.0f;
 200
 201         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 202         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 203         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 204                 return 0.0f;
 205         default:
 206                 fprintf(stderr, "unknown paramf %d\n", param);
 207                 return 0;
 208         }
 209 }
 210
 211 static int
 212 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 213                            enum pipe_shader_cap param)
 214 {
 215         if (shader != PIPE_SHADER_VERTEX &&
 216             shader != PIPE_SHADER_FRAGMENT) {
 217                 return 0;
 218         }
 219
 220         /* this is probably not totally correct.. but it's a start: */
 221         switch (param) {
 222         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 223         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 224         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 225         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 226                 return 16384;
 227
 228         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 229                 return UINT_MAX;
 230
 231         case PIPE_SHADER_CAP_MAX_INPUTS:
 232                 if (shader == PIPE_SHADER_FRAGMENT)
 233                         return VC5_MAX_FS_INPUTS / 4;
 234                 else
 235                         return VC5_MAX_ATTRIBUTES;
 236         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 237                 if (shader == PIPE_SHADER_FRAGMENT)
 238                         return 4;
 239                 else
 240                         return VC5_MAX_FS_INPUTS / 4;
 241         case PIPE_SHADER_CAP_MAX_TEMPS:
 242                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 243         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 244                 return 16 * 1024 * sizeof(float);
 245         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 246                 return 16;
 247         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 248                 return 0;
 249         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 250         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 251         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 252                 return 0;
 253         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 254                 return 1;
 255         case PIPE_SHADER_CAP_SUBROUTINES:
 256                 return 0;
 257         case PIPE_SHADER_CAP_INTEGERS:
 258                 return 1;
 259         case PIPE_SHADER_CAP_FP16:
 260         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 261         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 262         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 263         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 264         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 265         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 266         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 267         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 268                 return 0;
 269         case PIPE_SHADER_CAP_SCALAR_ISA:
 270                 return 1;
 271         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 272         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 273         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 274         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 275                 return VC5_MAX_TEXTURE_SAMPLERS;
 276         case PIPE_SHADER_CAP_PREFERRED_IR:
 277                 return PIPE_SHADER_IR_NIR;
 278         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 279                 return 0;
 280         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 281                 return 32;
 282         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 283         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 284                 return 0;
 285         default:
 286                 fprintf(stderr, "unknown shader param %d\n", param);
 287                 return 0;
 288         }
 289         return 0;
 290 }
 291
 292 static boolean
 293 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
 294                                enum pipe_format format,
 295                                enum pipe_texture_target target,
 296                                unsigned sample_count,
 297                                unsigned storage_sample_count,
 298                                unsigned usage)
 299 {
 300         struct v3d_screen *screen = v3d_screen(pscreen);
 301
 302         if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 303                 return false;
 304
 305         if (sample_count > 1 && sample_count != VC5_MAX_SAMPLES)
 306                 return FALSE;
 307
 308         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 309                 return FALSE;
 310         }
 311
 312         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 313                 switch (format) {
 314                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 315                 case PIPE_FORMAT_R32G32B32_FLOAT:
 316                 case PIPE_FORMAT_R32G32_FLOAT:
 317                 case PIPE_FORMAT_R32_FLOAT:
 318                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 319                 case PIPE_FORMAT_R32G32B32_SNORM:
 320                 case PIPE_FORMAT_R32G32_SNORM:
 321                 case PIPE_FORMAT_R32_SNORM:
 322                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 323                 case PIPE_FORMAT_R32G32B32_SSCALED:
 324                 case PIPE_FORMAT_R32G32_SSCALED:
 325                 case PIPE_FORMAT_R32_SSCALED:
 326                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 327                 case PIPE_FORMAT_R16G16B16_UNORM:
 328                 case PIPE_FORMAT_R16G16_UNORM:
 329                 case PIPE_FORMAT_R16_UNORM:
 330                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 331                 case PIPE_FORMAT_R16G16B16_SNORM:
 332                 case PIPE_FORMAT_R16G16_SNORM:
 333                 case PIPE_FORMAT_R16_SNORM:
 334                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 335                 case PIPE_FORMAT_R16G16B16_USCALED:
 336                 case PIPE_FORMAT_R16G16_USCALED:
 337                 case PIPE_FORMAT_R16_USCALED:
 338                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 339                 case PIPE_FORMAT_R16G16B16_SSCALED:
 340                 case PIPE_FORMAT_R16G16_SSCALED:
 341                 case PIPE_FORMAT_R16_SSCALED:
 342                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 343                 case PIPE_FORMAT_R8G8B8_UNORM:
 344                 case PIPE_FORMAT_R8G8_UNORM:
 345                 case PIPE_FORMAT_R8_UNORM:
 346                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 347                 case PIPE_FORMAT_R8G8B8_SNORM:
 348                 case PIPE_FORMAT_R8G8_SNORM:
 349                 case PIPE_FORMAT_R8_SNORM:
 350                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 351                 case PIPE_FORMAT_R8G8B8_USCALED:
 352                 case PIPE_FORMAT_R8G8_USCALED:
 353                 case PIPE_FORMAT_R8_USCALED:
 354                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 355                 case PIPE_FORMAT_R8G8B8_SSCALED:
 356                 case PIPE_FORMAT_R8G8_SSCALED:
 357                 case PIPE_FORMAT_R8_SSCALED:
 358                 case PIPE_FORMAT_R10G10B10A2_UNORM:
 359                 case PIPE_FORMAT_B10G10R10A2_UNORM:
 360                 case PIPE_FORMAT_R10G10B10A2_SNORM:
 361                 case PIPE_FORMAT_B10G10R10A2_SNORM:
 362                 case PIPE_FORMAT_R10G10B10A2_USCALED:
 363                 case PIPE_FORMAT_B10G10R10A2_USCALED:
 364                 case PIPE_FORMAT_R10G10B10A2_SSCALED:
 365                 case PIPE_FORMAT_B10G10R10A2_SSCALED:
 366                         break;
 367                 default:
 368                         return FALSE;
 369                 }
 370         }
 371
 372         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 373             !v3d_rt_format_supported(&screen->devinfo, format)) {
 374                 return FALSE;
 375         }
 376
 377         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 378             !v3d_tex_format_supported(&screen->devinfo, format)) {
 379                 return FALSE;
 380         }
 381
 382         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 383             !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
 384               format == PIPE_FORMAT_X8Z24_UNORM ||
 385               format == PIPE_FORMAT_Z16_UNORM ||
 386               format == PIPE_FORMAT_Z32_FLOAT ||
 387               format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
 388                 return FALSE;
 389         }
 390
 391         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 392             !(format == PIPE_FORMAT_I8_UINT ||
 393               format == PIPE_FORMAT_I16_UINT ||
 394               format == PIPE_FORMAT_I32_UINT)) {
 395                 return FALSE;
 396         }
 397
 398         return TRUE;
 399 }
 400
 401 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 402
 403 static unsigned handle_hash(void *key)
 404 {
 405     return PTR_TO_UINT(key);
 406 }
 407
 408 static int handle_compare(void *key1, void *key2)
 409 {
 410     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 411 }
 412
 413 static bool
 414 v3d_get_device_info(struct v3d_screen *screen)
 415 {
 416         struct drm_v3d_get_param ident0 = {
 417                 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT0,
 418         };
 419         struct drm_v3d_get_param ident1 = {
 420                 .param = DRM_V3D_PARAM_V3D_CORE0_IDENT1,
 421         };
 422         int ret;
 423
 424         ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident0);
 425         if (ret != 0) {
 426                 fprintf(stderr, "Couldn't get V3D core IDENT0: %s\n",
 427                         strerror(errno));
 428                 return false;
 429         }
 430         ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &ident1);
 431         if (ret != 0) {
 432                 fprintf(stderr, "Couldn't get V3D core IDENT1: %s\n",
 433                         strerror(errno));
 434                 return false;
 435         }
 436
 437         uint32_t major = (ident0.value >> 24) & 0xff;
 438         uint32_t minor = (ident1.value >> 0) & 0xf;
 439         screen->devinfo.ver = major * 10 + minor;
 440
 441         screen->devinfo.vpm_size = (ident1.value >> 28 & 0xf) * 1024;
 442
 443         switch (screen->devinfo.ver) {
 444         case 33:
 445         case 41:
 446         case 42:
 447                 break;
 448         default:
 449                 fprintf(stderr,
 450                         "V3D %d.%d not supported by this version of Mesa.\n",
 451                         screen->devinfo.ver / 10,
 452                         screen->devinfo.ver % 10);
 453                 return false;
 454         }
 455
 456         return true;
 457 }
 458
 459 static const void *
 460 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
 461                                 enum pipe_shader_ir ir, unsigned shader)
 462 {
 463         return &v3d_nir_options;
 464 }
 465
 466 struct pipe_screen *
 467 v3d_screen_create(int fd)
 468 {
 469         struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
 470         struct pipe_screen *pscreen;
 471
 472         pscreen = &screen->base;
 473
 474         pscreen->destroy = v3d_screen_destroy;
 475         pscreen->get_param = v3d_screen_get_param;
 476         pscreen->get_paramf = v3d_screen_get_paramf;
 477         pscreen->get_shader_param = v3d_screen_get_shader_param;
 478         pscreen->context_create = v3d_context_create;
 479         pscreen->is_format_supported = v3d_screen_is_format_supported;
 480
 481         screen->fd = fd;
 482         list_inithead(&screen->bo_cache.time_list);
 483         (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
 484         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 485
 486 #if defined(USE_V3D_SIMULATOR)
 487         v3d_simulator_init(screen);
 488 #endif
 489
 490         if (!v3d_get_device_info(screen))
 491                 goto fail;
 492
 493         slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
 494
 495         v3d_fence_init(screen);
 496
 497         v3d_process_debug_variable();
 498
 499         v3d_resource_screen_init(pscreen);
 500
 501         screen->compiler = v3d_compiler_init(&screen->devinfo);
 502
 503         pscreen->get_name = v3d_screen_get_name;
 504         pscreen->get_vendor = v3d_screen_get_vendor;
 505         pscreen->get_device_vendor = v3d_screen_get_vendor;
 506         pscreen->get_compiler_options = v3d_screen_get_compiler_options;
 507
 508         return pscreen;
 509
 510 fail:
 511         close(fd);
 512         ralloc_free(pscreen);
 513         return NULL;
 514 }