v3d: Add Compute Shader support
[mesa.git] / src / gallium / drivers / v3d / v3d_screen.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "common/v3d_device_info.h"
28 #include "util/os_misc.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_screen.h"
31 #include "pipe/p_state.h"
32
33 #include "util/u_debug.h"
34 #include "util/u_memory.h"
35 #include "util/u_format.h"
36 #include "util/u_hash_table.h"
37 #include "util/u_screen.h"
38 #include "util/u_transfer_helper.h"
39 #include "util/ralloc.h"
40 #include "util/xmlconfig.h"
41
42 #include <xf86drm.h>
43 #include "v3d_screen.h"
44 #include "v3d_context.h"
45 #include "v3d_resource.h"
46 #include "compiler/v3d_compiler.h"
47 #include "drm-uapi/drm_fourcc.h"
48
49 static const char *
50 v3d_screen_get_name(struct pipe_screen *pscreen)
51 {
52 struct v3d_screen *screen = v3d_screen(pscreen);
53
54 if (!screen->name) {
55 screen->name = ralloc_asprintf(screen,
56 "V3D %d.%d",
57 screen->devinfo.ver / 10,
58 screen->devinfo.ver % 10);
59 }
60
61 return screen->name;
62 }
63
64 static const char *
65 v3d_screen_get_vendor(struct pipe_screen *pscreen)
66 {
67 return "Broadcom";
68 }
69
70 static void
71 v3d_screen_destroy(struct pipe_screen *pscreen)
72 {
73 struct v3d_screen *screen = v3d_screen(pscreen);
74
75 util_hash_table_destroy(screen->bo_handles);
76 v3d_bufmgr_destroy(pscreen);
77 slab_destroy_parent(&screen->transfer_pool);
78 free(screen->ro);
79
80 if (using_v3d_simulator)
81 v3d_simulator_destroy(screen);
82
83 v3d_compiler_free(screen->compiler);
84 u_transfer_helper_destroy(pscreen->transfer_helper);
85
86 close(screen->fd);
87 ralloc_free(pscreen);
88 }
89
90 static bool
91 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
92 {
93 struct drm_v3d_get_param p = {
94 .param = feature,
95 };
96 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
97
98 if (ret != 0)
99 return false;
100
101 return p.value;
102 }
103
104 static int
105 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
106 {
107 struct v3d_screen *screen = v3d_screen(pscreen);
108
109 switch (param) {
110 /* Supported features (boolean caps). */
111 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
112 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
113 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_NPOT_TEXTURES:
116 case PIPE_CAP_SHAREABLE_SHADERS:
117 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
118 case PIPE_CAP_TEXTURE_MULTISAMPLE:
119 case PIPE_CAP_TEXTURE_SWIZZLE:
120 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
121 case PIPE_CAP_START_INSTANCE:
122 case PIPE_CAP_TGSI_INSTANCEID:
123 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
124 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
125 case PIPE_CAP_VERTEX_SHADER_SATURATE:
126 case PIPE_CAP_TEXTURE_QUERY_LOD:
127 case PIPE_CAP_PRIMITIVE_RESTART:
128 case PIPE_CAP_OCCLUSION_QUERY:
129 case PIPE_CAP_POINT_SPRITE:
130 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
131 case PIPE_CAP_DRAW_INDIRECT:
132 case PIPE_CAP_MULTI_DRAW_INDIRECT:
133 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
134 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
135 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
136 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
137 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
138 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
139 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
140 return 1;
141
142 case PIPE_CAP_PACKED_UNIFORMS:
143 /* We can't enable this flag, because it results in load_ubo
144 * intrinsics across a 16b boundary, but v3d's TMU general
145 * memory accesses wrap on 16b boundaries.
146 */
147 return 0;
148
149 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
150 /* XXX perf: we don't want to emit these extra blits for
151 * glReadPixels(), since we still have to do an uncached read
152 * from the GPU of the result after waiting for the TFU blit
153 * to happen. However, disabling this introduces instability
154 * in
155 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
156 * and corruption in chromium's rendering.
157 */
158 return 1;
159
160 case PIPE_CAP_COMPUTE:
161 return screen->has_csd && screen->devinfo.ver >= 41;
162
163 case PIPE_CAP_GENERATE_MIPMAP:
164 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
165
166 case PIPE_CAP_INDEP_BLEND_ENABLE:
167 return screen->devinfo.ver >= 40;
168
169 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
170 return 256;
171
172 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
173 if (screen->devinfo.ver < 40)
174 return 0;
175 return 4;
176
177 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
178 return 4;
179
180 case PIPE_CAP_GLSL_FEATURE_LEVEL:
181 return 330;
182
183 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
184 return 140;
185
186 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
187 return 1;
188 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
189 return 0;
190 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
191 if (screen->devinfo.ver >= 40)
192 return 0;
193 else
194 return 1;
195 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
196 if (screen->devinfo.ver >= 40)
197 return 1;
198 else
199 return 0;
200
201 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
202 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
203 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
204 return 1;
205
206 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
207 return 4;
208
209 case PIPE_CAP_MAX_VARYINGS:
210 return V3D_MAX_FS_INPUTS / 4;
211
212 /* Texturing. */
213 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
214 if (screen->devinfo.ver < 40)
215 return 2048;
216 else if (screen->nonmsaa_texture_size_limit)
217 return 7680;
218 else
219 return 4096;
220 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
221 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
222 if (screen->devinfo.ver < 40)
223 return 12;
224 else
225 return V3D_MAX_MIP_LEVELS;
226 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
227 return 2048;
228
229 /* Render targets. */
230 case PIPE_CAP_MAX_RENDER_TARGETS:
231 return 4;
232
233 case PIPE_CAP_VENDOR_ID:
234 return 0x14E4;
235 case PIPE_CAP_ACCELERATED:
236 return 1;
237 case PIPE_CAP_VIDEO_MEMORY: {
238 uint64_t system_memory;
239
240 if (!os_get_total_physical_memory(&system_memory))
241 return 0;
242
243 return (int)(system_memory >> 20);
244 }
245 case PIPE_CAP_UMA:
246 return 1;
247
248 case PIPE_CAP_ALPHA_TEST:
249 return 0;
250
251 default:
252 return u_pipe_screen_get_param_defaults(pscreen, param);
253 }
254 }
255
256 static float
257 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
258 {
259 switch (param) {
260 case PIPE_CAPF_MAX_LINE_WIDTH:
261 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
262 return 32;
263
264 case PIPE_CAPF_MAX_POINT_WIDTH:
265 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
266 return 512.0f;
267
268 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
269 return 0.0f;
270 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
271 return 16.0f;
272
273 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
274 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
275 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
276 return 0.0f;
277 default:
278 fprintf(stderr, "unknown paramf %d\n", param);
279 return 0;
280 }
281 }
282
283 static int
284 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
285 enum pipe_shader_cap param)
286 {
287 struct v3d_screen *screen = v3d_screen(pscreen);
288
289 switch (shader) {
290 case PIPE_SHADER_VERTEX:
291 case PIPE_SHADER_FRAGMENT:
292 break;
293 case PIPE_SHADER_COMPUTE:
294 if (!screen->has_csd)
295 return 0;
296 break;
297 default:
298 return 0;
299 }
300
301 /* this is probably not totally correct.. but it's a start: */
302 switch (param) {
303 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
304 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
305 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
306 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
307 return 16384;
308
309 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
310 return UINT_MAX;
311
312 case PIPE_SHADER_CAP_MAX_INPUTS:
313 if (shader == PIPE_SHADER_FRAGMENT)
314 return V3D_MAX_FS_INPUTS / 4;
315 else
316 return V3D_MAX_VS_INPUTS / 4;
317 case PIPE_SHADER_CAP_MAX_OUTPUTS:
318 if (shader == PIPE_SHADER_FRAGMENT)
319 return 4;
320 else
321 return V3D_MAX_FS_INPUTS / 4;
322 case PIPE_SHADER_CAP_MAX_TEMPS:
323 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
324 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
325 /* Note: Limited by the offset size in
326 * v3d_unit_data_create().
327 */
328 return 16 * 1024 * sizeof(float);
329 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
330 return 16;
331 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
332 return 0;
333 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
334 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
335 return 0;
336 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
337 return 1;
338 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
339 return 1;
340 case PIPE_SHADER_CAP_SUBROUTINES:
341 return 0;
342 case PIPE_SHADER_CAP_INTEGERS:
343 return 1;
344 case PIPE_SHADER_CAP_FP16:
345 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
346 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
347 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
348 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
349 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
350 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
351 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
352 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
353 return 0;
354 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
355 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
356 return V3D_MAX_TEXTURE_SAMPLERS;
357
358 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
359 if (shader == PIPE_SHADER_VERTEX)
360 return 0;
361
362 return PIPE_MAX_SHADER_BUFFERS;
363
364 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
365 if (screen->devinfo.ver < 41)
366 return 0;
367 else
368 return PIPE_MAX_SHADER_IMAGES;
369
370 case PIPE_SHADER_CAP_PREFERRED_IR:
371 return PIPE_SHADER_IR_NIR;
372 case PIPE_SHADER_CAP_SUPPORTED_IRS:
373 return 1 << PIPE_SHADER_IR_NIR;
374 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
375 return 32;
376 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
377 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
378 return 0;
379 default:
380 fprintf(stderr, "unknown shader param %d\n", param);
381 return 0;
382 }
383 return 0;
384 }
385
386 static int
387 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
388 enum pipe_compute_cap param, void *ret)
389 {
390 struct v3d_screen *screen = v3d_screen(pscreen);
391
392 if (!screen->has_csd)
393 return 0;
394
395 #define RET(x) do { \
396 if (ret) \
397 memcpy(ret, x, sizeof(x)); \
398 return sizeof(x); \
399 } while (0)
400
401 switch (param) {
402 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
403 RET((uint32_t []) { 32 });
404 break;
405
406 case PIPE_COMPUTE_CAP_IR_TARGET:
407 sprintf(ret, "v3d");
408 return strlen(ret);
409
410 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
411 RET((uint64_t []) { 3 });
412
413 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
414 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
415 * 16-bit field for the number of workgroups in each
416 * dimension.
417 */
418 RET(((uint64_t []) { 65535, 65535, 65535 }));
419
420 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
421 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
422 RET(((uint64_t []) { 256, 256, 256 }));
423
424 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
425 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
426 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
427 * limited by WG_SIZE in the CSD.
428 */
429 RET((uint64_t []) { 256 });
430
431 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
432 RET((uint64_t []) { 1024 * 1024 * 1024 });
433
434 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
435 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
436 RET((uint64_t []) { 32768 });
437
438 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
439 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
440 RET((uint64_t []) { 4096 });
441
442 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
443 struct sysinfo si;
444 sysinfo(&si);
445 RET((uint64_t []) { si.totalram });
446 }
447
448 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
449 /* OpenCL only */
450 RET((uint32_t []) { 0 });
451
452 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
453 RET((uint32_t []) { 1 });
454
455 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
456 RET((uint32_t []) { 1 });
457
458 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
459 RET((uint32_t []) { 16 });
460
461 }
462
463 return 0;
464 }
465
466 static bool
467 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
468 enum pipe_format format,
469 enum pipe_texture_target target,
470 unsigned sample_count,
471 unsigned storage_sample_count,
472 unsigned usage)
473 {
474 struct v3d_screen *screen = v3d_screen(pscreen);
475
476 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
477 return false;
478
479 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
480 return false;
481
482 if (target >= PIPE_MAX_TEXTURE_TYPES) {
483 return false;
484 }
485
486 if (usage & PIPE_BIND_VERTEX_BUFFER) {
487 switch (format) {
488 case PIPE_FORMAT_R32G32B32A32_FLOAT:
489 case PIPE_FORMAT_R32G32B32_FLOAT:
490 case PIPE_FORMAT_R32G32_FLOAT:
491 case PIPE_FORMAT_R32_FLOAT:
492 case PIPE_FORMAT_R32G32B32A32_SNORM:
493 case PIPE_FORMAT_R32G32B32_SNORM:
494 case PIPE_FORMAT_R32G32_SNORM:
495 case PIPE_FORMAT_R32_SNORM:
496 case PIPE_FORMAT_R32G32B32A32_SSCALED:
497 case PIPE_FORMAT_R32G32B32_SSCALED:
498 case PIPE_FORMAT_R32G32_SSCALED:
499 case PIPE_FORMAT_R32_SSCALED:
500 case PIPE_FORMAT_R16G16B16A16_UNORM:
501 case PIPE_FORMAT_R16G16B16_UNORM:
502 case PIPE_FORMAT_R16G16_UNORM:
503 case PIPE_FORMAT_R16_UNORM:
504 case PIPE_FORMAT_R16G16B16A16_SNORM:
505 case PIPE_FORMAT_R16G16B16_SNORM:
506 case PIPE_FORMAT_R16G16_SNORM:
507 case PIPE_FORMAT_R16_SNORM:
508 case PIPE_FORMAT_R16G16B16A16_USCALED:
509 case PIPE_FORMAT_R16G16B16_USCALED:
510 case PIPE_FORMAT_R16G16_USCALED:
511 case PIPE_FORMAT_R16_USCALED:
512 case PIPE_FORMAT_R16G16B16A16_SSCALED:
513 case PIPE_FORMAT_R16G16B16_SSCALED:
514 case PIPE_FORMAT_R16G16_SSCALED:
515 case PIPE_FORMAT_R16_SSCALED:
516 case PIPE_FORMAT_R8G8B8A8_UNORM:
517 case PIPE_FORMAT_R8G8B8_UNORM:
518 case PIPE_FORMAT_R8G8_UNORM:
519 case PIPE_FORMAT_R8_UNORM:
520 case PIPE_FORMAT_R8G8B8A8_SNORM:
521 case PIPE_FORMAT_R8G8B8_SNORM:
522 case PIPE_FORMAT_R8G8_SNORM:
523 case PIPE_FORMAT_R8_SNORM:
524 case PIPE_FORMAT_R8G8B8A8_USCALED:
525 case PIPE_FORMAT_R8G8B8_USCALED:
526 case PIPE_FORMAT_R8G8_USCALED:
527 case PIPE_FORMAT_R8_USCALED:
528 case PIPE_FORMAT_R8G8B8A8_SSCALED:
529 case PIPE_FORMAT_R8G8B8_SSCALED:
530 case PIPE_FORMAT_R8G8_SSCALED:
531 case PIPE_FORMAT_R8_SSCALED:
532 case PIPE_FORMAT_R10G10B10A2_UNORM:
533 case PIPE_FORMAT_B10G10R10A2_UNORM:
534 case PIPE_FORMAT_R10G10B10A2_SNORM:
535 case PIPE_FORMAT_B10G10R10A2_SNORM:
536 case PIPE_FORMAT_R10G10B10A2_USCALED:
537 case PIPE_FORMAT_B10G10R10A2_USCALED:
538 case PIPE_FORMAT_R10G10B10A2_SSCALED:
539 case PIPE_FORMAT_B10G10R10A2_SSCALED:
540 break;
541 default:
542 return false;
543 }
544 }
545
546 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
547 * of FRAMEBUFFER_MAX_SAMPLES
548 */
549 if ((usage & PIPE_BIND_RENDER_TARGET) &&
550 format != PIPE_FORMAT_NONE &&
551 !v3d_rt_format_supported(&screen->devinfo, format)) {
552 return false;
553 }
554
555 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
556 !v3d_tex_format_supported(&screen->devinfo, format)) {
557 return false;
558 }
559
560 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
561 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
562 format == PIPE_FORMAT_X8Z24_UNORM ||
563 format == PIPE_FORMAT_Z16_UNORM ||
564 format == PIPE_FORMAT_Z32_FLOAT ||
565 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
566 return false;
567 }
568
569 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
570 !(format == PIPE_FORMAT_I8_UINT ||
571 format == PIPE_FORMAT_I16_UINT ||
572 format == PIPE_FORMAT_I32_UINT)) {
573 return false;
574 }
575
576 return true;
577 }
578
579 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
580
581 static unsigned handle_hash(void *key)
582 {
583 return PTR_TO_UINT(key);
584 }
585
586 static int handle_compare(void *key1, void *key2)
587 {
588 return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
589 }
590
591 static const void *
592 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
593 enum pipe_shader_ir ir, unsigned shader)
594 {
595 return &v3d_nir_options;
596 }
597
598 static void
599 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
600 enum pipe_format format, int max,
601 uint64_t *modifiers,
602 unsigned int *external_only,
603 int *count)
604 {
605 int i;
606 uint64_t available_modifiers[] = {
607 DRM_FORMAT_MOD_BROADCOM_UIF,
608 DRM_FORMAT_MOD_LINEAR,
609 };
610 int num_modifiers = ARRAY_SIZE(available_modifiers);
611
612 if (!modifiers) {
613 *count = num_modifiers;
614 return;
615 }
616
617 *count = MIN2(max, num_modifiers);
618 for (i = 0; i < *count; i++) {
619 modifiers[i] = available_modifiers[i];
620 if (external_only)
621 external_only[i] = false;
622 }
623 }
624
625 struct pipe_screen *
626 v3d_screen_create(int fd, const struct pipe_screen_config *config,
627 struct renderonly *ro)
628 {
629 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
630 struct pipe_screen *pscreen;
631
632 pscreen = &screen->base;
633
634 pscreen->destroy = v3d_screen_destroy;
635 pscreen->get_param = v3d_screen_get_param;
636 pscreen->get_paramf = v3d_screen_get_paramf;
637 pscreen->get_shader_param = v3d_screen_get_shader_param;
638 pscreen->get_compute_param = v3d_get_compute_param;
639 pscreen->context_create = v3d_context_create;
640 pscreen->is_format_supported = v3d_screen_is_format_supported;
641
642 screen->fd = fd;
643 if (ro) {
644 screen->ro = renderonly_dup(ro);
645 if (!screen->ro) {
646 fprintf(stderr, "Failed to dup renderonly object\n");
647 ralloc_free(screen);
648 return NULL;
649 }
650 }
651 list_inithead(&screen->bo_cache.time_list);
652 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
653 screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
654
655 #if defined(USE_V3D_SIMULATOR)
656 v3d_simulator_init(screen);
657 #endif
658
659 if (!v3d_get_device_info(screen->fd, &screen->devinfo, &v3d_ioctl))
660 goto fail;
661
662 /* We have to driCheckOption for the simulator mode to not assertion
663 * fail on not having our XML config.
664 */
665 const char *nonmsaa_name = "v3d_nonmsaa_texture_size_limit";
666 screen->nonmsaa_texture_size_limit =
667 driCheckOption(config->options, nonmsaa_name, DRI_BOOL) &&
668 driQueryOptionb(config->options, nonmsaa_name);
669
670 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
671
672 screen->has_csd = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CSD);
673
674 v3d_fence_init(screen);
675
676 v3d_process_debug_variable();
677
678 v3d_resource_screen_init(pscreen);
679
680 screen->compiler = v3d_compiler_init(&screen->devinfo);
681
682 pscreen->get_name = v3d_screen_get_name;
683 pscreen->get_vendor = v3d_screen_get_vendor;
684 pscreen->get_device_vendor = v3d_screen_get_vendor;
685 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
686 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
687
688 return pscreen;
689
690 fail:
691 close(fd);
692 ralloc_free(pscreen);
693 return NULL;
694 }