v3d: Add a lowering pass for line smoothing
[mesa.git] / src / gallium / drivers / v3d / v3d_uniforms.c
1 /*
2 * Copyright © 2014-2017 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "util/u_pack_color.h"
25 #include "util/u_upload_mgr.h"
26 #include "util/format_srgb.h"
27
28 #include "v3d_context.h"
29 #include "compiler/v3d_compiler.h"
30 #include "broadcom/cle/v3d_packet_v33_pack.h"
31
32 static uint32_t
33 get_texrect_scale(struct v3d_texture_stateobj *texstate,
34 enum quniform_contents contents,
35 uint32_t data)
36 {
37 struct pipe_sampler_view *texture = texstate->textures[data];
38 uint32_t dim;
39
40 if (contents == QUNIFORM_TEXRECT_SCALE_X)
41 dim = texture->texture->width0;
42 else
43 dim = texture->texture->height0;
44
45 return fui(1.0f / dim);
46 }
47
48 static uint32_t
49 get_texture_size(struct v3d_texture_stateobj *texstate,
50 enum quniform_contents contents,
51 uint32_t data)
52 {
53 struct pipe_sampler_view *texture = texstate->textures[data];
54
55 switch (contents) {
56 case QUNIFORM_TEXTURE_WIDTH:
57 return u_minify(texture->texture->width0,
58 texture->u.tex.first_level);
59 case QUNIFORM_TEXTURE_HEIGHT:
60 return u_minify(texture->texture->height0,
61 texture->u.tex.first_level);
62 case QUNIFORM_TEXTURE_DEPTH:
63 return u_minify(texture->texture->depth0,
64 texture->u.tex.first_level);
65 case QUNIFORM_TEXTURE_ARRAY_SIZE:
66 return texture->texture->array_size;
67 case QUNIFORM_TEXTURE_LEVELS:
68 return (texture->u.tex.last_level -
69 texture->u.tex.first_level) + 1;
70 default:
71 unreachable("Bad texture size field");
72 }
73 }
74
75 static uint32_t
76 get_image_size(struct v3d_shaderimg_stateobj *shaderimg,
77 enum quniform_contents contents,
78 uint32_t data)
79 {
80 struct v3d_image_view *image = &shaderimg->si[data];
81
82 switch (contents) {
83 case QUNIFORM_IMAGE_WIDTH:
84 return u_minify(image->base.resource->width0,
85 image->base.u.tex.level);
86 case QUNIFORM_IMAGE_HEIGHT:
87 return u_minify(image->base.resource->height0,
88 image->base.u.tex.level);
89 case QUNIFORM_IMAGE_DEPTH:
90 return u_minify(image->base.resource->depth0,
91 image->base.u.tex.level);
92 case QUNIFORM_IMAGE_ARRAY_SIZE:
93 return image->base.resource->array_size;
94 default:
95 unreachable("Bad texture size field");
96 }
97 }
98
99 /**
100 * Writes the V3D 3.x P0 (CFG_MODE=1) texture parameter.
101 *
102 * Some bits of this field are dependent on the type of sample being done by
103 * the shader, while other bits are dependent on the sampler state. We OR the
104 * two together here.
105 */
106 static void
107 write_texture_p0(struct v3d_job *job,
108 struct v3d_cl_out **uniforms,
109 struct v3d_texture_stateobj *texstate,
110 uint32_t unit,
111 uint32_t shader_data)
112 {
113 struct pipe_sampler_state *psampler = texstate->samplers[unit];
114 struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
115
116 cl_aligned_u32(uniforms, shader_data | sampler->p0);
117 }
118
119 /** Writes the V3D 3.x P1 (CFG_MODE=1) texture parameter. */
120 static void
121 write_texture_p1(struct v3d_job *job,
122 struct v3d_cl_out **uniforms,
123 struct v3d_texture_stateobj *texstate,
124 uint32_t data)
125 {
126 /* Extract the texture unit from the top bits, and the compiler's
127 * packed p1 from the bottom.
128 */
129 uint32_t unit = data >> 5;
130 uint32_t p1 = data & 0x1f;
131
132 struct pipe_sampler_view *psview = texstate->textures[unit];
133 struct v3d_sampler_view *sview = v3d_sampler_view(psview);
134
135 struct V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1 unpacked = {
136 .texture_state_record_base_address = texstate->texture_state[unit],
137 };
138
139 uint32_t packed;
140 V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1_pack(&job->indirect,
141 (uint8_t *)&packed,
142 &unpacked);
143
144 cl_aligned_u32(uniforms, p1 | packed | sview->p1);
145 }
146
147 /** Writes the V3D 4.x TMU configuration parameter 0. */
148 static void
149 write_tmu_p0(struct v3d_job *job,
150 struct v3d_cl_out **uniforms,
151 struct v3d_texture_stateobj *texstate,
152 uint32_t data)
153 {
154 int unit = v3d_unit_data_get_unit(data);
155 struct pipe_sampler_view *psview = texstate->textures[unit];
156 struct v3d_sampler_view *sview = v3d_sampler_view(psview);
157 struct v3d_resource *rsc = v3d_resource(sview->texture);
158
159 cl_aligned_reloc(&job->indirect, uniforms, sview->bo,
160 v3d_unit_data_get_offset(data));
161 v3d_job_add_bo(job, rsc->bo);
162 }
163
164 static void
165 write_image_tmu_p0(struct v3d_job *job,
166 struct v3d_cl_out **uniforms,
167 struct v3d_shaderimg_stateobj *img,
168 uint32_t data)
169 {
170 /* Extract the image unit from the top bits, and the compiler's
171 * packed p0 from the bottom.
172 */
173 uint32_t unit = data >> 24;
174 uint32_t p0 = data & 0x00ffffff;
175
176 struct v3d_image_view *iview = &img->si[unit];
177 struct v3d_resource *rsc = v3d_resource(iview->base.resource);
178
179 cl_aligned_reloc(&job->indirect, uniforms,
180 v3d_resource(iview->tex_state)->bo,
181 iview->tex_state_offset | p0);
182 v3d_job_add_bo(job, rsc->bo);
183 }
184
185 /** Writes the V3D 4.x TMU configuration parameter 1. */
186 static void
187 write_tmu_p1(struct v3d_job *job,
188 struct v3d_cl_out **uniforms,
189 struct v3d_texture_stateobj *texstate,
190 uint32_t data)
191 {
192 uint32_t unit = v3d_unit_data_get_unit(data);
193 struct pipe_sampler_state *psampler = texstate->samplers[unit];
194 struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
195 struct pipe_sampler_view *psview = texstate->textures[unit];
196 struct v3d_sampler_view *sview = v3d_sampler_view(psview);
197 int variant = 0;
198
199 if (sampler->border_color_variants)
200 variant = sview->sampler_variant;
201
202 cl_aligned_reloc(&job->indirect, uniforms,
203 v3d_resource(sampler->sampler_state)->bo,
204 sampler->sampler_state_offset[variant] |
205 v3d_unit_data_get_offset(data));
206 }
207
208 struct v3d_cl_reloc
209 v3d_write_uniforms(struct v3d_context *v3d, struct v3d_job *job,
210 struct v3d_compiled_shader *shader,
211 enum pipe_shader_type stage)
212 {
213 struct v3d_constbuf_stateobj *cb = &v3d->constbuf[stage];
214 struct v3d_texture_stateobj *texstate = &v3d->tex[stage];
215 struct v3d_uniform_list *uinfo = &shader->prog_data.base->uniforms;
216 const uint32_t *gallium_uniforms = cb->cb[0].user_buffer;
217
218 /* The hardware always pre-fetches the next uniform (also when there
219 * aren't any), so we always allocate space for an extra slot. This
220 * fixes MMU exceptions reported since Linux kernel 5.4 when the
221 * uniforms fill up the tail bytes of a page in the indirect
222 * BO. In that scenario, when the hardware pre-fetches after reading
223 * the last uniform it will read beyond the end of the page and trigger
224 * the MMU exception.
225 */
226 v3d_cl_ensure_space(&job->indirect, (uinfo->count + 1) * 4, 4);
227
228 struct v3d_cl_reloc uniform_stream = cl_get_address(&job->indirect);
229 v3d_bo_reference(uniform_stream.bo);
230
231 struct v3d_cl_out *uniforms =
232 cl_start(&job->indirect);
233
234 for (int i = 0; i < uinfo->count; i++) {
235 uint32_t data = uinfo->data[i];
236
237 switch (uinfo->contents[i]) {
238 case QUNIFORM_CONSTANT:
239 cl_aligned_u32(&uniforms, data);
240 break;
241 case QUNIFORM_UNIFORM:
242 cl_aligned_u32(&uniforms, gallium_uniforms[data]);
243 break;
244 case QUNIFORM_VIEWPORT_X_SCALE:
245 cl_aligned_f(&uniforms, v3d->viewport.scale[0] * 256.0f);
246 break;
247 case QUNIFORM_VIEWPORT_Y_SCALE:
248 cl_aligned_f(&uniforms, v3d->viewport.scale[1] * 256.0f);
249 break;
250
251 case QUNIFORM_VIEWPORT_Z_OFFSET:
252 cl_aligned_f(&uniforms, v3d->viewport.translate[2]);
253 break;
254 case QUNIFORM_VIEWPORT_Z_SCALE:
255 cl_aligned_f(&uniforms, v3d->viewport.scale[2]);
256 break;
257
258 case QUNIFORM_USER_CLIP_PLANE:
259 cl_aligned_f(&uniforms,
260 v3d->clip.ucp[data / 4][data % 4]);
261 break;
262
263 case QUNIFORM_TMU_CONFIG_P0:
264 write_tmu_p0(job, &uniforms, texstate, data);
265 break;
266
267 case QUNIFORM_TMU_CONFIG_P1:
268 write_tmu_p1(job, &uniforms, texstate, data);
269 break;
270
271 case QUNIFORM_IMAGE_TMU_CONFIG_P0:
272 write_image_tmu_p0(job, &uniforms,
273 &v3d->shaderimg[stage], data);
274 break;
275
276 case QUNIFORM_TEXTURE_CONFIG_P1:
277 write_texture_p1(job, &uniforms, texstate,
278 data);
279 break;
280
281 case QUNIFORM_TEXRECT_SCALE_X:
282 case QUNIFORM_TEXRECT_SCALE_Y:
283 cl_aligned_u32(&uniforms,
284 get_texrect_scale(texstate,
285 uinfo->contents[i],
286 data));
287 break;
288
289 case QUNIFORM_TEXTURE_WIDTH:
290 case QUNIFORM_TEXTURE_HEIGHT:
291 case QUNIFORM_TEXTURE_DEPTH:
292 case QUNIFORM_TEXTURE_ARRAY_SIZE:
293 case QUNIFORM_TEXTURE_LEVELS:
294 cl_aligned_u32(&uniforms,
295 get_texture_size(texstate,
296 uinfo->contents[i],
297 data));
298 break;
299
300 case QUNIFORM_IMAGE_WIDTH:
301 case QUNIFORM_IMAGE_HEIGHT:
302 case QUNIFORM_IMAGE_DEPTH:
303 case QUNIFORM_IMAGE_ARRAY_SIZE:
304 cl_aligned_u32(&uniforms,
305 get_image_size(&v3d->shaderimg[stage],
306 uinfo->contents[i],
307 data));
308 break;
309
310 case QUNIFORM_ALPHA_REF:
311 cl_aligned_f(&uniforms,
312 v3d->zsa->base.alpha.ref_value);
313 break;
314
315 case QUNIFORM_LINE_WIDTH:
316 cl_aligned_f(&uniforms,
317 v3d->rasterizer->base.line_width);
318 break;
319
320 case QUNIFORM_AA_LINE_WIDTH:
321 cl_aligned_f(&uniforms, v3d_get_real_line_width(v3d));
322 break;
323
324 case QUNIFORM_UBO_ADDR: {
325 uint32_t unit = v3d_unit_data_get_unit(data);
326 /* Constant buffer 0 may be a system memory pointer,
327 * in which case we want to upload a shadow copy to
328 * the GPU.
329 */
330 if (!cb->cb[unit].buffer) {
331 u_upload_data(v3d->uploader, 0,
332 cb->cb[unit].buffer_size, 16,
333 cb->cb[unit].user_buffer,
334 &cb->cb[unit].buffer_offset,
335 &cb->cb[unit].buffer);
336 }
337
338 cl_aligned_reloc(&job->indirect, &uniforms,
339 v3d_resource(cb->cb[unit].buffer)->bo,
340 cb->cb[unit].buffer_offset +
341 v3d_unit_data_get_offset(data));
342 break;
343 }
344
345 case QUNIFORM_SSBO_OFFSET: {
346 struct pipe_shader_buffer *sb =
347 &v3d->ssbo[stage].sb[data];
348
349 cl_aligned_reloc(&job->indirect, &uniforms,
350 v3d_resource(sb->buffer)->bo,
351 sb->buffer_offset);
352 break;
353 }
354
355 case QUNIFORM_GET_BUFFER_SIZE:
356 cl_aligned_u32(&uniforms,
357 v3d->ssbo[stage].sb[data].buffer_size);
358 break;
359
360 case QUNIFORM_TEXTURE_FIRST_LEVEL:
361 cl_aligned_f(&uniforms,
362 texstate->textures[data]->u.tex.first_level);
363 break;
364
365 case QUNIFORM_SPILL_OFFSET:
366 cl_aligned_reloc(&job->indirect, &uniforms,
367 v3d->prog.spill_bo, 0);
368 break;
369
370 case QUNIFORM_SPILL_SIZE_PER_THREAD:
371 cl_aligned_u32(&uniforms,
372 v3d->prog.spill_size_per_thread);
373 break;
374
375 case QUNIFORM_NUM_WORK_GROUPS:
376 cl_aligned_u32(&uniforms,
377 v3d->compute_num_workgroups[data]);
378 break;
379
380 case QUNIFORM_SHARED_OFFSET:
381 cl_aligned_reloc(&job->indirect, &uniforms,
382 v3d->compute_shared_memory, 0);
383 break;
384
385 case QUNIFORM_FB_LAYERS:
386 cl_aligned_u32(&uniforms, job->num_layers);
387 break;
388
389 default:
390 assert(quniform_contents_is_texture_p0(uinfo->contents[i]));
391
392 write_texture_p0(job, &uniforms, texstate,
393 uinfo->contents[i] -
394 QUNIFORM_TEXTURE_CONFIG_P0_0,
395 data);
396 break;
397
398 }
399 #if 0
400 uint32_t written_val = *((uint32_t *)uniforms - 1);
401 fprintf(stderr, "shader %p[%d]: 0x%08x / 0x%08x (%f) ",
402 shader, i, __gen_address_offset(&uniform_stream) + i * 4,
403 written_val, uif(written_val));
404 vir_dump_uniform(uinfo->contents[i], data);
405 fprintf(stderr, "\n");
406 #endif
407 }
408
409 cl_end(&job->indirect, uniforms);
410
411 return uniform_stream;
412 }
413
414 void
415 v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader)
416 {
417 uint32_t dirty = 0;
418
419 for (int i = 0; i < shader->prog_data.base->uniforms.count; i++) {
420 switch (shader->prog_data.base->uniforms.contents[i]) {
421 case QUNIFORM_CONSTANT:
422 break;
423 case QUNIFORM_UNIFORM:
424 case QUNIFORM_UBO_ADDR:
425 dirty |= VC5_DIRTY_CONSTBUF;
426 break;
427
428 case QUNIFORM_VIEWPORT_X_SCALE:
429 case QUNIFORM_VIEWPORT_Y_SCALE:
430 case QUNIFORM_VIEWPORT_Z_OFFSET:
431 case QUNIFORM_VIEWPORT_Z_SCALE:
432 dirty |= VC5_DIRTY_VIEWPORT;
433 break;
434
435 case QUNIFORM_USER_CLIP_PLANE:
436 dirty |= VC5_DIRTY_CLIP;
437 break;
438
439 case QUNIFORM_TMU_CONFIG_P0:
440 case QUNIFORM_TMU_CONFIG_P1:
441 case QUNIFORM_TEXTURE_CONFIG_P1:
442 case QUNIFORM_TEXTURE_FIRST_LEVEL:
443 case QUNIFORM_TEXRECT_SCALE_X:
444 case QUNIFORM_TEXRECT_SCALE_Y:
445 case QUNIFORM_TEXTURE_WIDTH:
446 case QUNIFORM_TEXTURE_HEIGHT:
447 case QUNIFORM_TEXTURE_DEPTH:
448 case QUNIFORM_TEXTURE_ARRAY_SIZE:
449 case QUNIFORM_TEXTURE_LEVELS:
450 case QUNIFORM_SPILL_OFFSET:
451 case QUNIFORM_SPILL_SIZE_PER_THREAD:
452 /* We could flag this on just the stage we're
453 * compiling for, but it's not passed in.
454 */
455 dirty |= VC5_DIRTY_FRAGTEX | VC5_DIRTY_VERTTEX |
456 VC5_DIRTY_GEOMTEX | VC5_DIRTY_COMPTEX;
457 break;
458
459 case QUNIFORM_SSBO_OFFSET:
460 case QUNIFORM_GET_BUFFER_SIZE:
461 dirty |= VC5_DIRTY_SSBO;
462 break;
463
464 case QUNIFORM_IMAGE_TMU_CONFIG_P0:
465 case QUNIFORM_IMAGE_WIDTH:
466 case QUNIFORM_IMAGE_HEIGHT:
467 case QUNIFORM_IMAGE_DEPTH:
468 case QUNIFORM_IMAGE_ARRAY_SIZE:
469 dirty |= VC5_DIRTY_SHADER_IMAGE;
470 break;
471
472 case QUNIFORM_ALPHA_REF:
473 dirty |= VC5_DIRTY_ZSA;
474 break;
475
476 case QUNIFORM_LINE_WIDTH:
477 case QUNIFORM_AA_LINE_WIDTH:
478 dirty |= VC5_DIRTY_RASTERIZER;
479 break;
480
481 case QUNIFORM_NUM_WORK_GROUPS:
482 case QUNIFORM_SHARED_OFFSET:
483 /* Compute always recalculates uniforms. */
484 break;
485
486 case QUNIFORM_FB_LAYERS:
487 dirty |= VC5_DIRTY_FRAMEBUFFER;
488 break;
489
490 default:
491 assert(quniform_contents_is_texture_p0(shader->prog_data.base->uniforms.contents[i]));
492 dirty |= VC5_DIRTY_FRAGTEX | VC5_DIRTY_VERTTEX |
493 VC5_DIRTY_GEOMTEX | VC5_DIRTY_COMPTEX;
494 break;
495 }
496 }
497
498 shader->uniform_dirty_bits = dirty;
499 }