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[mesa.git] / src / gallium / drivers / vc4 / vc4_resource.c
1 /*
2 * Copyright © 2014 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/u_blit.h"
26 #include "util/u_memory.h"
27 #include "util/u_format.h"
28 #include "util/u_inlines.h"
29 #include "util/u_surface.h"
30 #include "util/u_upload_mgr.h"
31
32 #include "vc4_screen.h"
33 #include "vc4_context.h"
34 #include "vc4_resource.h"
35 #include "vc4_tiling.h"
36
37 static bool miptree_debug = false;
38
39 static bool
40 vc4_resource_bo_alloc(struct vc4_resource *rsc)
41 {
42 struct pipe_resource *prsc = &rsc->base.b;
43 struct pipe_screen *pscreen = prsc->screen;
44 struct vc4_bo *bo;
45
46 if (miptree_debug) {
47 fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
48 rsc,
49 rsc->slices[0].size,
50 rsc->slices[0].offset,
51 rsc->slices[0].offset +
52 rsc->slices[0].size +
53 rsc->cube_map_stride * (prsc->array_size - 1));
54 }
55
56 bo = vc4_bo_alloc(vc4_screen(pscreen),
57 rsc->slices[0].offset +
58 rsc->slices[0].size +
59 rsc->cube_map_stride * (prsc->array_size - 1),
60 "resource");
61 if (bo) {
62 vc4_bo_unreference(&rsc->bo);
63 rsc->bo = bo;
64 return true;
65 } else {
66 return false;
67 }
68 }
69
70 static void
71 vc4_resource_transfer_unmap(struct pipe_context *pctx,
72 struct pipe_transfer *ptrans)
73 {
74 struct vc4_context *vc4 = vc4_context(pctx);
75 struct vc4_transfer *trans = vc4_transfer(ptrans);
76
77 if (trans->map) {
78 struct vc4_resource *rsc;
79 struct vc4_resource_slice *slice;
80 if (trans->ss_resource) {
81 rsc = vc4_resource(trans->ss_resource);
82 slice = &rsc->slices[0];
83 } else {
84 rsc = vc4_resource(ptrans->resource);
85 slice = &rsc->slices[ptrans->level];
86 }
87
88 if (ptrans->usage & PIPE_TRANSFER_WRITE) {
89 vc4_store_tiled_image(rsc->bo->map + slice->offset +
90 ptrans->box.z * rsc->cube_map_stride,
91 slice->stride,
92 trans->map, ptrans->stride,
93 slice->tiling, rsc->cpp,
94 &ptrans->box);
95 }
96 free(trans->map);
97 }
98
99 if (trans->ss_resource && (ptrans->usage & PIPE_TRANSFER_WRITE)) {
100 struct pipe_blit_info blit;
101 memset(&blit, 0, sizeof(blit));
102
103 blit.src.resource = trans->ss_resource;
104 blit.src.format = trans->ss_resource->format;
105 blit.src.box.width = trans->ss_box.width;
106 blit.src.box.height = trans->ss_box.height;
107 blit.src.box.depth = 1;
108
109 blit.dst.resource = ptrans->resource;
110 blit.dst.format = ptrans->resource->format;
111 blit.dst.level = ptrans->level;
112 blit.dst.box = trans->ss_box;
113
114 blit.mask = util_format_get_mask(ptrans->resource->format);
115 blit.filter = PIPE_TEX_FILTER_NEAREST;
116
117 pctx->blit(pctx, &blit);
118 vc4_flush(pctx);
119
120 pipe_resource_reference(&trans->ss_resource, NULL);
121 }
122
123 pipe_resource_reference(&ptrans->resource, NULL);
124 util_slab_free(&vc4->transfer_pool, ptrans);
125 }
126
127 static struct pipe_resource *
128 vc4_get_temp_resource(struct pipe_context *pctx,
129 struct pipe_resource *prsc,
130 const struct pipe_box *box)
131 {
132 struct pipe_resource temp_setup;
133
134 memset(&temp_setup, 0, sizeof(temp_setup));
135 temp_setup.target = prsc->target;
136 temp_setup.format = prsc->format;
137 temp_setup.width0 = box->width;
138 temp_setup.height0 = box->height;
139 temp_setup.depth0 = 1;
140 temp_setup.array_size = 1;
141
142 return pctx->screen->resource_create(pctx->screen, &temp_setup);
143 }
144
145 static void *
146 vc4_resource_transfer_map(struct pipe_context *pctx,
147 struct pipe_resource *prsc,
148 unsigned level, unsigned usage,
149 const struct pipe_box *box,
150 struct pipe_transfer **pptrans)
151 {
152 struct vc4_context *vc4 = vc4_context(pctx);
153 struct vc4_resource *rsc = vc4_resource(prsc);
154 struct vc4_transfer *trans;
155 struct pipe_transfer *ptrans;
156 enum pipe_format format = prsc->format;
157 char *buf;
158
159 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
160 if (vc4_resource_bo_alloc(rsc)) {
161
162 /* If it might be bound as one of our vertex buffers,
163 * make sure we re-emit vertex buffer state.
164 */
165 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
166 vc4->dirty |= VC4_DIRTY_VTXBUF;
167 } else {
168 /* If we failed to reallocate, flush everything so
169 * that we don't violate any syncing requirements.
170 */
171 vc4_flush(pctx);
172 }
173 } else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
174 /* If we're writing and the buffer is being used by the CL, we
175 * have to flush the CL first. If we're only reading, we need
176 * to flush if the CL has written our buffer.
177 */
178 if (vc4_cl_references_bo(pctx, rsc->bo,
179 usage & PIPE_TRANSFER_WRITE)) {
180 if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
181 prsc->last_level == 0 &&
182 prsc->width0 == box->width &&
183 prsc->height0 == box->height &&
184 prsc->depth0 == box->depth &&
185 vc4_resource_bo_alloc(rsc)) {
186 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
187 vc4->dirty |= VC4_DIRTY_VTXBUF;
188 } else {
189 vc4_flush(pctx);
190 }
191 }
192 }
193
194 if (usage & PIPE_TRANSFER_WRITE)
195 rsc->writes++;
196
197 trans = util_slab_alloc(&vc4->transfer_pool);
198 if (!trans)
199 return NULL;
200
201 /* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
202
203 /* util_slab_alloc() doesn't zero: */
204 memset(trans, 0, sizeof(*trans));
205 ptrans = &trans->base;
206
207 pipe_resource_reference(&ptrans->resource, prsc);
208 ptrans->level = level;
209 ptrans->usage = usage;
210 ptrans->box = *box;
211
212 /* If the resource is multisampled, we need to resolve to single
213 * sample. This seems like it should be handled at a higher layer.
214 */
215 if (prsc->nr_samples > 1) {
216 trans->ss_resource = vc4_get_temp_resource(pctx, prsc, box);
217 if (!trans->ss_resource)
218 goto fail;
219 assert(!trans->ss_resource->nr_samples);
220
221 /* The ptrans->box gets modified for tile alignment, so save
222 * the original box for unmap time.
223 */
224 trans->ss_box = *box;
225
226 if (usage & PIPE_TRANSFER_READ) {
227 struct pipe_blit_info blit;
228 memset(&blit, 0, sizeof(blit));
229
230 blit.src.resource = ptrans->resource;
231 blit.src.format = ptrans->resource->format;
232 blit.src.level = ptrans->level;
233 blit.src.box = trans->ss_box;
234
235 blit.dst.resource = trans->ss_resource;
236 blit.dst.format = trans->ss_resource->format;
237 blit.dst.box.width = trans->ss_box.width;
238 blit.dst.box.height = trans->ss_box.height;
239 blit.dst.box.depth = 1;
240
241 blit.mask = util_format_get_mask(prsc->format);
242 blit.filter = PIPE_TEX_FILTER_NEAREST;
243
244 pctx->blit(pctx, &blit);
245 vc4_flush(pctx);
246 }
247
248 /* The rest of the mapping process should use our temporary. */
249 prsc = trans->ss_resource;
250 rsc = vc4_resource(prsc);
251 ptrans->box.x = 0;
252 ptrans->box.y = 0;
253 ptrans->box.z = 0;
254 }
255
256 /* Note that the current kernel implementation is synchronous, so no
257 * need to do syncing stuff here yet.
258 */
259
260 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
261 buf = vc4_bo_map_unsynchronized(rsc->bo);
262 else
263 buf = vc4_bo_map(rsc->bo);
264 if (!buf) {
265 fprintf(stderr, "Failed to map bo\n");
266 goto fail;
267 }
268
269 *pptrans = ptrans;
270
271 struct vc4_resource_slice *slice = &rsc->slices[level];
272 if (rsc->tiled) {
273 uint32_t utile_w = vc4_utile_width(rsc->cpp);
274 uint32_t utile_h = vc4_utile_height(rsc->cpp);
275
276 /* No direct mappings of tiled, since we need to manually
277 * tile/untile.
278 */
279 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
280 return NULL;
281
282 /* We need to align the box to utile boundaries, since that's
283 * what load/store operate on.
284 */
285 uint32_t orig_width = ptrans->box.width;
286 uint32_t orig_height = ptrans->box.height;
287 uint32_t box_start_x = ptrans->box.x & (utile_w - 1);
288 uint32_t box_start_y = ptrans->box.y & (utile_h - 1);
289 ptrans->box.width += box_start_x;
290 ptrans->box.x -= box_start_x;
291 ptrans->box.height += box_start_y;
292 ptrans->box.y -= box_start_y;
293 ptrans->box.width = align(ptrans->box.width, utile_w);
294 ptrans->box.height = align(ptrans->box.height, utile_h);
295
296 ptrans->stride = ptrans->box.width * rsc->cpp;
297 ptrans->layer_stride = ptrans->stride * ptrans->box.height;
298
299 trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
300 if (usage & PIPE_TRANSFER_READ ||
301 ptrans->box.width != orig_width ||
302 ptrans->box.height != orig_height) {
303 vc4_load_tiled_image(trans->map, ptrans->stride,
304 buf + slice->offset +
305 ptrans->box.z * rsc->cube_map_stride,
306 slice->stride,
307 slice->tiling, rsc->cpp,
308 &ptrans->box);
309 }
310 return (trans->map +
311 box_start_x * rsc->cpp +
312 box_start_y * ptrans->stride);
313 } else {
314 ptrans->stride = slice->stride;
315 ptrans->layer_stride = ptrans->stride;
316
317 return buf + slice->offset +
318 ptrans->box.y / util_format_get_blockheight(format) * ptrans->stride +
319 ptrans->box.x / util_format_get_blockwidth(format) * rsc->cpp +
320 ptrans->box.z * rsc->cube_map_stride;
321 }
322
323
324 fail:
325 vc4_resource_transfer_unmap(pctx, ptrans);
326 return NULL;
327 }
328
329 static void
330 vc4_resource_destroy(struct pipe_screen *pscreen,
331 struct pipe_resource *prsc)
332 {
333 struct vc4_resource *rsc = vc4_resource(prsc);
334 pipe_resource_reference(&rsc->shadow_parent, NULL);
335 vc4_bo_unreference(&rsc->bo);
336 free(rsc);
337 }
338
339 static boolean
340 vc4_resource_get_handle(struct pipe_screen *pscreen,
341 struct pipe_resource *prsc,
342 struct winsys_handle *handle)
343 {
344 struct vc4_resource *rsc = vc4_resource(prsc);
345
346 return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
347 handle);
348 }
349
350 static const struct u_resource_vtbl vc4_resource_vtbl = {
351 .resource_get_handle = vc4_resource_get_handle,
352 .resource_destroy = vc4_resource_destroy,
353 .transfer_map = vc4_resource_transfer_map,
354 .transfer_flush_region = u_default_transfer_flush_region,
355 .transfer_unmap = vc4_resource_transfer_unmap,
356 };
357
358 static void
359 vc4_setup_slices(struct vc4_resource *rsc)
360 {
361 struct pipe_resource *prsc = &rsc->base.b;
362 uint32_t width = prsc->width0;
363 uint32_t height = prsc->height0;
364 uint32_t pot_width = util_next_power_of_two(width);
365 uint32_t pot_height = util_next_power_of_two(height);
366 uint32_t offset = 0;
367 uint32_t utile_w = vc4_utile_width(rsc->cpp);
368 uint32_t utile_h = vc4_utile_height(rsc->cpp);
369
370 for (int i = prsc->last_level; i >= 0; i--) {
371 struct vc4_resource_slice *slice = &rsc->slices[i];
372
373 uint32_t level_width, level_height;
374 if (i == 0) {
375 level_width = width;
376 level_height = height;
377 } else {
378 level_width = u_minify(pot_width, i);
379 level_height = u_minify(pot_height, i);
380 }
381
382 if (!rsc->tiled) {
383 slice->tiling = VC4_TILING_FORMAT_LINEAR;
384 if (prsc->nr_samples > 1) {
385 /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
386 level_width = align(level_width, 32);
387 level_height = align(level_height, 32);
388 } else {
389 level_width = align(level_width, utile_w);
390 }
391 } else {
392 if (vc4_size_is_lt(level_width, level_height,
393 rsc->cpp)) {
394 slice->tiling = VC4_TILING_FORMAT_LT;
395 level_width = align(level_width, utile_w);
396 level_height = align(level_height, utile_h);
397 } else {
398 slice->tiling = VC4_TILING_FORMAT_T;
399 level_width = align(level_width,
400 4 * 2 * utile_w);
401 level_height = align(level_height,
402 4 * 2 * utile_h);
403 }
404 }
405
406 slice->offset = offset;
407 slice->stride = (level_width * rsc->cpp *
408 MAX2(prsc->nr_samples, 1));
409 slice->size = level_height * slice->stride;
410
411 offset += slice->size;
412
413 if (miptree_debug) {
414 static const char tiling_chars[] = {
415 [VC4_TILING_FORMAT_LINEAR] = 'R',
416 [VC4_TILING_FORMAT_LT] = 'L',
417 [VC4_TILING_FORMAT_T] = 'T'
418 };
419 fprintf(stderr,
420 "rsc setup %p (format %d), %dx%d: "
421 "level %d (%c) -> %dx%d, stride %d@0x%08x\n",
422 rsc, rsc->vc4_format,
423 prsc->width0, prsc->height0,
424 i, tiling_chars[slice->tiling],
425 level_width, level_height,
426 slice->stride, slice->offset);
427 }
428 }
429
430 /* The texture base pointer that has to point to level 0 doesn't have
431 * intra-page bits, so we have to align it, and thus shift up all the
432 * smaller slices.
433 */
434 uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
435 rsc->slices[0].offset);
436 if (page_align_offset) {
437 for (int i = 0; i <= prsc->last_level; i++)
438 rsc->slices[i].offset += page_align_offset;
439 }
440
441 /* Cube map faces appear as whole miptrees at a page-aligned offset
442 * from the first face's miptree.
443 */
444 if (prsc->target == PIPE_TEXTURE_CUBE) {
445 rsc->cube_map_stride = align(rsc->slices[0].offset +
446 rsc->slices[0].size, 4096);
447 }
448 }
449
450 static struct vc4_resource *
451 vc4_resource_setup(struct pipe_screen *pscreen,
452 const struct pipe_resource *tmpl)
453 {
454 struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
455 if (!rsc)
456 return NULL;
457 struct pipe_resource *prsc = &rsc->base.b;
458
459 *prsc = *tmpl;
460
461 pipe_reference_init(&prsc->reference, 1);
462 prsc->screen = pscreen;
463
464 rsc->base.vtbl = &vc4_resource_vtbl;
465 if (prsc->nr_samples <= 1)
466 rsc->cpp = util_format_get_blocksize(tmpl->format);
467 else
468 rsc->cpp = sizeof(uint32_t);
469
470 assert(rsc->cpp);
471
472 return rsc;
473 }
474
475 static enum vc4_texture_data_type
476 get_resource_texture_format(struct pipe_resource *prsc)
477 {
478 struct vc4_resource *rsc = vc4_resource(prsc);
479 uint8_t format = vc4_get_tex_format(prsc->format);
480
481 if (!rsc->tiled) {
482 if (prsc->nr_samples > 1) {
483 return ~0;
484 } else {
485 assert(format == VC4_TEXTURE_TYPE_RGBA8888);
486 return VC4_TEXTURE_TYPE_RGBA32R;
487 }
488 }
489
490 return format;
491 }
492
493 struct pipe_resource *
494 vc4_resource_create(struct pipe_screen *pscreen,
495 const struct pipe_resource *tmpl)
496 {
497 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
498 struct pipe_resource *prsc = &rsc->base.b;
499
500 /* We have to make shared be untiled, since we don't have any way to
501 * communicate metadata about tiling currently.
502 */
503 if (tmpl->target == PIPE_BUFFER ||
504 tmpl->nr_samples > 1 ||
505 (tmpl->bind & (PIPE_BIND_SCANOUT |
506 PIPE_BIND_LINEAR |
507 PIPE_BIND_SHARED |
508 PIPE_BIND_CURSOR))) {
509 rsc->tiled = false;
510 } else {
511 rsc->tiled = true;
512 }
513
514 if (tmpl->target != PIPE_BUFFER)
515 rsc->vc4_format = get_resource_texture_format(prsc);
516
517 vc4_setup_slices(rsc);
518 if (!vc4_resource_bo_alloc(rsc))
519 goto fail;
520
521 return prsc;
522 fail:
523 vc4_resource_destroy(pscreen, prsc);
524 return NULL;
525 }
526
527 static struct pipe_resource *
528 vc4_resource_from_handle(struct pipe_screen *pscreen,
529 const struct pipe_resource *tmpl,
530 struct winsys_handle *handle,
531 unsigned usage)
532 {
533 struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
534 struct pipe_resource *prsc = &rsc->base.b;
535 struct vc4_resource_slice *slice = &rsc->slices[0];
536 uint32_t expected_stride =
537 align(prsc->width0, vc4_utile_width(rsc->cpp)) * rsc->cpp;
538
539 if (!rsc)
540 return NULL;
541
542 if (handle->stride != expected_stride) {
543 static bool warned = false;
544 if (!warned) {
545 warned = true;
546 fprintf(stderr,
547 "Attempting to import %dx%d %s with "
548 "unsupported stride %d instead of %d\n",
549 prsc->width0, prsc->height0,
550 util_format_short_name(prsc->format),
551 handle->stride,
552 expected_stride);
553 }
554 goto fail;
555 }
556
557 rsc->tiled = false;
558 rsc->bo = vc4_screen_bo_from_handle(pscreen, handle);
559 if (!rsc->bo)
560 goto fail;
561
562 slice->stride = handle->stride;
563 slice->tiling = VC4_TILING_FORMAT_LINEAR;
564
565 rsc->vc4_format = get_resource_texture_format(prsc);
566
567 if (miptree_debug) {
568 fprintf(stderr,
569 "rsc import %p (format %d), %dx%d: "
570 "level 0 (R) -> stride %d@0x%08x\n",
571 rsc, rsc->vc4_format,
572 prsc->width0, prsc->height0,
573 slice->stride, slice->offset);
574 }
575
576 return prsc;
577
578 fail:
579 vc4_resource_destroy(pscreen, prsc);
580 return NULL;
581 }
582
583 static struct pipe_surface *
584 vc4_create_surface(struct pipe_context *pctx,
585 struct pipe_resource *ptex,
586 const struct pipe_surface *surf_tmpl)
587 {
588 struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
589 struct vc4_resource *rsc = vc4_resource(ptex);
590
591 if (!surface)
592 return NULL;
593
594 assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
595
596 struct pipe_surface *psurf = &surface->base;
597 unsigned level = surf_tmpl->u.tex.level;
598
599 pipe_reference_init(&psurf->reference, 1);
600 pipe_resource_reference(&psurf->texture, ptex);
601
602 psurf->context = pctx;
603 psurf->format = surf_tmpl->format;
604 psurf->width = u_minify(ptex->width0, level);
605 psurf->height = u_minify(ptex->height0, level);
606 psurf->u.tex.level = level;
607 psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
608 psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
609 surface->offset = (rsc->slices[level].offset +
610 psurf->u.tex.first_layer * rsc->cube_map_stride);
611 surface->tiling = rsc->slices[level].tiling;
612
613 return &surface->base;
614 }
615
616 static void
617 vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
618 {
619 pipe_resource_reference(&psurf->texture, NULL);
620 FREE(psurf);
621 }
622
623 static void
624 vc4_dump_surface_non_msaa(struct pipe_surface *psurf)
625 {
626 struct pipe_resource *prsc = psurf->texture;
627 struct vc4_resource *rsc = vc4_resource(prsc);
628 uint32_t *map = vc4_bo_map(rsc->bo);
629 uint32_t stride = rsc->slices[0].stride / 4;
630 uint32_t width = psurf->width;
631 uint32_t height = psurf->height;
632 uint32_t chunk_w = width / 79;
633 uint32_t chunk_h = height / 40;
634 uint32_t found_colors[10];
635 uint32_t num_found_colors = 0;
636
637 if (rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R) {
638 fprintf(stderr, "%s: Unsupported format %s\n",
639 __func__, util_format_short_name(psurf->format));
640 return;
641 }
642
643 for (int by = 0; by < height; by += chunk_h) {
644 for (int bx = 0; bx < width; bx += chunk_w) {
645 int all_found_color = -1; /* nothing found */
646
647 for (int y = by; y < MIN2(height, by + chunk_h); y++) {
648 for (int x = bx; x < MIN2(width, bx + chunk_w); x++) {
649 uint32_t pix = map[y * stride + x];
650
651 int i;
652 for (i = 0; i < num_found_colors; i++) {
653 if (pix == found_colors[i])
654 break;
655 }
656 if (i == num_found_colors &&
657 num_found_colors <
658 ARRAY_SIZE(found_colors)) {
659 found_colors[num_found_colors++] = pix;
660 }
661
662 if (i < num_found_colors) {
663 if (all_found_color == -1)
664 all_found_color = i;
665 else if (i != all_found_color)
666 all_found_color = ARRAY_SIZE(found_colors);
667 }
668 }
669 }
670 /* If all pixels for this chunk have a consistent
671 * value, then print a character for it. Either a
672 * fixed name (particularly common for piglit tests),
673 * or a runtime-generated number.
674 */
675 if (all_found_color >= 0 &&
676 all_found_color < ARRAY_SIZE(found_colors)) {
677 static const struct {
678 uint32_t val;
679 const char *c;
680 } named_colors[] = {
681 { 0xff000000, "█" },
682 { 0x00000000, "█" },
683 { 0xffff0000, "r" },
684 { 0xff00ff00, "g" },
685 { 0xff0000ff, "b" },
686 { 0xffffffff, "w" },
687 };
688 int i;
689 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
690 if (named_colors[i].val ==
691 found_colors[all_found_color]) {
692 fprintf(stderr, "%s",
693 named_colors[i].c);
694 break;
695 }
696 }
697 /* For unnamed colors, print a number and the
698 * numbers will have values printed at the
699 * end.
700 */
701 if (i == ARRAY_SIZE(named_colors)) {
702 fprintf(stderr, "%c",
703 '0' + all_found_color);
704 }
705 } else {
706 /* If there's no consistent color, print this.
707 */
708 fprintf(stderr, ".");
709 }
710 }
711 fprintf(stderr, "\n");
712 }
713
714 for (int i = 0; i < num_found_colors; i++) {
715 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
716 }
717 }
718
719 static uint32_t
720 vc4_surface_msaa_get_sample(struct pipe_surface *psurf,
721 uint32_t x, uint32_t y, uint32_t sample)
722 {
723 struct pipe_resource *prsc = psurf->texture;
724 struct vc4_resource *rsc = vc4_resource(prsc);
725 uint32_t tile_w = 32, tile_h = 32;
726 uint32_t tiles_w = DIV_ROUND_UP(psurf->width, 32);
727
728 uint32_t tile_x = x / tile_w;
729 uint32_t tile_y = y / tile_h;
730 uint32_t *tile = (vc4_bo_map(rsc->bo) +
731 VC4_TILE_BUFFER_SIZE * (tile_y * tiles_w + tile_x));
732 uint32_t subtile_x = x % tile_w;
733 uint32_t subtile_y = y % tile_h;
734
735 uint32_t quad_samples = VC4_MAX_SAMPLES * 4;
736 uint32_t tile_stride = quad_samples * tile_w / 2;
737
738 return *((uint32_t *)tile +
739 (subtile_y >> 1) * tile_stride +
740 (subtile_x >> 1) * quad_samples +
741 ((subtile_y & 1) << 1) +
742 (subtile_x & 1) +
743 sample);
744 }
745
746 static void
747 vc4_dump_surface_msaa_char(struct pipe_surface *psurf,
748 uint32_t start_x, uint32_t start_y,
749 uint32_t w, uint32_t h)
750 {
751 bool all_same_color = true;
752 uint32_t all_pix = 0;
753
754 for (int y = start_y; y < start_y + h; y++) {
755 for (int x = start_x; x < start_x + w; x++) {
756 for (int s = 0; s < VC4_MAX_SAMPLES; s++) {
757 uint32_t pix = vc4_surface_msaa_get_sample(psurf,
758 x, y,
759 s);
760 if (x == start_x && y == start_y)
761 all_pix = pix;
762 else if (all_pix != pix)
763 all_same_color = false;
764 }
765 }
766 }
767 if (all_same_color) {
768 static const struct {
769 uint32_t val;
770 const char *c;
771 } named_colors[] = {
772 { 0xff000000, "█" },
773 { 0x00000000, "█" },
774 { 0xffff0000, "r" },
775 { 0xff00ff00, "g" },
776 { 0xff0000ff, "b" },
777 { 0xffffffff, "w" },
778 };
779 int i;
780 for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
781 if (named_colors[i].val == all_pix) {
782 fprintf(stderr, "%s",
783 named_colors[i].c);
784 return;
785 }
786 }
787 fprintf(stderr, "x");
788 } else {
789 fprintf(stderr, ".");
790 }
791 }
792
793 static void
794 vc4_dump_surface_msaa(struct pipe_surface *psurf)
795 {
796 uint32_t tile_w = 32, tile_h = 32;
797 uint32_t tiles_w = DIV_ROUND_UP(psurf->width, tile_w);
798 uint32_t tiles_h = DIV_ROUND_UP(psurf->height, tile_h);
799 uint32_t char_w = 140, char_h = 60;
800 uint32_t char_w_per_tile = char_w / tiles_w - 1;
801 uint32_t char_h_per_tile = char_h / tiles_h - 1;
802 uint32_t found_colors[10];
803 uint32_t num_found_colors = 0;
804
805 fprintf(stderr, "Surface: %dx%d (%dx MSAA)\n",
806 psurf->width, psurf->height, psurf->texture->nr_samples);
807
808 for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
809 fprintf(stderr, "-");
810 fprintf(stderr, "\n");
811
812 for (int ty = 0; ty < psurf->height; ty += tile_h) {
813 for (int y = 0; y < char_h_per_tile; y++) {
814
815 for (int tx = 0; tx < psurf->width; tx += tile_w) {
816 for (int x = 0; x < char_w_per_tile; x++) {
817 uint32_t bx1 = (x * tile_w /
818 char_w_per_tile);
819 uint32_t bx2 = ((x + 1) * tile_w /
820 char_w_per_tile);
821 uint32_t by1 = (y * tile_h /
822 char_h_per_tile);
823 uint32_t by2 = ((y + 1) * tile_h /
824 char_h_per_tile);
825
826 vc4_dump_surface_msaa_char(psurf,
827 tx + bx1,
828 ty + by1,
829 bx2 - bx1,
830 by2 - by1);
831 }
832 fprintf(stderr, "|");
833 }
834 fprintf(stderr, "\n");
835 }
836
837 for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
838 fprintf(stderr, "-");
839 fprintf(stderr, "\n");
840 }
841
842 for (int i = 0; i < num_found_colors; i++) {
843 fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
844 }
845 }
846
847 /** Debug routine to dump the contents of an 8888 surface to the console */
848 void
849 vc4_dump_surface(struct pipe_surface *psurf)
850 {
851 if (!psurf)
852 return;
853
854 if (psurf->texture->nr_samples > 1)
855 vc4_dump_surface_msaa(psurf);
856 else
857 vc4_dump_surface_non_msaa(psurf);
858 }
859
860 static void
861 vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
862 {
863 /* All calls to flush_resource are followed by a flush of the context,
864 * so there's nothing to do.
865 */
866 }
867
868 void
869 vc4_update_shadow_baselevel_texture(struct pipe_context *pctx,
870 struct pipe_sampler_view *view)
871 {
872 struct vc4_resource *shadow = vc4_resource(view->texture);
873 struct vc4_resource *orig = vc4_resource(shadow->shadow_parent);
874 assert(orig);
875
876 if (shadow->writes == orig->writes && orig->bo->private)
877 return;
878
879 perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
880 orig->base.b.width0, orig->base.b.height0,
881 view->u.tex.first_level,
882 view->u.tex.first_level ? "base level" : "raster layout");
883
884 for (int i = 0; i <= shadow->base.b.last_level; i++) {
885 unsigned width = u_minify(shadow->base.b.width0, i);
886 unsigned height = u_minify(shadow->base.b.height0, i);
887 struct pipe_blit_info info = {
888 .dst = {
889 .resource = &shadow->base.b,
890 .level = i,
891 .box = {
892 .x = 0,
893 .y = 0,
894 .z = 0,
895 .width = width,
896 .height = height,
897 .depth = 1,
898 },
899 .format = shadow->base.b.format,
900 },
901 .src = {
902 .resource = &orig->base.b,
903 .level = view->u.tex.first_level + i,
904 .box = {
905 .x = 0,
906 .y = 0,
907 .z = 0,
908 .width = width,
909 .height = height,
910 .depth = 1,
911 },
912 .format = orig->base.b.format,
913 },
914 .mask = ~0,
915 };
916 pctx->blit(pctx, &info);
917 }
918
919 shadow->writes = orig->writes;
920 }
921
922 /**
923 * Converts a 4-byte index buffer to 2 bytes.
924 *
925 * Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
926 * include 4-byte index support, and we have to shrink it down.
927 *
928 * There's no fallback support for when indices end up being larger than 2^16,
929 * though it will at least assertion fail. Also, if the original index data
930 * was in user memory, it would be nice to not have uploaded it to a VBO
931 * before translating.
932 */
933 struct pipe_resource *
934 vc4_get_shadow_index_buffer(struct pipe_context *pctx,
935 const struct pipe_index_buffer *ib,
936 uint32_t count,
937 uint32_t *shadow_offset)
938 {
939 struct vc4_context *vc4 = vc4_context(pctx);
940 struct vc4_resource *orig = vc4_resource(ib->buffer);
941 perf_debug("Fallback conversion for %d uint indices\n", count);
942
943 void *data;
944 struct pipe_resource *shadow_rsc = NULL;
945 u_upload_alloc(vc4->uploader, 0, count * 2, 4,
946 shadow_offset, &shadow_rsc, &data);
947 uint16_t *dst = data;
948
949 struct pipe_transfer *src_transfer = NULL;
950 const uint32_t *src;
951 if (ib->user_buffer) {
952 src = ib->user_buffer;
953 } else {
954 src = pipe_buffer_map_range(pctx, &orig->base.b,
955 ib->offset,
956 count * 4,
957 PIPE_TRANSFER_READ, &src_transfer);
958 }
959
960 for (int i = 0; i < count; i++) {
961 uint32_t src_index = src[i];
962 assert(src_index <= 0xffff);
963 dst[i] = src_index;
964 }
965
966 if (src_transfer)
967 pctx->transfer_unmap(pctx, src_transfer);
968
969 return shadow_rsc;
970 }
971
972 void
973 vc4_resource_screen_init(struct pipe_screen *pscreen)
974 {
975 pscreen->resource_create = vc4_resource_create;
976 pscreen->resource_from_handle = vc4_resource_from_handle;
977 pscreen->resource_get_handle = u_resource_get_handle_vtbl;
978 pscreen->resource_destroy = u_resource_destroy_vtbl;
979 }
980
981 void
982 vc4_resource_context_init(struct pipe_context *pctx)
983 {
984 pctx->transfer_map = u_transfer_map_vtbl;
985 pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
986 pctx->transfer_unmap = u_transfer_unmap_vtbl;
987 pctx->buffer_subdata = u_default_buffer_subdata;
988 pctx->texture_subdata = u_default_texture_subdata;
989 pctx->create_surface = vc4_create_surface;
990 pctx->surface_destroy = vc4_surface_destroy;
991 pctx->resource_copy_region = util_resource_copy_region;
992 pctx->blit = vc4_blit;
993 pctx->flush_resource = vc4_flush_resource;
994 }