src/gallium/drivers/vc4/vc4_screen.c

   1 /*
   2  * Copyright © 2014 Broadcom
   3  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  */
  24
  25 #include "os/os_misc.h"
  26 #include "pipe/p_defines.h"
  27 #include "pipe/p_screen.h"
  28 #include "pipe/p_state.h"
  29
  30 #include "util/u_cpu_detect.h"
  31 #include "util/u_debug.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_hash_table.h"
  35 #include "util/u_screen.h"
  36 #include "util/ralloc.h"
  37
  38 #include <xf86drm.h>
  39 #include "drm_fourcc.h"
  40 #include "vc4_drm.h"
  41 #include "vc4_screen.h"
  42 #include "vc4_context.h"
  43 #include "vc4_resource.h"
  44
  45 static const struct debug_named_value debug_options[] = {
  46         { "cl",       VC4_DEBUG_CL,
  47           "Dump command list during creation" },
  48         { "surf",       VC4_DEBUG_SURFACE,
  49           "Dump surface layouts" },
  50         { "qpu",      VC4_DEBUG_QPU,
  51           "Dump generated QPU instructions" },
  52         { "qir",      VC4_DEBUG_QIR,
  53           "Dump QPU IR during program compile" },
  54         { "nir",      VC4_DEBUG_NIR,
  55           "Dump NIR during program compile" },
  56         { "tgsi",     VC4_DEBUG_TGSI,
  57           "Dump TGSI during program compile" },
  58         { "shaderdb", VC4_DEBUG_SHADERDB,
  59           "Dump program compile information for shader-db analysis" },
  60         { "perf",     VC4_DEBUG_PERF,
  61           "Print during performance-related events" },
  62         { "norast",   VC4_DEBUG_NORAST,
  63           "Skip actual hardware execution of commands" },
  64         { "always_flush", VC4_DEBUG_ALWAYS_FLUSH,
  65           "Flush after each draw call" },
  66         { "always_sync", VC4_DEBUG_ALWAYS_SYNC,
  67           "Wait for finish after each flush" },
  68 #ifdef USE_VC4_SIMULATOR
  69         { "dump", VC4_DEBUG_DUMP,
  70           "Write a GPU command stream trace file" },
  71 #endif
  72         { NULL }
  73 };
  74
  75 DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
  76 uint32_t vc4_debug;
  77
  78 static const char *
  79 vc4_screen_get_name(struct pipe_screen *pscreen)
  80 {
  81         struct vc4_screen *screen = vc4_screen(pscreen);
  82
  83         if (!screen->name) {
  84                 screen->name = ralloc_asprintf(screen,
  85                                                "VC4 V3D %d.%d",
  86                                                screen->v3d_ver / 10,
  87                                                screen->v3d_ver % 10);
  88         }
  89
  90         return screen->name;
  91 }
  92
  93 static const char *
  94 vc4_screen_get_vendor(struct pipe_screen *pscreen)
  95 {
  96         return "Broadcom";
  97 }
  98
  99 static void
 100 vc4_screen_destroy(struct pipe_screen *pscreen)
 101 {
 102         struct vc4_screen *screen = vc4_screen(pscreen);
 103
 104         util_hash_table_destroy(screen->bo_handles);
 105         vc4_bufmgr_destroy(pscreen);
 106         slab_destroy_parent(&screen->transfer_pool);
 107         free(screen->ro);
 108
 109 #ifdef USE_VC4_SIMULATOR
 110         vc4_simulator_destroy(screen);
 111 #endif
 112
 113         close(screen->fd);
 114         ralloc_free(pscreen);
 115 }
 116
 117 static bool
 118 vc4_has_feature(struct vc4_screen *screen, uint32_t feature)
 119 {
 120         struct drm_vc4_get_param p = {
 121                 .param = feature,
 122         };
 123         int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &p);
 124
 125         if (ret != 0)
 126                 return false;
 127
 128         return p.value;
 129 }
 130
 131 static int
 132 vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 133 {
 134         struct vc4_screen *screen = vc4_screen(pscreen);
 135
 136         switch (param) {
 137                 /* Supported features (boolean caps). */
 138         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 139         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 140         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 141         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 142         case PIPE_CAP_NPOT_TEXTURES:
 143         case PIPE_CAP_SHAREABLE_SHADERS:
 144         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 145         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 146         case PIPE_CAP_TEXTURE_SWIZZLE:
 147         case PIPE_CAP_TEXTURE_BARRIER:
 148                 return 1;
 149
 150         case PIPE_CAP_NATIVE_FENCE_FD:
 151                 return screen->has_syncobj;
 152
 153         case PIPE_CAP_TILE_RASTER_ORDER:
 154                 return vc4_has_feature(screen,
 155                                        DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER);
 156
 157                 /* lying for GL 2.0 */
 158         case PIPE_CAP_OCCLUSION_QUERY:
 159         case PIPE_CAP_POINT_SPRITE:
 160                 return 1;
 161
 162         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 163         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 164                 return 1;
 165
 166         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 167         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 168                 return 1;
 169
 170                 /* Texturing. */
 171         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 172         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 173                 return VC4_MAX_MIP_LEVELS;
 174         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 175                 /* Note: Not supported in hardware, just faking it. */
 176                 return 5;
 177
 178         case PIPE_CAP_VENDOR_ID:
 179                 return 0x14E4;
 180         case PIPE_CAP_ACCELERATED:
 181                 return 1;
 182         case PIPE_CAP_VIDEO_MEMORY: {
 183                 uint64_t system_memory;
 184
 185                 if (!os_get_total_physical_memory(&system_memory))
 186                         return 0;
 187
 188                 return (int)(system_memory >> 20);
 189         }
 190         case PIPE_CAP_UMA:
 191                 return 1;
 192
 193         default:
 194                 return u_pipe_screen_get_param_defaults(pscreen, param);
 195         }
 196 }
 197
 198 static float
 199 vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 200 {
 201         switch (param) {
 202         case PIPE_CAPF_MAX_LINE_WIDTH:
 203         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 204                 return 32;
 205
 206         case PIPE_CAPF_MAX_POINT_WIDTH:
 207         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 208                 return 512.0f;
 209
 210         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 211                 return 0.0f;
 212         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 213                 return 0.0f;
 214
 215         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 216         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 217         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 218                 return 0.0f;
 219         default:
 220                 fprintf(stderr, "unknown paramf %d\n", param);
 221                 return 0;
 222         }
 223 }
 224
 225 static int
 226 vc4_screen_get_shader_param(struct pipe_screen *pscreen,
 227                             enum pipe_shader_type shader,
 228                             enum pipe_shader_cap param)
 229 {
 230         if (shader != PIPE_SHADER_VERTEX &&
 231             shader != PIPE_SHADER_FRAGMENT) {
 232                 return 0;
 233         }
 234
 235         /* this is probably not totally correct.. but it's a start: */
 236         switch (param) {
 237         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 238         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 239         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 240         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 241                 return 16384;
 242
 243         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 244                 return vc4_screen(pscreen)->has_control_flow;
 245
 246         case PIPE_SHADER_CAP_MAX_INPUTS:
 247                 return 8;
 248         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 249                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 250         case PIPE_SHADER_CAP_MAX_TEMPS:
 251                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 252         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 253                 return 16 * 1024 * sizeof(float);
 254         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 255                 return 1;
 256         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 257                 return 0;
 258         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 259         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 260         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 261                 return 0;
 262         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 263                 return 1;
 264         case PIPE_SHADER_CAP_SUBROUTINES:
 265                 return 0;
 266         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 267                 return 0;
 268         case PIPE_SHADER_CAP_INTEGERS:
 269                 return 1;
 270         case PIPE_SHADER_CAP_INT64_ATOMICS:
 271         case PIPE_SHADER_CAP_FP16:
 272         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 273         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 274         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 275         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 276         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 277                 return 0;
 278         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 279         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 280                 return VC4_MAX_TEXTURE_SAMPLERS;
 281         case PIPE_SHADER_CAP_PREFERRED_IR:
 282                 return PIPE_SHADER_IR_NIR;
 283         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 284                 return 0;
 285         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 286                 return 32;
 287         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 288         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 289         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 290         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 291         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 292         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 293                 return 0;
 294         case PIPE_SHADER_CAP_SCALAR_ISA:
 295                 return 1;
 296         default:
 297                 fprintf(stderr, "unknown shader param %d\n", param);
 298                 return 0;
 299         }
 300         return 0;
 301 }
 302
 303 static boolean
 304 vc4_screen_is_format_supported(struct pipe_screen *pscreen,
 305                                enum pipe_format format,
 306                                enum pipe_texture_target target,
 307                                unsigned sample_count,
 308                                unsigned storage_sample_count,
 309                                unsigned usage)
 310 {
 311         struct vc4_screen *screen = vc4_screen(pscreen);
 312
 313         if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 314                 return false;
 315
 316         if (sample_count > 1 && sample_count != VC4_MAX_SAMPLES)
 317                 return FALSE;
 318
 319         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 320                 return FALSE;
 321         }
 322
 323         if (usage & PIPE_BIND_VERTEX_BUFFER) {
 324                 switch (format) {
 325                 case PIPE_FORMAT_R32G32B32A32_FLOAT:
 326                 case PIPE_FORMAT_R32G32B32_FLOAT:
 327                 case PIPE_FORMAT_R32G32_FLOAT:
 328                 case PIPE_FORMAT_R32_FLOAT:
 329                 case PIPE_FORMAT_R32G32B32A32_SNORM:
 330                 case PIPE_FORMAT_R32G32B32_SNORM:
 331                 case PIPE_FORMAT_R32G32_SNORM:
 332                 case PIPE_FORMAT_R32_SNORM:
 333                 case PIPE_FORMAT_R32G32B32A32_SSCALED:
 334                 case PIPE_FORMAT_R32G32B32_SSCALED:
 335                 case PIPE_FORMAT_R32G32_SSCALED:
 336                 case PIPE_FORMAT_R32_SSCALED:
 337                 case PIPE_FORMAT_R16G16B16A16_UNORM:
 338                 case PIPE_FORMAT_R16G16B16_UNORM:
 339                 case PIPE_FORMAT_R16G16_UNORM:
 340                 case PIPE_FORMAT_R16_UNORM:
 341                 case PIPE_FORMAT_R16G16B16A16_SNORM:
 342                 case PIPE_FORMAT_R16G16B16_SNORM:
 343                 case PIPE_FORMAT_R16G16_SNORM:
 344                 case PIPE_FORMAT_R16_SNORM:
 345                 case PIPE_FORMAT_R16G16B16A16_USCALED:
 346                 case PIPE_FORMAT_R16G16B16_USCALED:
 347                 case PIPE_FORMAT_R16G16_USCALED:
 348                 case PIPE_FORMAT_R16_USCALED:
 349                 case PIPE_FORMAT_R16G16B16A16_SSCALED:
 350                 case PIPE_FORMAT_R16G16B16_SSCALED:
 351                 case PIPE_FORMAT_R16G16_SSCALED:
 352                 case PIPE_FORMAT_R16_SSCALED:
 353                 case PIPE_FORMAT_R8G8B8A8_UNORM:
 354                 case PIPE_FORMAT_R8G8B8_UNORM:
 355                 case PIPE_FORMAT_R8G8_UNORM:
 356                 case PIPE_FORMAT_R8_UNORM:
 357                 case PIPE_FORMAT_R8G8B8A8_SNORM:
 358                 case PIPE_FORMAT_R8G8B8_SNORM:
 359                 case PIPE_FORMAT_R8G8_SNORM:
 360                 case PIPE_FORMAT_R8_SNORM:
 361                 case PIPE_FORMAT_R8G8B8A8_USCALED:
 362                 case PIPE_FORMAT_R8G8B8_USCALED:
 363                 case PIPE_FORMAT_R8G8_USCALED:
 364                 case PIPE_FORMAT_R8_USCALED:
 365                 case PIPE_FORMAT_R8G8B8A8_SSCALED:
 366                 case PIPE_FORMAT_R8G8B8_SSCALED:
 367                 case PIPE_FORMAT_R8G8_SSCALED:
 368                 case PIPE_FORMAT_R8_SSCALED:
 369                         break;
 370                 default:
 371                         return FALSE;
 372                 }
 373         }
 374
 375         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 376             !vc4_rt_format_supported(format)) {
 377                 return FALSE;
 378         }
 379
 380         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 381             (!vc4_tex_format_supported(format) ||
 382              (format == PIPE_FORMAT_ETC1_RGB8 && !screen->has_etc1))) {
 383                 return FALSE;
 384         }
 385
 386         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 387             format != PIPE_FORMAT_S8_UINT_Z24_UNORM &&
 388             format != PIPE_FORMAT_X8Z24_UNORM) {
 389                 return FALSE;
 390         }
 391
 392         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 393             format != PIPE_FORMAT_I8_UINT &&
 394             format != PIPE_FORMAT_I16_UINT) {
 395                 return FALSE;
 396         }
 397
 398         return TRUE;
 399 }
 400
 401 static void
 402 vc4_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
 403                                   enum pipe_format format, int max,
 404                                   uint64_t *modifiers,
 405                                   unsigned int *external_only,
 406                                   int *count)
 407 {
 408         int m, i;
 409         uint64_t available_modifiers[] = {
 410                 DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
 411                 DRM_FORMAT_MOD_LINEAR,
 412         };
 413         struct vc4_screen *screen = vc4_screen(pscreen);
 414         int num_modifiers = screen->has_tiling_ioctl ? 2 : 1;
 415
 416         if (!modifiers) {
 417                 *count = num_modifiers;
 418                 return;
 419         }
 420
 421         *count = MIN2(max, num_modifiers);
 422         m = screen->has_tiling_ioctl ? 0 : 1;
 423         /* We support both modifiers (tiled and linear) for all sampler
 424          * formats, but if we don't have the DRM_VC4_GET_TILING ioctl
 425          * we shouldn't advertise the tiled formats.
 426          */
 427         for (i = 0; i < *count; i++) {
 428                 modifiers[i] = available_modifiers[m++];
 429                 if (external_only)
 430                         external_only[i] = false;
 431        }
 432 }
 433
 434 #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
 435
 436 static unsigned handle_hash(void *key)
 437 {
 438     return PTR_TO_UINT(key);
 439 }
 440
 441 static int handle_compare(void *key1, void *key2)
 442 {
 443     return PTR_TO_UINT(key1) != PTR_TO_UINT(key2);
 444 }
 445
 446 static bool
 447 vc4_get_chip_info(struct vc4_screen *screen)
 448 {
 449         struct drm_vc4_get_param ident0 = {
 450                 .param = DRM_VC4_PARAM_V3D_IDENT0,
 451         };
 452         struct drm_vc4_get_param ident1 = {
 453                 .param = DRM_VC4_PARAM_V3D_IDENT1,
 454         };
 455         int ret;
 456
 457         ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident0);
 458         if (ret != 0) {
 459                 if (errno == EINVAL) {
 460                         /* Backwards compatibility with 2835 kernels which
 461                          * only do V3D 2.1.
 462                          */
 463                         screen->v3d_ver = 21;
 464                         return true;
 465                 } else {
 466                         fprintf(stderr, "Couldn't get V3D IDENT0: %s\n",
 467                                 strerror(errno));
 468                         return false;
 469                 }
 470         }
 471         ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_PARAM, &ident1);
 472         if (ret != 0) {
 473                 fprintf(stderr, "Couldn't get V3D IDENT1: %s\n",
 474                         strerror(errno));
 475                 return false;
 476         }
 477
 478         uint32_t major = (ident0.value >> 24) & 0xff;
 479         uint32_t minor = (ident1.value >> 0) & 0xf;
 480         screen->v3d_ver = major * 10 + minor;
 481
 482         if (screen->v3d_ver != 21 && screen->v3d_ver != 26) {
 483                 fprintf(stderr,
 484                         "V3D %d.%d not supported by this version of Mesa.\n",
 485                         screen->v3d_ver / 10,
 486                         screen->v3d_ver % 10);
 487                 return false;
 488         }
 489
 490         return true;
 491 }
 492
 493 struct pipe_screen *
 494 vc4_screen_create(int fd, struct renderonly *ro)
 495 {
 496         struct vc4_screen *screen = rzalloc(NULL, struct vc4_screen);
 497         uint64_t syncobj_cap = 0;
 498         struct pipe_screen *pscreen;
 499         int err;
 500
 501         pscreen = &screen->base;
 502
 503         pscreen->destroy = vc4_screen_destroy;
 504         pscreen->get_param = vc4_screen_get_param;
 505         pscreen->get_paramf = vc4_screen_get_paramf;
 506         pscreen->get_shader_param = vc4_screen_get_shader_param;
 507         pscreen->context_create = vc4_context_create;
 508         pscreen->is_format_supported = vc4_screen_is_format_supported;
 509
 510         screen->fd = fd;
 511         if (ro) {
 512                 screen->ro = renderonly_dup(ro);
 513                 if (!screen->ro) {
 514                         fprintf(stderr, "Failed to dup renderonly object\n");
 515                         ralloc_free(screen);
 516                         return NULL;
 517                 }
 518         }
 519
 520         list_inithead(&screen->bo_cache.time_list);
 521         (void) mtx_init(&screen->bo_handles_mutex, mtx_plain);
 522         screen->bo_handles = util_hash_table_create(handle_hash, handle_compare);
 523
 524         screen->has_control_flow =
 525                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_BRANCHES);
 526         screen->has_etc1 =
 527                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_ETC1);
 528         screen->has_threaded_fs =
 529                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_THREADED_FS);
 530         screen->has_madvise =
 531                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_MADVISE);
 532         screen->has_perfmon_ioctl =
 533                 vc4_has_feature(screen, DRM_VC4_PARAM_SUPPORTS_PERFMON);
 534
 535         err = drmGetCap(fd, DRM_CAP_SYNCOBJ, &syncobj_cap);
 536         if (err == 0 && syncobj_cap)
 537                 screen->has_syncobj = true;
 538
 539         if (!vc4_get_chip_info(screen))
 540                 goto fail;
 541
 542         util_cpu_detect();
 543
 544         slab_create_parent(&screen->transfer_pool, sizeof(struct vc4_transfer), 16);
 545
 546         vc4_fence_screen_init(screen);
 547
 548         vc4_debug = debug_get_option_vc4_debug();
 549         if (vc4_debug & VC4_DEBUG_SHADERDB)
 550                 vc4_debug |= VC4_DEBUG_NORAST;
 551
 552 #ifdef USE_VC4_SIMULATOR
 553         vc4_simulator_init(screen);
 554 #endif
 555
 556         vc4_resource_screen_init(pscreen);
 557
 558         pscreen->get_name = vc4_screen_get_name;
 559         pscreen->get_vendor = vc4_screen_get_vendor;
 560         pscreen->get_device_vendor = vc4_screen_get_vendor;
 561         pscreen->get_compiler_options = vc4_screen_get_compiler_options;
 562         pscreen->query_dmabuf_modifiers = vc4_screen_query_dmabuf_modifiers;
 563
 564         if (screen->has_perfmon_ioctl) {
 565                 pscreen->get_driver_query_group_info = vc4_get_driver_query_group_info;
 566                 pscreen->get_driver_query_info = vc4_get_driver_query_info;
 567         }
 568
 569         return pscreen;
 570
 571 fail:
 572         close(fd);
 573         ralloc_free(pscreen);
 574         return NULL;
 575 }