src/gallium/drivers/virgl/virgl_screen.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include "util/u_memory.h"
  24 #include "util/format/u_format.h"
  25 #include "util/format/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_video.h"
  28 #include "util/u_math.h"
  29 #include "util/os_time.h"
  30 #include "util/xmlconfig.h"
  31 #include "pipe/p_defines.h"
  32 #include "pipe/p_screen.h"
  33
  34 #include "tgsi/tgsi_exec.h"
  35
  36 #include "virgl_screen.h"
  37 #include "virgl_resource.h"
  38 #include "virgl_public.h"
  39 #include "virgl_context.h"
  40 #include "virgl_protocol.h"
  41
  42 int virgl_debug = 0;
  43 static const struct debug_named_value debug_options[] = {
  44    { "verbose",   VIRGL_DEBUG_VERBOSE,             NULL },
  45    { "tgsi",      VIRGL_DEBUG_TGSI,                NULL },
  46    { "emubgra",   VIRGL_DEBUG_EMULATE_BGRA,        "Enable tweak to emulate BGRA as RGBA on GLES hosts"},
  47    { "bgraswz",   VIRGL_DEBUG_BGRA_DEST_SWIZZLE,   "Enable tweak to swizzle emulated BGRA on GLES hosts" },
  48    { "sync",      VIRGL_DEBUG_SYNC,                "Sync after every flush" },
  49    { "xfer",      VIRGL_DEBUG_XFER,                "Do not optimize for transfers" },
  50    DEBUG_NAMED_VALUE_END
  51 };
  52 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
  53
  54 static const char *
  55 virgl_get_vendor(struct pipe_screen *screen)
  56 {
  57    return "Red Hat";
  58 }
  59
  60
  61 static const char *
  62 virgl_get_name(struct pipe_screen *screen)
  63 {
  64    return "virgl";
  65 }
  66
  67 static int
  68 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
  69 {
  70    struct virgl_screen *vscreen = virgl_screen(screen);
  71    switch (param) {
  72    case PIPE_CAP_NPOT_TEXTURES:
  73       return 1;
  74    case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
  75    case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
  76    case PIPE_CAP_VERTEX_SHADER_SATURATE:
  77       return 1;
  78    case PIPE_CAP_ANISOTROPIC_FILTER:
  79       return 1;
  80    case PIPE_CAP_POINT_SPRITE:
  81       return 1;
  82    case PIPE_CAP_MAX_RENDER_TARGETS:
  83       return vscreen->caps.caps.v1.max_render_targets;
  84    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
  85       return vscreen->caps.caps.v1.max_dual_source_render_targets;
  86    case PIPE_CAP_OCCLUSION_QUERY:
  87       return vscreen->caps.caps.v1.bset.occlusion_query;
  88    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  89    case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
  90       return vscreen->caps.caps.v1.bset.mirror_clamp;
  91    case PIPE_CAP_TEXTURE_SWIZZLE:
  92       return 1;
  93    case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
  94       if (vscreen->caps.caps.v2.max_texture_2d_size)
  95          return vscreen->caps.caps.v2.max_texture_2d_size;
  96       return 16384;
  97    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  98       if (vscreen->caps.caps.v2.max_texture_3d_size)
  99          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
 100       return 9; /* 256 x 256 x 256 */
 101    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 102       if (vscreen->caps.caps.v2.max_texture_cube_size)
 103          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
 104       return 13; /* 4K x 4K */
 105    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106       return 1;
 107    case PIPE_CAP_INDEP_BLEND_ENABLE:
 108       return vscreen->caps.caps.v1.bset.indep_blend_enable;
 109    case PIPE_CAP_INDEP_BLEND_FUNC:
 110       return vscreen->caps.caps.v1.bset.indep_blend_func;
 111    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 112    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 113    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 114       return 1;
 115    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 116       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
 117    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 118       if (vscreen->caps.caps.v1.bset.depth_clip_disable)
 119          return 1;
 120       if (vscreen->caps.caps.v2.host_feature_check_version >= 3)
 121          return 2;
 122       return 0;
 123    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 124       return vscreen->caps.caps.v1.max_streamout_buffers;
 125    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 126    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 127       return 16*4;
 128    case PIPE_CAP_PRIMITIVE_RESTART:
 129       return vscreen->caps.caps.v1.bset.primitive_restart;
 130    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 131       return vscreen->caps.caps.v1.bset.shader_stencil_export;
 132    case PIPE_CAP_TGSI_INSTANCEID:
 133    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 134       return 1;
 135    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 136       return vscreen->caps.caps.v1.bset.seamless_cube_map;
 137    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 138       return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
 139    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 140       return vscreen->caps.caps.v1.max_texture_array_layers;
 141    case PIPE_CAP_MIN_TEXEL_OFFSET:
 142       return vscreen->caps.caps.v2.min_texel_offset;
 143    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 144       return vscreen->caps.caps.v2.min_texture_gather_offset;
 145    case PIPE_CAP_MAX_TEXEL_OFFSET:
 146       return vscreen->caps.caps.v2.max_texel_offset;
 147    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 148       return vscreen->caps.caps.v2.max_texture_gather_offset;
 149    case PIPE_CAP_CONDITIONAL_RENDER:
 150       return vscreen->caps.caps.v1.bset.conditional_render;
 151    case PIPE_CAP_TEXTURE_BARRIER:
 152       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
 153    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 154       return 1;
 155    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 156    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 157       return vscreen->caps.caps.v1.bset.color_clamping;
 158    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 159       return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS) ||
 160             (vscreen->caps.caps.v2.host_feature_check_version < 1);
 161    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 162       return vscreen->caps.caps.v1.glsl_level;
 163    case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 164       return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
 165    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 166    case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 167       return 0;
 168    case PIPE_CAP_COMPUTE:
 169       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
 170    case PIPE_CAP_USER_VERTEX_BUFFERS:
 171       return 0;
 172    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 173       return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
 174    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 175    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 176       return vscreen->caps.caps.v1.bset.streamout_pause_resume;
 177    case PIPE_CAP_START_INSTANCE:
 178       return vscreen->caps.caps.v1.bset.start_instance;
 179    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 180    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 181    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 182    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 183    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 184       return 0;
 185    case PIPE_CAP_QUERY_TIMESTAMP:
 186       return 1;
 187    case PIPE_CAP_QUERY_TIME_ELAPSED:
 188       return 1;
 189    case PIPE_CAP_TGSI_TEXCOORD:
 190       return 0;
 191    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 192       return VIRGL_MAP_BUFFER_ALIGNMENT;
 193    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 194       return vscreen->caps.caps.v1.max_tbo_size > 0;
 195    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 196       return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
 197    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 198       return 0;
 199    case PIPE_CAP_CUBE_MAP_ARRAY:
 200       return vscreen->caps.caps.v1.bset.cube_map_array;
 201    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 202       return vscreen->caps.caps.v1.bset.texture_multisample;
 203    case PIPE_CAP_MAX_VIEWPORTS:
 204       return vscreen->caps.caps.v1.max_viewports;
 205    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 206       return vscreen->caps.caps.v1.max_tbo_size;
 207    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 208    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 209    case PIPE_CAP_ENDIANNESS:
 210       return 0;
 211    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 212    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 213       return 1;
 214    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 215       return 0;
 216    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 217       return vscreen->caps.caps.v2.max_geom_output_vertices;
 218    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 219       return vscreen->caps.caps.v2.max_geom_total_output_components;
 220    case PIPE_CAP_TEXTURE_QUERY_LOD:
 221       return vscreen->caps.caps.v1.bset.texture_query_lod;
 222    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 223       return vscreen->caps.caps.v1.max_texture_gather_components;
 224    case PIPE_CAP_DRAW_INDIRECT:
 225       return vscreen->caps.caps.v1.bset.has_indirect_draw;
 226    case PIPE_CAP_SAMPLE_SHADING:
 227    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 228       return vscreen->caps.caps.v1.bset.has_sample_shading;
 229    case PIPE_CAP_CULL_DISTANCE:
 230       return vscreen->caps.caps.v1.bset.has_cull;
 231    case PIPE_CAP_MAX_VERTEX_STREAMS:
 232       return ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TRANSFORM_FEEDBACK3) ||
 233               (vscreen->caps.caps.v2.host_feature_check_version < 2)) ? 4 : 1;
 234    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 235       return vscreen->caps.caps.v1.bset.conditional_render_inverted;
 236    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 237       return vscreen->caps.caps.v1.bset.derivative_control;
 238    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 239       return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
 240    case PIPE_CAP_QUERY_SO_OVERFLOW:
 241       return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
 242    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 243       return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
 244    case PIPE_CAP_DOUBLES:
 245       return vscreen->caps.caps.v1.bset.has_fp64 ||
 246             (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64);
 247    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 248       return vscreen->caps.caps.v2.max_shader_patch_varyings;
 249    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 250       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
 251    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 252       return vscreen->caps.caps.v2.max_vertex_attrib_stride;
 253    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 254       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
 255    case PIPE_CAP_TGSI_TXQS:
 256       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
 257    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 258       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
 259    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 260       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
 261    case PIPE_CAP_FBFETCH:
 262       return (vscreen->caps.caps.v2.capability_bits &
 263               VIRGL_CAP_TGSI_FBFETCH) ? 1 : 0;
 264    case PIPE_CAP_TGSI_CLOCK:
 265       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
 266    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 267       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
 268    case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
 269       return vscreen->caps.caps.v2.max_combined_shader_buffers;
 270    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 271       return vscreen->caps.caps.v2.max_combined_atomic_counters;
 272    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 273       return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
 274    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 275    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 276       return 1; /* TODO: need to introduce a hw-cap for this */
 277    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 278       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
 279    case PIPE_CAP_MAX_VARYINGS:
 280       if (vscreen->caps.caps.v1.glsl_level < 150)
 281          return vscreen->caps.caps.v2.max_vertex_attribs;
 282       return 32;
 283    case PIPE_CAP_FAKE_SW_MSAA:
 284       /* If the host supports only one sample (e.g., if it is using softpipe),
 285        * fake multisampling to able to advertise higher GL versions. */
 286       return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
 287    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 288       return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT);
 289    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 290       return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_PARAMS);
 291    case PIPE_CAP_TEXTURE_GATHER_SM5:
 292    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 293    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 294    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 295    case PIPE_CAP_VERTEXID_NOBASE:
 296    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 297    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 298    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 299    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 300    case PIPE_CAP_SHAREABLE_SHADERS:
 301    case PIPE_CAP_CLEAR_TEXTURE:
 302    case PIPE_CAP_DRAW_PARAMETERS:
 303    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 304    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 305    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 306    case PIPE_CAP_INVALIDATE_BUFFER:
 307    case PIPE_CAP_GENERATE_MIPMAP:
 308    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 309    case PIPE_CAP_STRING_MARKER:
 310    case PIPE_CAP_QUERY_MEMORY_INFO:
 311    case PIPE_CAP_PCI_GROUP:
 312    case PIPE_CAP_PCI_BUS:
 313    case PIPE_CAP_PCI_DEVICE:
 314    case PIPE_CAP_PCI_FUNCTION:
 315    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 316    case PIPE_CAP_TGSI_VOTE:
 317    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 318    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 319    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 320    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 321    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 322    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 323    case PIPE_CAP_INT64:
 324    case PIPE_CAP_INT64_DIVMOD:
 325    case PIPE_CAP_TGSI_TEX_TXF_LZ:
 326    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 327    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 328    case PIPE_CAP_TGSI_BALLOT:
 329    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 330    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 331    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 332    case PIPE_CAP_POST_DEPTH_COVERAGE:
 333    case PIPE_CAP_BINDLESS_TEXTURE:
 334    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 335    case PIPE_CAP_MEMOBJ:
 336    case PIPE_CAP_LOAD_CONSTBUF:
 337    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 338    case PIPE_CAP_TILE_RASTER_ORDER:
 339    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 340    case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 341    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 342    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 343    case PIPE_CAP_FENCE_SIGNAL:
 344    case PIPE_CAP_CONSTBUF0_FLAGS:
 345    case PIPE_CAP_PACKED_UNIFORMS:
 346    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 347    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 348    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 349    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 350    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 351    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 352    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 353    case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 354       return 0;
 355    case PIPE_CAP_CLIP_HALFZ:
 356       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLIP_HALFZ;
 357    case PIPE_CAP_MAX_GS_INVOCATIONS:
 358       return 32;
 359    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 360       return 1 << 27;
 361    case PIPE_CAP_VENDOR_ID:
 362       return 0x1af4;
 363    case PIPE_CAP_DEVICE_ID:
 364       return 0x1010;
 365    case PIPE_CAP_ACCELERATED:
 366       return 1;
 367    case PIPE_CAP_UMA:
 368    case PIPE_CAP_VIDEO_MEMORY:
 369       return 0;
 370    case PIPE_CAP_NATIVE_FENCE_FD:
 371       return vscreen->vws->supports_fences;
 372    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
 373       return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL) ||
 374             (vscreen->caps.caps.v2.host_feature_check_version < 1);
 375    case PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS:
 376       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
 377    default:
 378       return u_pipe_screen_get_param_defaults(screen, param);
 379    }
 380 }
 381
 382 static int
 383 virgl_get_shader_param(struct pipe_screen *screen,
 384                        enum pipe_shader_type shader,
 385                        enum pipe_shader_cap param)
 386 {
 387    struct virgl_screen *vscreen = virgl_screen(screen);
 388
 389    if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
 390        !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
 391       return 0;
 392
 393    if (shader == PIPE_SHADER_COMPUTE &&
 394        !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 395      return 0;
 396
 397    switch(shader)
 398    {
 399    case PIPE_SHADER_FRAGMENT:
 400    case PIPE_SHADER_VERTEX:
 401    case PIPE_SHADER_GEOMETRY:
 402    case PIPE_SHADER_TESS_CTRL:
 403    case PIPE_SHADER_TESS_EVAL:
 404    case PIPE_SHADER_COMPUTE:
 405       switch (param) {
 406       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 407       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 408       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 409       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 410          return INT_MAX;
 411       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 412       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 413       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 414          return 1;
 415       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 416       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 417          return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
 418       case PIPE_SHADER_CAP_MAX_INPUTS:
 419          if (vscreen->caps.caps.v1.glsl_level < 150)
 420             return vscreen->caps.caps.v2.max_vertex_attribs;
 421          return (shader == PIPE_SHADER_VERTEX ||
 422                  shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
 423       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 424          if (shader == PIPE_SHADER_FRAGMENT)
 425             return vscreen->caps.caps.v1.max_render_targets;
 426          return vscreen->caps.caps.v2.max_vertex_outputs;
 427      // case PIPE_SHADER_CAP_MAX_CONSTS:
 428      //    return 4096;
 429       case PIPE_SHADER_CAP_MAX_TEMPS:
 430          return 256;
 431       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 432          return vscreen->caps.caps.v1.max_uniform_blocks;
 433     //  case PIPE_SHADER_CAP_MAX_ADDRS:
 434      //    return 1;
 435       case PIPE_SHADER_CAP_SUBROUTINES:
 436          return 1;
 437       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 438             return 16;
 439       case PIPE_SHADER_CAP_INTEGERS:
 440          return vscreen->caps.caps.v1.glsl_level >= 130;
 441       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 442          return 32;
 443       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 444          return 4096 * sizeof(float[4]);
 445       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 446          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 447             return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
 448          else
 449             return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
 450       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 451          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 452             return vscreen->caps.caps.v2.max_shader_image_frag_compute;
 453          else
 454             return vscreen->caps.caps.v2.max_shader_image_other_stages;
 455       case PIPE_SHADER_CAP_SUPPORTED_IRS:
 456          return (1 << PIPE_SHADER_IR_TGSI);
 457       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 458          return vscreen->caps.caps.v2.max_atomic_counters[shader];
 459       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 460          return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
 461       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 462       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 463       case PIPE_SHADER_CAP_INT64_ATOMICS:
 464       case PIPE_SHADER_CAP_FP16:
 465          return 0;
 466       default:
 467          return 0;
 468       }
 469    default:
 470       return 0;
 471    }
 472 }
 473
 474 static float
 475 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 476 {
 477    struct virgl_screen *vscreen = virgl_screen(screen);
 478    switch (param) {
 479    case PIPE_CAPF_MAX_LINE_WIDTH:
 480       return vscreen->caps.caps.v2.max_aliased_line_width;
 481    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 482       return vscreen->caps.caps.v2.max_smooth_line_width;
 483    case PIPE_CAPF_MAX_POINT_WIDTH:
 484       return vscreen->caps.caps.v2.max_aliased_point_size;
 485    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 486       return vscreen->caps.caps.v2.max_smooth_point_size;
 487    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 488       return 16.0;
 489    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 490       return vscreen->caps.caps.v2.max_texture_lod_bias;
 491    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 492    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 493    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 494       return 0.0f;
 495    }
 496    /* should only get here on unhandled cases */
 497    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 498    return 0.0;
 499 }
 500
 501 static int
 502 virgl_get_compute_param(struct pipe_screen *screen,
 503                         enum pipe_shader_ir ir_type,
 504                         enum pipe_compute_cap param,
 505                         void *ret)
 506 {
 507    struct virgl_screen *vscreen = virgl_screen(screen);
 508    if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 509       return 0;
 510    switch (param) {
 511    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 512       if (ret) {
 513          uint64_t *grid_size = ret;
 514          grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
 515          grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
 516          grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
 517       }
 518       return 3 * sizeof(uint64_t) ;
 519    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 520       if (ret) {
 521          uint64_t *block_size = ret;
 522          block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
 523          block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
 524          block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
 525       }
 526       return 3 * sizeof(uint64_t);
 527    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 528       if (ret) {
 529          uint64_t *max_threads_per_block = ret;
 530          *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
 531       }
 532       return sizeof(uint64_t);
 533    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 534       if (ret) {
 535          uint64_t *max_local_size = ret;
 536          /* Value reported by the closed source driver. */
 537          *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
 538       }
 539       return sizeof(uint64_t);
 540    default:
 541       break;
 542    }
 543    return 0;
 544 }
 545
 546 static bool
 547 has_format_bit(struct virgl_supported_format_mask *mask,
 548                enum virgl_formats fmt)
 549 {
 550    assert(fmt < VIRGL_FORMAT_MAX);
 551    unsigned val = (unsigned)fmt;
 552    unsigned idx = val / 32;
 553    unsigned bit = val % 32;
 554    assert(idx < ARRAY_SIZE(mask->bitmask));
 555    return (mask->bitmask[idx] & (1u << bit)) != 0;
 556 }
 557
 558 bool
 559 virgl_has_readback_format(struct pipe_screen *screen,
 560                           enum virgl_formats fmt)
 561 {
 562    struct virgl_screen *vscreen = virgl_screen(screen);
 563    return has_format_bit(&vscreen->caps.caps.v2.supported_readback_formats,
 564                          fmt);
 565 }
 566
 567 static bool
 568 virgl_is_vertex_format_supported(struct pipe_screen *screen,
 569                                  enum pipe_format format)
 570 {
 571    struct virgl_screen *vscreen = virgl_screen(screen);
 572    const struct util_format_description *format_desc;
 573    int i;
 574
 575    format_desc = util_format_description(format);
 576    if (!format_desc)
 577       return false;
 578
 579    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 580       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
 581       int big = vformat / 32;
 582       int small = vformat % 32;
 583       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
 584          return false;
 585       return true;
 586    }
 587
 588    /* Find the first non-VOID channel. */
 589    for (i = 0; i < 4; i++) {
 590       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 591          break;
 592       }
 593    }
 594
 595    if (i == 4)
 596       return false;
 597
 598    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 599       return false;
 600
 601    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
 602       return false;
 603    return true;
 604 }
 605
 606 static bool
 607 virgl_format_check_bitmask(enum pipe_format format,
 608                            uint32_t bitmask[16],
 609                            bool may_emulate_bgra)
 610 {
 611    enum virgl_formats vformat = pipe_to_virgl_format(format);
 612    int big = vformat / 32;
 613    int small = vformat % 32;
 614    if ((bitmask[big] & (1 << small)))
 615       return true;
 616
 617    /* On GLES hosts we don't advertise BGRx_SRGB, but we may be able
 618     * emulate it by using a swizzled RGBx */
 619    if (may_emulate_bgra) {
 620       if (format == PIPE_FORMAT_B8G8R8A8_SRGB)
 621          format = PIPE_FORMAT_R8G8B8A8_SRGB;
 622       else if (format == PIPE_FORMAT_B8G8R8X8_SRGB)
 623          format = PIPE_FORMAT_R8G8B8X8_SRGB;
 624       else {
 625          return false;
 626       }
 627
 628       vformat = pipe_to_virgl_format(format);
 629       big = vformat / 32;
 630       small = vformat % 32;
 631       if (bitmask[big] & (1 << small))
 632          return true;
 633    }
 634    return false;
 635 }
 636
 637 /**
 638  * Query format support for creating a texture, drawing surface, etc.
 639  * \param format  the format to test
 640  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 641  */
 642 static bool
 643 virgl_is_format_supported( struct pipe_screen *screen,
 644                                  enum pipe_format format,
 645                                  enum pipe_texture_target target,
 646                                  unsigned sample_count,
 647                                  unsigned storage_sample_count,
 648                                  unsigned bind)
 649 {
 650    struct virgl_screen *vscreen = virgl_screen(screen);
 651    const struct util_format_description *format_desc;
 652    int i;
 653
 654    union virgl_caps *caps = &vscreen->caps.caps;
 655    boolean may_emulate_bgra = (caps->v2.capability_bits &
 656                                VIRGL_CAP_APP_TWEAK_SUPPORT) &&
 657                                vscreen->tweak_gles_emulate_bgra;
 658
 659    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 660       return false;
 661
 662    if (!util_is_power_of_two_or_zero(sample_count))
 663       return false;
 664
 665    assert(target == PIPE_BUFFER ||
 666           target == PIPE_TEXTURE_1D ||
 667           target == PIPE_TEXTURE_1D_ARRAY ||
 668           target == PIPE_TEXTURE_2D ||
 669           target == PIPE_TEXTURE_2D_ARRAY ||
 670           target == PIPE_TEXTURE_RECT ||
 671           target == PIPE_TEXTURE_3D ||
 672           target == PIPE_TEXTURE_CUBE ||
 673           target == PIPE_TEXTURE_CUBE_ARRAY);
 674
 675    format_desc = util_format_description(format);
 676    if (!format_desc)
 677       return false;
 678
 679    if (util_format_is_intensity(format))
 680       return false;
 681
 682    if (sample_count > 1) {
 683       if (!caps->v1.bset.texture_multisample)
 684          return false;
 685
 686       if (bind & PIPE_BIND_SHADER_IMAGE) {
 687          if (sample_count > caps->v2.max_image_samples)
 688             return false;
 689       }
 690
 691       if (sample_count > caps->v1.max_samples)
 692          return false;
 693    }
 694
 695    if (bind & PIPE_BIND_VERTEX_BUFFER) {
 696       return virgl_is_vertex_format_supported(screen, format);
 697    }
 698
 699    if (util_format_is_compressed(format) && target == PIPE_BUFFER)
 700       return false;
 701
 702    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
 703    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
 704        format == PIPE_FORMAT_R32G32B32_SINT ||
 705        format == PIPE_FORMAT_R32G32B32_UINT) &&
 706        target != PIPE_BUFFER)
 707       return false;
 708
 709    if ((format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC ||
 710         format_desc->layout == UTIL_FORMAT_LAYOUT_ETC ||
 711         format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) &&
 712        target == PIPE_TEXTURE_3D)
 713       return false;
 714
 715
 716    if (bind & PIPE_BIND_RENDER_TARGET) {
 717       /* For ARB_framebuffer_no_attachments. */
 718       if (format == PIPE_FORMAT_NONE)
 719          return TRUE;
 720
 721       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 722          return false;
 723
 724       /*
 725        * Although possible, it is unnatural to render into compressed or YUV
 726        * surfaces. So disable these here to avoid going into weird paths
 727        * inside the state trackers.
 728        */
 729       if (format_desc->block.width != 1 ||
 730           format_desc->block.height != 1)
 731          return false;
 732
 733       if (!virgl_format_check_bitmask(format,
 734                                       caps->v1.render.bitmask,
 735                                       may_emulate_bgra))
 736          return false;
 737    }
 738
 739    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 740       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 741          return false;
 742    }
 743
 744    if (bind & PIPE_BIND_SCANOUT) {
 745       if (!virgl_format_check_bitmask(format, caps->v2.scanout.bitmask, false))
 746          return false;
 747    }
 748
 749    /*
 750     * All other operations (sampling, transfer, etc).
 751     */
 752
 753    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 754       goto out_lookup;
 755    }
 756    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
 757       goto out_lookup;
 758    }
 759    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
 760       goto out_lookup;
 761    }
 762
 763    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 764       goto out_lookup;
 765    } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
 766       goto out_lookup;
 767    }
 768
 769    /* Find the first non-VOID channel. */
 770    for (i = 0; i < 4; i++) {
 771       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 772          break;
 773       }
 774    }
 775
 776    if (i == 4)
 777       return false;
 778
 779    /* no L4A4 */
 780    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
 781       return false;
 782
 783  out_lookup:
 784    return virgl_format_check_bitmask(format,
 785                                      caps->v1.sampler.bitmask,
 786                                      may_emulate_bgra);
 787 }
 788
 789 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
 790                                       struct pipe_resource *res,
 791                                       unsigned level, unsigned layer,
 792                                     void *winsys_drawable_handle, struct pipe_box *sub_box)
 793 {
 794    struct virgl_screen *vscreen = virgl_screen(screen);
 795    struct virgl_winsys *vws = vscreen->vws;
 796    struct virgl_resource *vres = virgl_resource(res);
 797
 798    if (vws->flush_frontbuffer)
 799       vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
 800                              sub_box);
 801 }
 802
 803 static void virgl_fence_reference(struct pipe_screen *screen,
 804                                   struct pipe_fence_handle **ptr,
 805                                   struct pipe_fence_handle *fence)
 806 {
 807    struct virgl_screen *vscreen = virgl_screen(screen);
 808    struct virgl_winsys *vws = vscreen->vws;
 809
 810    vws->fence_reference(vws, ptr, fence);
 811 }
 812
 813 static bool virgl_fence_finish(struct pipe_screen *screen,
 814                                struct pipe_context *ctx,
 815                                struct pipe_fence_handle *fence,
 816                                uint64_t timeout)
 817 {
 818    struct virgl_screen *vscreen = virgl_screen(screen);
 819    struct virgl_winsys *vws = vscreen->vws;
 820
 821    return vws->fence_wait(vws, fence, timeout);
 822 }
 823
 824 static int virgl_fence_get_fd(struct pipe_screen *screen,
 825             struct pipe_fence_handle *fence)
 826 {
 827    struct virgl_screen *vscreen = virgl_screen(screen);
 828    struct virgl_winsys *vws = vscreen->vws;
 829
 830    return vws->fence_get_fd(vws, fence);
 831 }
 832
 833 static uint64_t
 834 virgl_get_timestamp(struct pipe_screen *_screen)
 835 {
 836    return os_time_get_nano();
 837 }
 838
 839 static void
 840 virgl_destroy_screen(struct pipe_screen *screen)
 841 {
 842    struct virgl_screen *vscreen = virgl_screen(screen);
 843    struct virgl_winsys *vws = vscreen->vws;
 844
 845    slab_destroy_parent(&vscreen->transfer_pool);
 846
 847    if (vws)
 848       vws->destroy(vws);
 849    FREE(vscreen);
 850 }
 851
 852 static void
 853 fixup_formats(union virgl_caps *caps, struct virgl_supported_format_mask *mask)
 854 {
 855    const size_t size = ARRAY_SIZE(mask->bitmask);
 856    for (int i = 0; i < size; ++i) {
 857       if (mask->bitmask[i] != 0)
 858          return; /* we got some formats, we definately have a new protocol */
 859    }
 860
 861    /* old protocol used; fall back to considering all sampleable formats valid
 862     * readback-formats
 863     */
 864    for (int i = 0; i < size; ++i)
 865       mask->bitmask[i] = caps->v1.sampler.bitmask[i];
 866 }
 867
 868 struct pipe_screen *
 869 virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *config)
 870 {
 871    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 872
 873    const char *VIRGL_GLES_EMULATE_BGRA = "gles_emulate_bgra";
 874    const char *VIRGL_GLES_APPLY_BGRA_DEST_SWIZZLE = "gles_apply_bgra_dest_swizzle";
 875    const char *VIRGL_GLES_SAMPLES_PASSED_VALUE = "gles_samples_passed_value";
 876
 877    if (!screen)
 878       return NULL;
 879
 880    virgl_debug = debug_get_option_virgl_debug();
 881
 882    if (config && config->options) {
 883       screen->tweak_gles_emulate_bgra =
 884             driQueryOptionb(config->options, VIRGL_GLES_EMULATE_BGRA);
 885       screen->tweak_gles_apply_bgra_dest_swizzle =
 886             driQueryOptionb(config->options, VIRGL_GLES_APPLY_BGRA_DEST_SWIZZLE);
 887       screen->tweak_gles_tf3_value =
 888             driQueryOptioni(config->options, VIRGL_GLES_SAMPLES_PASSED_VALUE);
 889    }
 890
 891    screen->tweak_gles_emulate_bgra |= !!(virgl_debug & VIRGL_DEBUG_EMULATE_BGRA);
 892    screen->tweak_gles_apply_bgra_dest_swizzle |= !!(virgl_debug & VIRGL_DEBUG_BGRA_DEST_SWIZZLE);
 893
 894    screen->vws = vws;
 895    screen->base.get_name = virgl_get_name;
 896    screen->base.get_vendor = virgl_get_vendor;
 897    screen->base.get_param = virgl_get_param;
 898    screen->base.get_shader_param = virgl_get_shader_param;
 899    screen->base.get_compute_param = virgl_get_compute_param;
 900    screen->base.get_paramf = virgl_get_paramf;
 901    screen->base.is_format_supported = virgl_is_format_supported;
 902    screen->base.destroy = virgl_destroy_screen;
 903    screen->base.context_create = virgl_context_create;
 904    screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
 905    screen->base.get_timestamp = virgl_get_timestamp;
 906    screen->base.fence_reference = virgl_fence_reference;
 907    //screen->base.fence_signalled = virgl_fence_signalled;
 908    screen->base.fence_finish = virgl_fence_finish;
 909    screen->base.fence_get_fd = virgl_fence_get_fd;
 910
 911    virgl_init_screen_resource_functions(&screen->base);
 912
 913    vws->get_caps(vws, &screen->caps);
 914    fixup_formats(&screen->caps.caps,
 915                  &screen->caps.caps.v2.supported_readback_formats);
 916    fixup_formats(&screen->caps.caps, &screen->caps.caps.v2.scanout);
 917
 918    screen->refcnt = 1;
 919
 920    slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
 921
 922    return &screen->base;
 923 }