src/gallium/drivers/zink/zink_context.c

   1 /*
   2  * Copyright 2018 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "zink_context.h"
  25
  26 #include "zink_batch.h"
  27 #include "zink_compiler.h"
  28 #include "zink_fence.h"
  29 #include "zink_framebuffer.h"
  30 #include "zink_helpers.h"
  31 #include "zink_program.h"
  32 #include "zink_pipeline.h"
  33 #include "zink_query.h"
  34 #include "zink_render_pass.h"
  35 #include "zink_resource.h"
  36 #include "zink_screen.h"
  37 #include "zink_state.h"
  38 #include "zink_surface.h"
  39
  40 #include "indices/u_primconvert.h"
  41 #include "util/u_blitter.h"
  42 #include "util/u_debug.h"
  43 #include "util/format/u_format.h"
  44 #include "util/u_framebuffer.h"
  45 #include "util/u_helpers.h"
  46 #include "util/u_inlines.h"
  47
  48 #include "nir.h"
  49
  50 #include "util/u_memory.h"
  51 #include "util/u_upload_mgr.h"
  52
  53 static void
  54 zink_context_destroy(struct pipe_context *pctx)
  55 {
  56    struct zink_context *ctx = zink_context(pctx);
  57    struct zink_screen *screen = zink_screen(pctx->screen);
  58
  59    if (vkQueueWaitIdle(ctx->queue) != VK_SUCCESS)
  60       debug_printf("vkQueueWaitIdle failed\n");
  61
  62    for (unsigned i = 0; i < ARRAY_SIZE(ctx->null_buffers); i++)
  63       pipe_resource_reference(&ctx->null_buffers[i], NULL);
  64
  65    for (int i = 0; i < ARRAY_SIZE(ctx->batches); ++i) {
  66       vkDestroyDescriptorPool(screen->dev, ctx->batches[i].descpool, NULL);
  67       vkFreeCommandBuffers(screen->dev, ctx->cmdpool, 1, &ctx->batches[i].cmdbuf);
  68    }
  69    vkDestroyCommandPool(screen->dev, ctx->cmdpool, NULL);
  70
  71    util_primconvert_destroy(ctx->primconvert);
  72    u_upload_destroy(pctx->stream_uploader);
  73    slab_destroy_child(&ctx->transfer_pool);
  74    util_blitter_destroy(ctx->blitter);
  75    FREE(ctx);
  76 }
  77
  78 static VkSamplerMipmapMode
  79 sampler_mipmap_mode(enum pipe_tex_mipfilter filter)
  80 {
  81    switch (filter) {
  82    case PIPE_TEX_MIPFILTER_NEAREST: return VK_SAMPLER_MIPMAP_MODE_NEAREST;
  83    case PIPE_TEX_MIPFILTER_LINEAR: return VK_SAMPLER_MIPMAP_MODE_LINEAR;
  84    case PIPE_TEX_MIPFILTER_NONE:
  85       unreachable("PIPE_TEX_MIPFILTER_NONE should be dealt with earlier");
  86    }
  87    unreachable("unexpected filter");
  88 }
  89
  90 static VkSamplerAddressMode
  91 sampler_address_mode(enum pipe_tex_wrap filter)
  92 {
  93    switch (filter) {
  94    case PIPE_TEX_WRAP_REPEAT: return VK_SAMPLER_ADDRESS_MODE_REPEAT;
  95    case PIPE_TEX_WRAP_CLAMP: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE; /* not technically correct, but kinda works */
  96    case PIPE_TEX_WRAP_CLAMP_TO_EDGE: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE;
  97    case PIPE_TEX_WRAP_CLAMP_TO_BORDER: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER;
  98    case PIPE_TEX_WRAP_MIRROR_REPEAT: return VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT;
  99    case PIPE_TEX_WRAP_MIRROR_CLAMP: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE; /* not technically correct, but kinda works */
 100    case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE;
 101    case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE; /* not technically correct, but kinda works */
 102    }
 103    unreachable("unexpected wrap");
 104 }
 105
 106 static VkCompareOp
 107 compare_op(enum pipe_compare_func op)
 108 {
 109    switch (op) {
 110       case PIPE_FUNC_NEVER: return VK_COMPARE_OP_NEVER;
 111       case PIPE_FUNC_LESS: return VK_COMPARE_OP_LESS;
 112       case PIPE_FUNC_EQUAL: return VK_COMPARE_OP_EQUAL;
 113       case PIPE_FUNC_LEQUAL: return VK_COMPARE_OP_LESS_OR_EQUAL;
 114       case PIPE_FUNC_GREATER: return VK_COMPARE_OP_GREATER;
 115       case PIPE_FUNC_NOTEQUAL: return VK_COMPARE_OP_NOT_EQUAL;
 116       case PIPE_FUNC_GEQUAL: return VK_COMPARE_OP_GREATER_OR_EQUAL;
 117       case PIPE_FUNC_ALWAYS: return VK_COMPARE_OP_ALWAYS;
 118    }
 119    unreachable("unexpected compare");
 120 }
 121
 122 static void *
 123 zink_create_sampler_state(struct pipe_context *pctx,
 124                           const struct pipe_sampler_state *state)
 125 {
 126    struct zink_screen *screen = zink_screen(pctx->screen);
 127
 128    VkSamplerCreateInfo sci = {};
 129    sci.sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO;
 130    sci.magFilter = zink_filter(state->mag_img_filter);
 131    sci.minFilter = zink_filter(state->min_img_filter);
 132
 133    if (state->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
 134       sci.mipmapMode = sampler_mipmap_mode(state->min_mip_filter);
 135       sci.minLod = state->min_lod;
 136       sci.maxLod = state->max_lod;
 137    } else {
 138       sci.mipmapMode = VK_SAMPLER_MIPMAP_MODE_NEAREST;
 139       sci.minLod = 0;
 140       sci.maxLod = 0;
 141    }
 142
 143    sci.addressModeU = sampler_address_mode(state->wrap_s);
 144    sci.addressModeV = sampler_address_mode(state->wrap_t);
 145    sci.addressModeW = sampler_address_mode(state->wrap_r);
 146    sci.mipLodBias = state->lod_bias;
 147
 148    if (state->compare_mode == PIPE_TEX_COMPARE_NONE)
 149       sci.compareOp = VK_COMPARE_OP_NEVER;
 150    else {
 151       sci.compareOp = compare_op(state->compare_func);
 152       sci.compareEnable = VK_TRUE;
 153    }
 154
 155    sci.borderColor = VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK; // TODO
 156    sci.unnormalizedCoordinates = !state->normalized_coords;
 157
 158    if (state->max_anisotropy > 1) {
 159       sci.maxAnisotropy = state->max_anisotropy;
 160       sci.anisotropyEnable = VK_TRUE;
 161    }
 162
 163    VkSampler *sampler = CALLOC(1, sizeof(VkSampler));
 164    if (!sampler)
 165       return NULL;
 166
 167    if (vkCreateSampler(screen->dev, &sci, NULL, sampler) != VK_SUCCESS) {
 168       FREE(sampler);
 169       return NULL;
 170    }
 171
 172    return sampler;
 173 }
 174
 175 static void
 176 zink_bind_sampler_states(struct pipe_context *pctx,
 177                          enum pipe_shader_type shader,
 178                          unsigned start_slot,
 179                          unsigned num_samplers,
 180                          void **samplers)
 181 {
 182    struct zink_context *ctx = zink_context(pctx);
 183    for (unsigned i = 0; i < num_samplers; ++i) {
 184       VkSampler *sampler = samplers[i];
 185       ctx->sampler_states[shader][start_slot + i] = sampler;
 186       ctx->samplers[shader][start_slot + i] = sampler ? *sampler : VK_NULL_HANDLE;
 187    }
 188    ctx->num_samplers[shader] = start_slot + num_samplers;
 189 }
 190
 191 static void
 192 zink_delete_sampler_state(struct pipe_context *pctx,
 193                           void *sampler_state)
 194 {
 195    struct zink_batch *batch = zink_curr_batch(zink_context(pctx));
 196    util_dynarray_append(&batch->zombie_samplers, VkSampler,
 197                         *(VkSampler *)sampler_state);
 198    FREE(sampler_state);
 199 }
 200
 201
 202 static VkImageViewType
 203 image_view_type(enum pipe_texture_target target)
 204 {
 205    switch (target) {
 206    case PIPE_TEXTURE_1D: return VK_IMAGE_VIEW_TYPE_1D;
 207    case PIPE_TEXTURE_1D_ARRAY: return VK_IMAGE_VIEW_TYPE_1D_ARRAY;
 208    case PIPE_TEXTURE_2D: return VK_IMAGE_VIEW_TYPE_2D;
 209    case PIPE_TEXTURE_2D_ARRAY: return VK_IMAGE_VIEW_TYPE_2D_ARRAY;
 210    case PIPE_TEXTURE_CUBE: return VK_IMAGE_VIEW_TYPE_CUBE;
 211    case PIPE_TEXTURE_CUBE_ARRAY: return VK_IMAGE_VIEW_TYPE_CUBE_ARRAY;
 212    case PIPE_TEXTURE_3D: return VK_IMAGE_VIEW_TYPE_3D;
 213    case PIPE_TEXTURE_RECT: return VK_IMAGE_VIEW_TYPE_2D;
 214    default:
 215       unreachable("unexpected target");
 216    }
 217 }
 218
 219 static VkComponentSwizzle
 220 component_mapping(enum pipe_swizzle swizzle)
 221 {
 222    switch (swizzle) {
 223    case PIPE_SWIZZLE_X: return VK_COMPONENT_SWIZZLE_R;
 224    case PIPE_SWIZZLE_Y: return VK_COMPONENT_SWIZZLE_G;
 225    case PIPE_SWIZZLE_Z: return VK_COMPONENT_SWIZZLE_B;
 226    case PIPE_SWIZZLE_W: return VK_COMPONENT_SWIZZLE_A;
 227    case PIPE_SWIZZLE_0: return VK_COMPONENT_SWIZZLE_ZERO;
 228    case PIPE_SWIZZLE_1: return VK_COMPONENT_SWIZZLE_ONE;
 229    case PIPE_SWIZZLE_NONE: return VK_COMPONENT_SWIZZLE_IDENTITY; // ???
 230    default:
 231       unreachable("unexpected swizzle");
 232    }
 233 }
 234
 235 static VkImageAspectFlags
 236 sampler_aspect_from_format(enum pipe_format fmt)
 237 {
 238    if (util_format_is_depth_or_stencil(fmt)) {
 239       const struct util_format_description *desc = util_format_description(fmt);
 240       if (util_format_has_depth(desc))
 241          return VK_IMAGE_ASPECT_DEPTH_BIT;
 242       assert(util_format_has_stencil(desc));
 243       return VK_IMAGE_ASPECT_STENCIL_BIT;
 244    } else
 245      return VK_IMAGE_ASPECT_COLOR_BIT;
 246 }
 247
 248 static struct pipe_sampler_view *
 249 zink_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *pres,
 250                          const struct pipe_sampler_view *state)
 251 {
 252    struct zink_screen *screen = zink_screen(pctx->screen);
 253    struct zink_resource *res = zink_resource(pres);
 254    struct zink_sampler_view *sampler_view = CALLOC_STRUCT(zink_sampler_view);
 255
 256    sampler_view->base = *state;
 257    sampler_view->base.texture = NULL;
 258    pipe_resource_reference(&sampler_view->base.texture, pres);
 259    sampler_view->base.reference.count = 1;
 260    sampler_view->base.context = pctx;
 261
 262    VkImageViewCreateInfo ivci = {};
 263    ivci.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO;
 264    ivci.image = res->image;
 265    ivci.viewType = image_view_type(state->target);
 266    ivci.format = zink_get_format(screen, state->format);
 267    ivci.components.r = component_mapping(state->swizzle_r);
 268    ivci.components.g = component_mapping(state->swizzle_g);
 269    ivci.components.b = component_mapping(state->swizzle_b);
 270    ivci.components.a = component_mapping(state->swizzle_a);
 271
 272    ivci.subresourceRange.aspectMask = sampler_aspect_from_format(state->format);
 273    ivci.subresourceRange.baseMipLevel = state->u.tex.first_level;
 274    ivci.subresourceRange.baseArrayLayer = state->u.tex.first_layer;
 275    ivci.subresourceRange.levelCount = state->u.tex.last_level - state->u.tex.first_level + 1;
 276    ivci.subresourceRange.layerCount = state->u.tex.last_layer - state->u.tex.first_layer + 1;
 277
 278    VkResult err = vkCreateImageView(screen->dev, &ivci, NULL, &sampler_view->image_view);
 279    if (err != VK_SUCCESS) {
 280       FREE(sampler_view);
 281       return NULL;
 282    }
 283
 284    return &sampler_view->base;
 285 }
 286
 287 static void
 288 zink_sampler_view_destroy(struct pipe_context *pctx,
 289                           struct pipe_sampler_view *pview)
 290 {
 291    struct zink_sampler_view *view = zink_sampler_view(pview);
 292    vkDestroyImageView(zink_screen(pctx->screen)->dev, view->image_view, NULL);
 293    FREE(view);
 294 }
 295
 296 static void
 297 zink_set_polygon_stipple(struct pipe_context *pctx,
 298                          const struct pipe_poly_stipple *ps)
 299 {
 300 }
 301
 302 static void
 303 zink_set_vertex_buffers(struct pipe_context *pctx,
 304                         unsigned start_slot,
 305                         unsigned num_buffers,
 306                         const struct pipe_vertex_buffer *buffers)
 307 {
 308    struct zink_context *ctx = zink_context(pctx);
 309
 310    if (buffers) {
 311       for (int i = 0; i < num_buffers; ++i) {
 312          const struct pipe_vertex_buffer *vb = buffers + i;
 313          struct zink_resource *res = zink_resource(vb->buffer.resource);
 314
 315          ctx->gfx_pipeline_state.bindings[start_slot + i].stride = vb->stride;
 316          if (res && res->needs_xfb_barrier) {
 317             /* if we're binding a previously-used xfb buffer, we need cmd buffer synchronization to ensure
 318              * that we use the right buffer data
 319              */
 320             pctx->flush(pctx, NULL, 0);
 321             res->needs_xfb_barrier = false;
 322          }
 323       }
 324    }
 325
 326    util_set_vertex_buffers_mask(ctx->buffers, &ctx->buffers_enabled_mask,
 327                                 buffers, start_slot, num_buffers);
 328 }
 329
 330 static void
 331 zink_set_viewport_states(struct pipe_context *pctx,
 332                          unsigned start_slot,
 333                          unsigned num_viewports,
 334                          const struct pipe_viewport_state *state)
 335 {
 336    struct zink_context *ctx = zink_context(pctx);
 337
 338    for (unsigned i = 0; i < num_viewports; ++i) {
 339       VkViewport viewport = {
 340          state[i].translate[0] - state[i].scale[0],
 341          state[i].translate[1] - state[i].scale[1],
 342          state[i].scale[0] * 2,
 343          state[i].scale[1] * 2,
 344          state[i].translate[2] - state[i].scale[2],
 345          state[i].translate[2] + state[i].scale[2]
 346       };
 347       ctx->viewport_states[start_slot + i] = state[i];
 348       ctx->viewports[start_slot + i] = viewport;
 349    }
 350    ctx->num_viewports = start_slot + num_viewports;
 351 }
 352
 353 static void
 354 zink_set_scissor_states(struct pipe_context *pctx,
 355                         unsigned start_slot, unsigned num_scissors,
 356                         const struct pipe_scissor_state *states)
 357 {
 358    struct zink_context *ctx = zink_context(pctx);
 359
 360    for (unsigned i = 0; i < num_scissors; i++) {
 361       VkRect2D scissor;
 362
 363       scissor.offset.x = states[i].minx;
 364       scissor.offset.y = states[i].miny;
 365       scissor.extent.width = states[i].maxx - states[i].minx;
 366       scissor.extent.height = states[i].maxy - states[i].miny;
 367       ctx->scissor_states[start_slot + i] = states[i];
 368       ctx->scissors[start_slot + i] = scissor;
 369    }
 370 }
 371
 372 static void
 373 zink_set_constant_buffer(struct pipe_context *pctx,
 374                          enum pipe_shader_type shader, uint index,
 375                          const struct pipe_constant_buffer *cb)
 376 {
 377    struct zink_context *ctx = zink_context(pctx);
 378
 379    if (cb) {
 380       struct pipe_resource *buffer = cb->buffer;
 381       unsigned offset = cb->buffer_offset;
 382       if (cb->user_buffer) {
 383          struct zink_screen *screen = zink_screen(pctx->screen);
 384          u_upload_data(ctx->base.const_uploader, 0, cb->buffer_size,
 385                        screen->props.limits.minUniformBufferOffsetAlignment,
 386                        cb->user_buffer, &offset, &buffer);
 387       }
 388
 389       pipe_resource_reference(&ctx->ubos[shader][index].buffer, buffer);
 390       ctx->ubos[shader][index].buffer_offset = offset;
 391       ctx->ubos[shader][index].buffer_size = cb->buffer_size;
 392       ctx->ubos[shader][index].user_buffer = NULL;
 393
 394       if (cb->user_buffer)
 395          pipe_resource_reference(&buffer, NULL);
 396    } else {
 397       pipe_resource_reference(&ctx->ubos[shader][index].buffer, NULL);
 398       ctx->ubos[shader][index].buffer_offset = 0;
 399       ctx->ubos[shader][index].buffer_size = 0;
 400       ctx->ubos[shader][index].user_buffer = NULL;
 401    }
 402 }
 403
 404 static void
 405 zink_set_sampler_views(struct pipe_context *pctx,
 406                        enum pipe_shader_type shader_type,
 407                        unsigned start_slot,
 408                        unsigned num_views,
 409                        struct pipe_sampler_view **views)
 410 {
 411    struct zink_context *ctx = zink_context(pctx);
 412    assert(views);
 413    for (unsigned i = 0; i < num_views; ++i) {
 414       pipe_sampler_view_reference(
 415          &ctx->image_views[shader_type][start_slot + i],
 416          views[i]);
 417    }
 418    ctx->num_image_views[shader_type] = start_slot + num_views;
 419 }
 420
 421 static void
 422 zink_set_stencil_ref(struct pipe_context *pctx,
 423                      const struct pipe_stencil_ref *ref)
 424 {
 425    struct zink_context *ctx = zink_context(pctx);
 426    ctx->stencil_ref = *ref;
 427 }
 428
 429 static void
 430 zink_set_clip_state(struct pipe_context *pctx,
 431                     const struct pipe_clip_state *pcs)
 432 {
 433 }
 434
 435 static struct zink_render_pass *
 436 get_render_pass(struct zink_context *ctx)
 437 {
 438    struct zink_screen *screen = zink_screen(ctx->base.screen);
 439    const struct pipe_framebuffer_state *fb = &ctx->fb_state;
 440    struct zink_render_pass_state state = { 0 };
 441
 442    for (int i = 0; i < fb->nr_cbufs; i++) {
 443       struct pipe_surface *surf = fb->cbufs[i];
 444       if (surf) {
 445          state.rts[i].format = zink_get_format(screen, surf->format);
 446          state.rts[i].samples = surf->nr_samples > 0 ? surf->nr_samples :
 447                                                        VK_SAMPLE_COUNT_1_BIT;
 448       } else {
 449          state.rts[i].format = VK_FORMAT_R8_UINT;
 450          state.rts[i].samples = MAX2(fb->samples, 1);
 451       }
 452    }
 453    state.num_cbufs = fb->nr_cbufs;
 454
 455    if (fb->zsbuf) {
 456       struct zink_resource *zsbuf = zink_resource(fb->zsbuf->texture);
 457       state.rts[fb->nr_cbufs].format = zsbuf->format;
 458       state.rts[fb->nr_cbufs].samples = zsbuf->base.nr_samples > 0 ? zsbuf->base.nr_samples : VK_SAMPLE_COUNT_1_BIT;
 459    }
 460    state.have_zsbuf = fb->zsbuf != NULL;
 461
 462    struct hash_entry *entry = _mesa_hash_table_search(ctx->render_pass_cache,
 463                                                       &state);
 464    if (!entry) {
 465       struct zink_render_pass *rp;
 466       rp = zink_create_render_pass(screen, &state);
 467       entry = _mesa_hash_table_insert(ctx->render_pass_cache, &state, rp);
 468       if (!entry)
 469          return NULL;
 470    }
 471
 472    return entry->data;
 473 }
 474
 475 static struct zink_framebuffer *
 476 create_framebuffer(struct zink_context *ctx)
 477 {
 478    struct zink_screen *screen = zink_screen(ctx->base.screen);
 479
 480    struct zink_framebuffer_state state = {};
 481    state.rp = get_render_pass(ctx);
 482    for (int i = 0; i < ctx->fb_state.nr_cbufs; i++) {
 483       struct pipe_surface *psurf = ctx->fb_state.cbufs[i];
 484       state.attachments[i] = zink_surface(psurf);
 485       state.has_null_attachments |= !state.attachments[i];
 486    }
 487
 488    state.num_attachments = ctx->fb_state.nr_cbufs;
 489    if (ctx->fb_state.zsbuf) {
 490       struct pipe_surface *psurf = ctx->fb_state.zsbuf;
 491       state.attachments[state.num_attachments++] = zink_surface(psurf);
 492    }
 493
 494    state.width = ctx->fb_state.width;
 495    state.height = ctx->fb_state.height;
 496    state.layers = MAX2(ctx->fb_state.layers, 1);
 497    state.samples = ctx->fb_state.samples;
 498
 499    return zink_create_framebuffer(ctx, screen, &state);
 500 }
 501
 502 static void
 503 framebuffer_state_buffer_barriers_setup(struct zink_context *ctx,
 504                                         const struct pipe_framebuffer_state *state, struct zink_batch *batch)
 505 {
 506    for (int i = 0; i < state->nr_cbufs; i++) {
 507       struct pipe_surface *surf = state->cbufs[i];
 508       if (!surf)
 509          surf = ctx->framebuffer->null_surface;
 510       struct zink_resource *res = zink_resource(surf->texture);
 511       if (res->layout != VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL)
 512          zink_resource_barrier(batch->cmdbuf, res, res->aspect,
 513                                VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL);
 514    }
 515
 516    if (state->zsbuf) {
 517       struct zink_resource *res = zink_resource(state->zsbuf->texture);
 518       if (res->layout != VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL)
 519          zink_resource_barrier(batch->cmdbuf, res, res->aspect,
 520                                VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL);
 521    }
 522 }
 523
 524 void
 525 zink_begin_render_pass(struct zink_context *ctx, struct zink_batch *batch)
 526 {
 527    struct zink_screen *screen = zink_screen(ctx->base.screen);
 528    assert(batch == zink_curr_batch(ctx));
 529    assert(ctx->gfx_pipeline_state.render_pass);
 530
 531    struct pipe_framebuffer_state *fb_state = &ctx->fb_state;
 532
 533    VkRenderPassBeginInfo rpbi = {};
 534    rpbi.sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO;
 535    rpbi.renderPass = ctx->gfx_pipeline_state.render_pass->render_pass;
 536    rpbi.renderArea.offset.x = 0;
 537    rpbi.renderArea.offset.y = 0;
 538    rpbi.renderArea.extent.width = fb_state->width;
 539    rpbi.renderArea.extent.height = fb_state->height;
 540    rpbi.clearValueCount = 0;
 541    rpbi.pClearValues = NULL;
 542    rpbi.framebuffer = ctx->framebuffer->fb;
 543
 544    assert(ctx->gfx_pipeline_state.render_pass && ctx->framebuffer);
 545    assert(!batch->rp || batch->rp == ctx->gfx_pipeline_state.render_pass);
 546    assert(!batch->fb || batch->fb == ctx->framebuffer);
 547
 548    framebuffer_state_buffer_barriers_setup(ctx, fb_state, batch);
 549
 550    zink_render_pass_reference(screen, &batch->rp, ctx->gfx_pipeline_state.render_pass);
 551    zink_framebuffer_reference(screen, &batch->fb, ctx->framebuffer);
 552
 553    vkCmdBeginRenderPass(batch->cmdbuf, &rpbi, VK_SUBPASS_CONTENTS_INLINE);
 554 }
 555
 556 static void
 557 flush_batch(struct zink_context *ctx)
 558 {
 559    struct zink_batch *batch = zink_curr_batch(ctx);
 560    if (batch->rp)
 561       vkCmdEndRenderPass(batch->cmdbuf);
 562
 563    zink_end_batch(ctx, batch);
 564
 565    ctx->curr_batch++;
 566    if (ctx->curr_batch == ARRAY_SIZE(ctx->batches))
 567       ctx->curr_batch = 0;
 568
 569    zink_start_batch(ctx, zink_curr_batch(ctx));
 570 }
 571
 572 struct zink_batch *
 573 zink_batch_rp(struct zink_context *ctx)
 574 {
 575    struct zink_batch *batch = zink_curr_batch(ctx);
 576    if (!batch->rp) {
 577       zink_begin_render_pass(ctx, batch);
 578       assert(batch->rp);
 579    }
 580    return batch;
 581 }
 582
 583 struct zink_batch *
 584 zink_batch_no_rp(struct zink_context *ctx)
 585 {
 586    struct zink_batch *batch = zink_curr_batch(ctx);
 587    if (batch->rp) {
 588       /* flush batch and get a new one */
 589       flush_batch(ctx);
 590       batch = zink_curr_batch(ctx);
 591       assert(!batch->rp);
 592    }
 593    return batch;
 594 }
 595
 596 static void
 597 zink_set_framebuffer_state(struct pipe_context *pctx,
 598                            const struct pipe_framebuffer_state *state)
 599 {
 600    struct zink_context *ctx = zink_context(pctx);
 601    struct zink_screen *screen = zink_screen(pctx->screen);
 602
 603    util_copy_framebuffer_state(&ctx->fb_state, state);
 604
 605    struct zink_framebuffer *fb = ctx->framebuffer;
 606    /* explicitly unref previous fb to ensure it gets destroyed */
 607    if (fb)
 608       zink_framebuffer_reference(screen, &fb, NULL);
 609    fb = create_framebuffer(ctx);
 610    zink_framebuffer_reference(screen, &ctx->framebuffer, fb);
 611    zink_render_pass_reference(screen, &ctx->gfx_pipeline_state.render_pass, fb->rp);
 612
 613    ctx->gfx_pipeline_state.rast_samples = MAX2(state->samples, 1);
 614    ctx->gfx_pipeline_state.num_attachments = state->nr_cbufs;
 615
 616    struct zink_batch *batch = zink_batch_no_rp(ctx);
 617
 618    framebuffer_state_buffer_barriers_setup(ctx, state, batch);
 619 }
 620
 621 static void
 622 zink_set_blend_color(struct pipe_context *pctx,
 623                      const struct pipe_blend_color *color)
 624 {
 625    struct zink_context *ctx = zink_context(pctx);
 626    memcpy(ctx->blend_constants, color->color, sizeof(float) * 4);
 627 }
 628
 629 static void
 630 zink_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
 631 {
 632    struct zink_context *ctx = zink_context(pctx);
 633    ctx->gfx_pipeline_state.sample_mask = sample_mask;
 634 }
 635
 636 static VkAccessFlags
 637 access_src_flags(VkImageLayout layout)
 638 {
 639    switch (layout) {
 640    case VK_IMAGE_LAYOUT_UNDEFINED:
 641    case VK_IMAGE_LAYOUT_GENERAL:
 642       return 0;
 643
 644    case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
 645       return VK_ACCESS_COLOR_ATTACHMENT_READ_BIT;
 646    case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
 647       return VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT;
 648
 649    case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
 650       return VK_ACCESS_SHADER_READ_BIT;
 651
 652    case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
 653       return VK_ACCESS_TRANSFER_READ_BIT;
 654
 655    case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
 656       return VK_ACCESS_TRANSFER_WRITE_BIT;
 657
 658    case VK_IMAGE_LAYOUT_PREINITIALIZED:
 659       return VK_ACCESS_HOST_WRITE_BIT;
 660
 661    default:
 662       unreachable("unexpected layout");
 663    }
 664 }
 665
 666 static VkAccessFlags
 667 access_dst_flags(VkImageLayout layout)
 668 {
 669    switch (layout) {
 670    case VK_IMAGE_LAYOUT_UNDEFINED:
 671    case VK_IMAGE_LAYOUT_GENERAL:
 672       return 0;
 673
 674    case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
 675       return VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT;
 676    case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
 677       return VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
 678
 679    case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
 680       return VK_ACCESS_TRANSFER_READ_BIT;
 681
 682    case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
 683       return VK_ACCESS_TRANSFER_WRITE_BIT;
 684
 685    default:
 686       unreachable("unexpected layout");
 687    }
 688 }
 689
 690 static VkPipelineStageFlags
 691 pipeline_dst_stage(VkImageLayout layout)
 692 {
 693    switch (layout) {
 694    case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
 695       return VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT;
 696    case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
 697       return VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT;
 698
 699    case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
 700       return VK_PIPELINE_STAGE_TRANSFER_BIT;
 701    case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
 702       return VK_PIPELINE_STAGE_TRANSFER_BIT;
 703
 704    default:
 705       return VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT;
 706    }
 707 }
 708
 709 static VkPipelineStageFlags
 710 pipeline_src_stage(VkImageLayout layout)
 711 {
 712    switch (layout) {
 713    case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
 714       return VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT;
 715    case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
 716       return VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT;
 717
 718    case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
 719       return VK_PIPELINE_STAGE_TRANSFER_BIT;
 720    case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
 721       return VK_PIPELINE_STAGE_TRANSFER_BIT;
 722
 723    default:
 724       return VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT;
 725    }
 726 }
 727
 728
 729 void
 730 zink_resource_barrier(VkCommandBuffer cmdbuf, struct zink_resource *res,
 731                       VkImageAspectFlags aspect, VkImageLayout new_layout)
 732 {
 733    VkImageSubresourceRange isr = {
 734       aspect,
 735       0, VK_REMAINING_MIP_LEVELS,
 736       0, VK_REMAINING_ARRAY_LAYERS
 737    };
 738
 739    VkImageMemoryBarrier imb = {
 740       VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
 741       NULL,
 742       access_src_flags(res->layout),
 743       access_dst_flags(new_layout),
 744       res->layout,
 745       new_layout,
 746       VK_QUEUE_FAMILY_IGNORED,
 747       VK_QUEUE_FAMILY_IGNORED,
 748       res->image,
 749       isr
 750    };
 751    vkCmdPipelineBarrier(
 752       cmdbuf,
 753       pipeline_src_stage(res->layout),
 754       pipeline_dst_stage(new_layout),
 755       0,
 756       0, NULL,
 757       0, NULL,
 758       1, &imb
 759    );
 760
 761    res->layout = new_layout;
 762 }
 763
 764 static void
 765 zink_clear(struct pipe_context *pctx,
 766            unsigned buffers,
 767            const struct pipe_scissor_state *scissor_state,
 768            const union pipe_color_union *pcolor,
 769            double depth, unsigned stencil)
 770 {
 771    struct zink_context *ctx = zink_context(pctx);
 772    struct pipe_framebuffer_state *fb = &ctx->fb_state;
 773
 774    /* FIXME: this is very inefficient; if no renderpass has been started yet,
 775     * we should record the clear if it's full-screen, and apply it as we
 776     * start the render-pass. Otherwise we can do a partial out-of-renderpass
 777     * clear.
 778     */
 779    struct zink_batch *batch = zink_batch_rp(ctx);
 780
 781    VkClearAttachment attachments[1 + PIPE_MAX_COLOR_BUFS];
 782    int num_attachments = 0;
 783
 784    if (buffers & PIPE_CLEAR_COLOR) {
 785       VkClearColorValue color;
 786       color.float32[0] = pcolor->f[0];
 787       color.float32[1] = pcolor->f[1];
 788       color.float32[2] = pcolor->f[2];
 789       color.float32[3] = pcolor->f[3];
 790
 791       for (unsigned i = 0; i < fb->nr_cbufs; i++) {
 792          if (!(buffers & (PIPE_CLEAR_COLOR0 << i)) || !fb->cbufs[i])
 793             continue;
 794
 795          attachments[num_attachments].aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
 796          attachments[num_attachments].colorAttachment = i;
 797          attachments[num_attachments].clearValue.color = color;
 798          ++num_attachments;
 799       }
 800    }
 801
 802    if (buffers & PIPE_CLEAR_DEPTHSTENCIL && fb->zsbuf) {
 803       VkImageAspectFlags aspect = 0;
 804       if (buffers & PIPE_CLEAR_DEPTH)
 805          aspect |= VK_IMAGE_ASPECT_DEPTH_BIT;
 806       if (buffers & PIPE_CLEAR_STENCIL)
 807          aspect |= VK_IMAGE_ASPECT_STENCIL_BIT;
 808
 809       attachments[num_attachments].aspectMask = aspect;
 810       attachments[num_attachments].clearValue.depthStencil.depth = depth;
 811       attachments[num_attachments].clearValue.depthStencil.stencil = stencil;
 812       ++num_attachments;
 813    }
 814
 815    VkClearRect cr;
 816    cr.rect.offset.x = 0;
 817    cr.rect.offset.y = 0;
 818    cr.rect.extent.width = fb->width;
 819    cr.rect.extent.height = fb->height;
 820    cr.baseArrayLayer = 0;
 821    cr.layerCount = util_framebuffer_get_num_layers(fb);
 822    vkCmdClearAttachments(batch->cmdbuf, num_attachments, attachments, 1, &cr);
 823 }
 824
 825 VkShaderStageFlagBits
 826 zink_shader_stage(enum pipe_shader_type type)
 827 {
 828    VkShaderStageFlagBits stages[] = {
 829       [PIPE_SHADER_VERTEX] = VK_SHADER_STAGE_VERTEX_BIT,
 830       [PIPE_SHADER_FRAGMENT] = VK_SHADER_STAGE_FRAGMENT_BIT,
 831       [PIPE_SHADER_GEOMETRY] = VK_SHADER_STAGE_GEOMETRY_BIT,
 832       [PIPE_SHADER_TESS_CTRL] = VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
 833       [PIPE_SHADER_TESS_EVAL] = VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
 834       [PIPE_SHADER_COMPUTE] = VK_SHADER_STAGE_COMPUTE_BIT,
 835    };
 836    return stages[type];
 837 }
 838
 839 static uint32_t
 840 hash_gfx_program(const void *key)
 841 {
 842    return _mesa_hash_data(key, sizeof(struct zink_shader *) * (PIPE_SHADER_TYPES - 1));
 843 }
 844
 845 static bool
 846 equals_gfx_program(const void *a, const void *b)
 847 {
 848    return memcmp(a, b, sizeof(struct zink_shader *) * (PIPE_SHADER_TYPES - 1)) == 0;
 849 }
 850
 851 static uint32_t
 852 hash_render_pass_state(const void *key)
 853 {
 854    return _mesa_hash_data(key, sizeof(struct zink_render_pass_state));
 855 }
 856
 857 static bool
 858 equals_render_pass_state(const void *a, const void *b)
 859 {
 860    return memcmp(a, b, sizeof(struct zink_render_pass_state)) == 0;
 861 }
 862
 863 static void
 864 zink_flush(struct pipe_context *pctx,
 865            struct pipe_fence_handle **pfence,
 866            enum pipe_flush_flags flags)
 867 {
 868    struct zink_context *ctx = zink_context(pctx);
 869
 870    struct zink_batch *batch = zink_curr_batch(ctx);
 871    flush_batch(ctx);
 872
 873    if (zink_screen(pctx->screen)->have_EXT_transform_feedback && ctx->num_so_targets)
 874       ctx->dirty_so_targets = true;
 875
 876    if (pfence)
 877       zink_fence_reference(zink_screen(pctx->screen),
 878                            (struct zink_fence **)pfence,
 879                            batch->fence);
 880
 881    /* HACK:
 882     * For some strange reason, we need to finish before presenting, or else
 883     * we start rendering on top of the back-buffer for the next frame. This
 884     * seems like a bug in the DRI-driver to me, because we really should
 885     * be properly protected by fences here, and the back-buffer should
 886     * either be swapped with the front-buffer, or blitted from. But for
 887     * some strange reason, neither of these things happen.
 888     */
 889    if (flags & PIPE_FLUSH_END_OF_FRAME)
 890       pctx->screen->fence_finish(pctx->screen, pctx,
 891                                  (struct pipe_fence_handle *)batch->fence,
 892                                  PIPE_TIMEOUT_INFINITE);
 893 }
 894
 895 static void
 896 zink_flush_resource(struct pipe_context *pipe,
 897                     struct pipe_resource *resource)
 898 {
 899 }
 900
 901 static void
 902 zink_resource_copy_region(struct pipe_context *pctx,
 903                           struct pipe_resource *pdst,
 904                           unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
 905                           struct pipe_resource *psrc,
 906                           unsigned src_level, const struct pipe_box *src_box)
 907 {
 908    struct zink_resource *dst = zink_resource(pdst);
 909    struct zink_resource *src = zink_resource(psrc);
 910    struct zink_context *ctx = zink_context(pctx);
 911    if (dst->base.target != PIPE_BUFFER && src->base.target != PIPE_BUFFER) {
 912       VkImageCopy region = {};
 913
 914       region.srcSubresource.aspectMask = src->aspect;
 915       region.srcSubresource.mipLevel = src_level;
 916       region.srcSubresource.layerCount = 1;
 917       if (src->base.array_size > 1) {
 918          region.srcSubresource.baseArrayLayer = src_box->z;
 919          region.srcSubresource.layerCount = src_box->depth;
 920          region.extent.depth = 1;
 921       } else {
 922          region.srcOffset.z = src_box->z;
 923          region.srcSubresource.layerCount = 1;
 924          region.extent.depth = src_box->depth;
 925       }
 926
 927       region.srcOffset.x = src_box->x;
 928       region.srcOffset.y = src_box->y;
 929
 930       region.dstSubresource.aspectMask = dst->aspect;
 931       region.dstSubresource.mipLevel = dst_level;
 932       if (dst->base.array_size > 1) {
 933          region.dstSubresource.baseArrayLayer = dstz;
 934          region.dstSubresource.layerCount = src_box->depth;
 935       } else {
 936          region.dstOffset.z = dstz;
 937          region.dstSubresource.layerCount = 1;
 938       }
 939
 940       region.dstOffset.x = dstx;
 941       region.dstOffset.y = dsty;
 942       region.extent.width = src_box->width;
 943       region.extent.height = src_box->height;
 944
 945       struct zink_batch *batch = zink_batch_no_rp(ctx);
 946       zink_batch_reference_resoure(batch, src);
 947       zink_batch_reference_resoure(batch, dst);
 948
 949       if (src->layout != VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL) {
 950          zink_resource_barrier(batch->cmdbuf, src, src->aspect,
 951                                VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL);
 952       }
 953
 954       if (dst->layout != VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL) {
 955          zink_resource_barrier(batch->cmdbuf, dst, dst->aspect,
 956                                VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL);
 957       }
 958
 959       vkCmdCopyImage(batch->cmdbuf, src->image, src->layout,
 960                      dst->image, dst->layout,
 961                      1, &region);
 962    } else if (dst->base.target == PIPE_BUFFER &&
 963               src->base.target == PIPE_BUFFER) {
 964       VkBufferCopy region;
 965       region.srcOffset = src_box->x;
 966       region.dstOffset = dstx;
 967       region.size = src_box->width;
 968
 969       struct zink_batch *batch = zink_batch_no_rp(ctx);
 970       zink_batch_reference_resoure(batch, src);
 971       zink_batch_reference_resoure(batch, dst);
 972
 973       vkCmdCopyBuffer(batch->cmdbuf, src->buffer, dst->buffer, 1, &region);
 974    } else
 975       debug_printf("zink: TODO resource copy\n");
 976 }
 977
 978 static struct pipe_stream_output_target *
 979 zink_create_stream_output_target(struct pipe_context *pctx,
 980                                  struct pipe_resource *pres,
 981                                  unsigned buffer_offset,
 982                                  unsigned buffer_size)
 983 {
 984    struct zink_so_target *t;
 985    t = CALLOC_STRUCT(zink_so_target);
 986    if (!t)
 987       return NULL;
 988
 989    t->base.reference.count = 1;
 990    t->base.context = pctx;
 991    pipe_resource_reference(&t->base.buffer, pres);
 992    t->base.buffer_offset = buffer_offset;
 993    t->base.buffer_size = buffer_size;
 994
 995    /* using PIPE_BIND_CUSTOM here lets us create a custom pipe buffer resource,
 996     * which allows us to differentiate and use VK_BUFFER_USAGE_TRANSFORM_FEEDBACK_COUNTER_BUFFER_BIT_EXT
 997     * as we must for this case
 998     */
 999    t->counter_buffer = pipe_buffer_create(pctx->screen, PIPE_BIND_STREAM_OUTPUT | PIPE_BIND_CUSTOM, PIPE_USAGE_DEFAULT, 4);
1000    if (!t->counter_buffer) {
1001       FREE(t);
1002       return NULL;
1003    }
1004
1005    return &t->base;
1006 }
1007
1008 static void
1009 zink_stream_output_target_destroy(struct pipe_context *pctx,
1010                                   struct pipe_stream_output_target *psot)
1011 {
1012    struct zink_so_target *t = (struct zink_so_target *)psot;
1013    pipe_resource_reference(&t->counter_buffer, NULL);
1014    pipe_resource_reference(&t->base.buffer, NULL);
1015    FREE(t);
1016 }
1017
1018 static void
1019 zink_set_stream_output_targets(struct pipe_context *pctx,
1020                                unsigned num_targets,
1021                                struct pipe_stream_output_target **targets,
1022                                const unsigned *offsets)
1023 {
1024    struct zink_context *ctx = zink_context(pctx);
1025
1026    if (num_targets == 0) {
1027       for (unsigned i = 0; i < ctx->num_so_targets; i++)
1028          pipe_so_target_reference(&ctx->so_targets[i], NULL);
1029       ctx->num_so_targets = 0;
1030    } else {
1031       for (unsigned i = 0; i < num_targets; i++)
1032          pipe_so_target_reference(&ctx->so_targets[i], targets[i]);
1033       for (unsigned i = num_targets; i < ctx->num_so_targets; i++)
1034          pipe_so_target_reference(&ctx->so_targets[i], NULL);
1035       ctx->num_so_targets = num_targets;
1036
1037       /* emit memory barrier on next draw for synchronization */
1038       if (offsets[0] == (unsigned)-1)
1039          ctx->xfb_barrier = true;
1040       /* TODO: possibly avoid rebinding on resume if resuming from same buffers? */
1041       ctx->dirty_so_targets = true;
1042    }
1043 }
1044
1045 struct pipe_context *
1046 zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
1047 {
1048    struct zink_screen *screen = zink_screen(pscreen);
1049    struct zink_context *ctx = CALLOC_STRUCT(zink_context);
1050    if (!ctx)
1051       goto fail;
1052
1053    ctx->base.screen = pscreen;
1054    ctx->base.priv = priv;
1055
1056    ctx->base.destroy = zink_context_destroy;
1057
1058    zink_context_state_init(&ctx->base);
1059
1060    ctx->base.create_sampler_state = zink_create_sampler_state;
1061    ctx->base.bind_sampler_states = zink_bind_sampler_states;
1062    ctx->base.delete_sampler_state = zink_delete_sampler_state;
1063
1064    ctx->base.create_sampler_view = zink_create_sampler_view;
1065    ctx->base.set_sampler_views = zink_set_sampler_views;
1066    ctx->base.sampler_view_destroy = zink_sampler_view_destroy;
1067
1068    zink_program_init(ctx);
1069
1070    ctx->base.set_polygon_stipple = zink_set_polygon_stipple;
1071    ctx->base.set_vertex_buffers = zink_set_vertex_buffers;
1072    ctx->base.set_viewport_states = zink_set_viewport_states;
1073    ctx->base.set_scissor_states = zink_set_scissor_states;
1074    ctx->base.set_constant_buffer = zink_set_constant_buffer;
1075    ctx->base.set_framebuffer_state = zink_set_framebuffer_state;
1076    ctx->base.set_stencil_ref = zink_set_stencil_ref;
1077    ctx->base.set_clip_state = zink_set_clip_state;
1078    ctx->base.set_blend_color = zink_set_blend_color;
1079
1080    ctx->base.set_sample_mask = zink_set_sample_mask;
1081
1082    ctx->base.clear = zink_clear;
1083    ctx->base.draw_vbo = zink_draw_vbo;
1084    ctx->base.flush = zink_flush;
1085
1086    ctx->base.resource_copy_region = zink_resource_copy_region;
1087    ctx->base.blit = zink_blit;
1088    ctx->base.create_stream_output_target = zink_create_stream_output_target;
1089    ctx->base.stream_output_target_destroy = zink_stream_output_target_destroy;
1090
1091    ctx->base.set_stream_output_targets = zink_set_stream_output_targets;
1092    ctx->base.flush_resource = zink_flush_resource;
1093    zink_context_surface_init(&ctx->base);
1094    zink_context_resource_init(&ctx->base);
1095    zink_context_query_init(&ctx->base);
1096
1097    slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
1098
1099    ctx->base.stream_uploader = u_upload_create_default(&ctx->base);
1100    ctx->base.const_uploader = ctx->base.stream_uploader;
1101
1102    int prim_hwsupport = 1 << PIPE_PRIM_POINTS |
1103                         1 << PIPE_PRIM_LINES |
1104                         1 << PIPE_PRIM_LINE_STRIP |
1105                         1 << PIPE_PRIM_TRIANGLES |
1106                         1 << PIPE_PRIM_TRIANGLE_STRIP |
1107                         1 << PIPE_PRIM_TRIANGLE_FAN;
1108
1109    ctx->primconvert = util_primconvert_create(&ctx->base, prim_hwsupport);
1110    if (!ctx->primconvert)
1111       goto fail;
1112
1113    ctx->blitter = util_blitter_create(&ctx->base);
1114    if (!ctx->blitter)
1115       goto fail;
1116
1117    VkCommandPoolCreateInfo cpci = {};
1118    cpci.sType = VK_STRUCTURE_TYPE_COMMAND_POOL_CREATE_INFO;
1119    cpci.queueFamilyIndex = screen->gfx_queue;
1120    cpci.flags = VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT;
1121    if (vkCreateCommandPool(screen->dev, &cpci, NULL, &ctx->cmdpool) != VK_SUCCESS)
1122       goto fail;
1123
1124    VkCommandBufferAllocateInfo cbai = {};
1125    cbai.sType = VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO;
1126    cbai.commandPool = ctx->cmdpool;
1127    cbai.level = VK_COMMAND_BUFFER_LEVEL_PRIMARY;
1128    cbai.commandBufferCount = 1;
1129
1130    VkDescriptorPoolSize sizes[] = {
1131       {VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER,         ZINK_BATCH_DESC_SIZE},
1132       {VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER, ZINK_BATCH_DESC_SIZE}
1133    };
1134    VkDescriptorPoolCreateInfo dpci = {};
1135    dpci.sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO;
1136    dpci.pPoolSizes = sizes;
1137    dpci.poolSizeCount = ARRAY_SIZE(sizes);
1138    dpci.flags = VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT;
1139    dpci.maxSets = ZINK_BATCH_DESC_SIZE;
1140
1141    for (int i = 0; i < ARRAY_SIZE(ctx->batches); ++i) {
1142       if (vkAllocateCommandBuffers(screen->dev, &cbai, &ctx->batches[i].cmdbuf) != VK_SUCCESS)
1143          goto fail;
1144
1145       ctx->batches[i].resources = _mesa_set_create(NULL, _mesa_hash_pointer,
1146                                                    _mesa_key_pointer_equal);
1147       ctx->batches[i].sampler_views = _mesa_set_create(NULL,
1148                                                        _mesa_hash_pointer,
1149                                                        _mesa_key_pointer_equal);
1150
1151       if (!ctx->batches[i].resources || !ctx->batches[i].sampler_views)
1152          goto fail;
1153
1154       util_dynarray_init(&ctx->batches[i].zombie_samplers, NULL);
1155
1156       if (vkCreateDescriptorPool(screen->dev, &dpci, 0,
1157                                  &ctx->batches[i].descpool) != VK_SUCCESS)
1158          goto fail;
1159    }
1160
1161    vkGetDeviceQueue(screen->dev, screen->gfx_queue, 0, &ctx->queue);
1162
1163    ctx->program_cache = _mesa_hash_table_create(NULL,
1164                                                 hash_gfx_program,
1165                                                 equals_gfx_program);
1166    ctx->render_pass_cache = _mesa_hash_table_create(NULL,
1167                                                     hash_render_pass_state,
1168                                                     equals_render_pass_state);
1169    if (!ctx->program_cache || !ctx->render_pass_cache)
1170       goto fail;
1171
1172    const uint8_t data[] = { 0 };
1173    ctx->dummy_buffer = pipe_buffer_create_with_data(&ctx->base,
1174       PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_IMMUTABLE, sizeof(data), data);
1175    if (!ctx->dummy_buffer)
1176       goto fail;
1177
1178    ctx->dirty_program = true;
1179
1180    /* start the first batch */
1181    zink_start_batch(ctx, zink_curr_batch(ctx));
1182
1183    return &ctx->base;
1184
1185 fail:
1186    if (ctx) {
1187       vkDestroyCommandPool(screen->dev, ctx->cmdpool, NULL);
1188       FREE(ctx);
1189    }
1190    return NULL;
1191 }