src/gallium/frontends/clover/core/device.cpp

   1 //
   2 // Copyright 2012 Francisco Jerez
   3 //
   4 // Permission is hereby granted, free of charge, to any person obtaining a
   5 // copy of this software and associated documentation files (the "Software"),
   6 // to deal in the Software without restriction, including without limitation
   7 // the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 // and/or sell copies of the Software, and to permit persons to whom the
   9 // Software is furnished to do so, subject to the following conditions:
  10 //
  11 // The above copyright notice and this permission notice shall be included in
  12 // all copies or substantial portions of the Software.
  13 //
  14 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 // THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 // OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 // ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 // OTHER DEALINGS IN THE SOFTWARE.
  21 //
  22
  23 #include <unistd.h>
  24 #include "core/device.hpp"
  25 #include "core/platform.hpp"
  26 #include "pipe/p_screen.h"
  27 #include "pipe/p_state.h"
  28 #include "util/bitscan.h"
  29 #include "util/u_debug.h"
  30
  31 using namespace clover;
  32
  33 namespace {
  34    template<typename T>
  35    std::vector<T>
  36    get_compute_param(pipe_screen *pipe, pipe_shader_ir ir_format,
  37                      pipe_compute_cap cap) {
  38       int sz = pipe->get_compute_param(pipe, ir_format, cap, NULL);
  39       std::vector<T> v(sz / sizeof(T));
  40
  41       pipe->get_compute_param(pipe, ir_format, cap, &v.front());
  42       return v;
  43    }
  44 }
  45
  46 device::device(clover::platform &platform, pipe_loader_device *ldev) :
  47    platform(platform), ldev(ldev) {
  48    pipe = pipe_loader_create_screen(ldev);
  49    if (pipe && pipe->get_param(pipe, PIPE_CAP_COMPUTE)) {
  50       if (supports_ir(PIPE_SHADER_IR_NATIVE))
  51          return;
  52 #ifdef HAVE_CLOVER_SPIRV
  53       if (supports_ir(PIPE_SHADER_IR_NIR_SERIALIZED))
  54          return;
  55 #endif
  56    }
  57    if (pipe)
  58       pipe->destroy(pipe);
  59    throw error(CL_INVALID_DEVICE);
  60 }
  61
  62 device::~device() {
  63    if (pipe)
  64       pipe->destroy(pipe);
  65    if (ldev)
  66       pipe_loader_release(&ldev, 1);
  67 }
  68
  69 bool
  70 device::operator==(const device &dev) const {
  71    return this == &dev;
  72 }
  73
  74 cl_device_type
  75 device::type() const {
  76    switch (ldev->type) {
  77    case PIPE_LOADER_DEVICE_SOFTWARE:
  78       return CL_DEVICE_TYPE_CPU;
  79    case PIPE_LOADER_DEVICE_PCI:
  80    case PIPE_LOADER_DEVICE_PLATFORM:
  81       return CL_DEVICE_TYPE_GPU;
  82    default:
  83       unreachable("Unknown device type.");
  84    }
  85 }
  86
  87 cl_uint
  88 device::vendor_id() const {
  89    switch (ldev->type) {
  90    case PIPE_LOADER_DEVICE_SOFTWARE:
  91    case PIPE_LOADER_DEVICE_PLATFORM:
  92       return 0;
  93    case PIPE_LOADER_DEVICE_PCI:
  94       return ldev->u.pci.vendor_id;
  95    default:
  96       unreachable("Unknown device type.");
  97    }
  98 }
  99
 100 size_t
 101 device::max_images_read() const {
 102    return PIPE_MAX_SHADER_IMAGES;
 103 }
 104
 105 size_t
 106 device::max_images_write() const {
 107    return PIPE_MAX_SHADER_IMAGES;
 108 }
 109
 110 size_t
 111 device::max_image_buffer_size() const {
 112    return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE);
 113 }
 114
 115 cl_uint
 116 device::max_image_levels_2d() const {
 117    return util_last_bit(pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_2D_SIZE));
 118 }
 119
 120 cl_uint
 121 device::max_image_levels_3d() const {
 122    return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_3D_LEVELS);
 123 }
 124
 125 size_t
 126 device::max_image_array_number() const {
 127    return pipe->get_param(pipe, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS);
 128 }
 129
 130 cl_uint
 131 device::max_samplers() const {
 132    return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
 133                                  PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
 134 }
 135
 136 cl_ulong
 137 device::max_mem_global() const {
 138    return get_compute_param<uint64_t>(pipe, ir_format(),
 139                                       PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE)[0];
 140 }
 141
 142 cl_ulong
 143 device::max_mem_local() const {
 144    return get_compute_param<uint64_t>(pipe, ir_format(),
 145                                       PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE)[0];
 146 }
 147
 148 cl_ulong
 149 device::max_mem_input() const {
 150    return get_compute_param<uint64_t>(pipe, ir_format(),
 151                                       PIPE_COMPUTE_CAP_MAX_INPUT_SIZE)[0];
 152 }
 153
 154 cl_ulong
 155 device::max_const_buffer_size() const {
 156    return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
 157                                  PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE);
 158 }
 159
 160 cl_uint
 161 device::max_const_buffers() const {
 162    return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
 163                                  PIPE_SHADER_CAP_MAX_CONST_BUFFERS);
 164 }
 165
 166 size_t
 167 device::max_threads_per_block() const {
 168    return get_compute_param<uint64_t>(
 169       pipe, ir_format(), PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK)[0];
 170 }
 171
 172 cl_ulong
 173 device::max_mem_alloc_size() const {
 174    return get_compute_param<uint64_t>(pipe, ir_format(),
 175                                       PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE)[0];
 176 }
 177
 178 cl_uint
 179 device::max_clock_frequency() const {
 180    return get_compute_param<uint32_t>(pipe, ir_format(),
 181                                       PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY)[0];
 182 }
 183
 184 cl_uint
 185 device::max_compute_units() const {
 186    return get_compute_param<uint32_t>(pipe, ir_format(),
 187                                       PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS)[0];
 188 }
 189
 190 bool
 191 device::image_support() const {
 192    return get_compute_param<uint32_t>(pipe, ir_format(),
 193                                       PIPE_COMPUTE_CAP_IMAGES_SUPPORTED)[0];
 194 }
 195
 196 bool
 197 device::has_doubles() const {
 198    return pipe->get_param(pipe, PIPE_CAP_DOUBLES);
 199 }
 200
 201 bool
 202 device::has_halves() const {
 203    return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
 204                                  PIPE_SHADER_CAP_FP16);
 205 }
 206
 207 bool
 208 device::has_int64_atomics() const {
 209    return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
 210                                  PIPE_SHADER_CAP_INT64_ATOMICS);
 211 }
 212
 213 bool
 214 device::has_unified_memory() const {
 215    return pipe->get_param(pipe, PIPE_CAP_UMA);
 216 }
 217
 218 cl_uint
 219 device::mem_base_addr_align() const {
 220    return sysconf(_SC_PAGESIZE);
 221 }
 222
 223 cl_device_svm_capabilities
 224 device::svm_support() const {
 225    // Without CAP_RESOURCE_FROM_USER_MEMORY SVM and CL_MEM_USE_HOST_PTR
 226    // interactions won't work according to spec as clover manages a GPU side
 227    // copy of the host data.
 228    //
 229    // The biggest problem are memory buffers created with CL_MEM_USE_HOST_PTR,
 230    // but the application and/or the kernel updates the memory via SVM and not
 231    // the cl_mem buffer.
 232    // We can't even do proper tracking on what memory might have been accessed
 233    // as the host ptr to the buffer could be within a SVM region, where through
 234    // the CL API there is no reliable way of knowing if a certain cl_mem buffer
 235    // was accessed by a kernel or not and the runtime can't reliably know from
 236    // which side the GPU buffer content needs to be updated.
 237    //
 238    // Another unsolvable scenario is a cl_mem object passed by cl_mem reference
 239    // and SVM pointer into the same kernel at the same time.
 240    if (pipe->get_param(pipe, PIPE_CAP_RESOURCE_FROM_USER_MEMORY) &&
 241        pipe->get_param(pipe, PIPE_CAP_SYSTEM_SVM))
 242       // we can emulate all lower levels if we support fine grain system
 243       return CL_DEVICE_SVM_FINE_GRAIN_SYSTEM |
 244              CL_DEVICE_SVM_COARSE_GRAIN_BUFFER |
 245              CL_DEVICE_SVM_FINE_GRAIN_BUFFER;
 246    return 0;
 247 }
 248
 249 std::vector<size_t>
 250 device::max_block_size() const {
 251    auto v = get_compute_param<uint64_t>(pipe, ir_format(),
 252                                         PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE);
 253    return { v.begin(), v.end() };
 254 }
 255
 256 cl_uint
 257 device::subgroup_size() const {
 258    return get_compute_param<uint32_t>(pipe, ir_format(),
 259                                       PIPE_COMPUTE_CAP_SUBGROUP_SIZE)[0];
 260 }
 261
 262 cl_uint
 263 device::address_bits() const {
 264    return get_compute_param<uint32_t>(pipe, ir_format(),
 265                                       PIPE_COMPUTE_CAP_ADDRESS_BITS)[0];
 266 }
 267
 268 std::string
 269 device::device_name() const {
 270    return pipe->get_name(pipe);
 271 }
 272
 273 std::string
 274 device::vendor_name() const {
 275    return pipe->get_device_vendor(pipe);
 276 }
 277
 278 enum pipe_shader_ir
 279 device::ir_format() const {
 280    if (supports_ir(PIPE_SHADER_IR_NATIVE))
 281       return PIPE_SHADER_IR_NATIVE;
 282
 283    assert(supports_ir(PIPE_SHADER_IR_NIR_SERIALIZED));
 284    return PIPE_SHADER_IR_NIR_SERIALIZED;
 285 }
 286
 287 std::string
 288 device::ir_target() const {
 289    std::vector<char> target = get_compute_param<char>(
 290       pipe, ir_format(), PIPE_COMPUTE_CAP_IR_TARGET);
 291    return { target.data() };
 292 }
 293
 294 enum pipe_endian
 295 device::endianness() const {
 296    return (enum pipe_endian)pipe->get_param(pipe, PIPE_CAP_ENDIANNESS);
 297 }
 298
 299 std::string
 300 device::device_version() const {
 301    static const std::string device_version =
 302          debug_get_option("CLOVER_DEVICE_VERSION_OVERRIDE", "1.1");
 303    return device_version;
 304 }
 305
 306 std::string
 307 device::device_clc_version() const {
 308    static const std::string device_clc_version =
 309          debug_get_option("CLOVER_DEVICE_CLC_VERSION_OVERRIDE", "1.1");
 310    return device_clc_version;
 311 }
 312
 313 bool
 314 device::supports_ir(enum pipe_shader_ir ir) const {
 315    return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
 316                                  PIPE_SHADER_CAP_SUPPORTED_IRS) & (1 << ir);
 317 }
 318
 319 std::string
 320 device::supported_extensions() const {
 321    return
 322       "cl_khr_byte_addressable_store"
 323       " cl_khr_global_int32_base_atomics"
 324       " cl_khr_global_int32_extended_atomics"
 325       " cl_khr_local_int32_base_atomics"
 326       " cl_khr_local_int32_extended_atomics"
 327       + std::string(has_int64_atomics() ? " cl_khr_int64_base_atomics" : "")
 328       + std::string(has_int64_atomics() ? " cl_khr_int64_extended_atomics" : "")
 329       + std::string(has_doubles() ? " cl_khr_fp64" : "")
 330       + std::string(has_halves() ? " cl_khr_fp16" : "")
 331       + std::string(svm_support() ? " cl_arm_shared_virtual_memory" : "");
 332 }
 333
 334 const void *
 335 device::get_compiler_options(enum pipe_shader_ir ir) const {
 336    return pipe->get_compiler_options(pipe, ir, PIPE_SHADER_COMPUTE);
 337 }