1 /**************************************************************************
3 * Copyright 2007 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #ifndef PIPE_DEFINES_H
29 #define PIPE_DEFINES_H
31 #include "p_compiler.h"
38 * Gallium error codes.
40 * - A zero value always means success.
41 * - A negative value always means failure.
42 * - The meaning of a positive value is function dependent.
47 PIPE_ERROR
= -1, /**< Generic error */
48 PIPE_ERROR_BAD_INPUT
= -2,
49 PIPE_ERROR_OUT_OF_MEMORY
= -3,
54 enum pipe_blendfactor
{
55 PIPE_BLENDFACTOR_ONE
= 1,
56 PIPE_BLENDFACTOR_SRC_COLOR
,
57 PIPE_BLENDFACTOR_SRC_ALPHA
,
58 PIPE_BLENDFACTOR_DST_ALPHA
,
59 PIPE_BLENDFACTOR_DST_COLOR
,
60 PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE
,
61 PIPE_BLENDFACTOR_CONST_COLOR
,
62 PIPE_BLENDFACTOR_CONST_ALPHA
,
63 PIPE_BLENDFACTOR_SRC1_COLOR
,
64 PIPE_BLENDFACTOR_SRC1_ALPHA
,
66 PIPE_BLENDFACTOR_ZERO
= 0x11,
67 PIPE_BLENDFACTOR_INV_SRC_COLOR
,
68 PIPE_BLENDFACTOR_INV_SRC_ALPHA
,
69 PIPE_BLENDFACTOR_INV_DST_ALPHA
,
70 PIPE_BLENDFACTOR_INV_DST_COLOR
,
72 PIPE_BLENDFACTOR_INV_CONST_COLOR
= 0x17,
73 PIPE_BLENDFACTOR_INV_CONST_ALPHA
,
74 PIPE_BLENDFACTOR_INV_SRC1_COLOR
,
75 PIPE_BLENDFACTOR_INV_SRC1_ALPHA
,
78 enum pipe_blend_func
{
81 PIPE_BLEND_REVERSE_SUBTRACT
,
89 PIPE_LOGICOP_AND_INVERTED
,
90 PIPE_LOGICOP_COPY_INVERTED
,
91 PIPE_LOGICOP_AND_REVERSE
,
98 PIPE_LOGICOP_OR_INVERTED
,
100 PIPE_LOGICOP_OR_REVERSE
,
105 #define PIPE_MASK_R 0x1
106 #define PIPE_MASK_G 0x2
107 #define PIPE_MASK_B 0x4
108 #define PIPE_MASK_A 0x8
109 #define PIPE_MASK_RGBA 0xf
110 #define PIPE_MASK_Z 0x10
111 #define PIPE_MASK_S 0x20
112 #define PIPE_MASK_ZS 0x30
113 #define PIPE_MASK_RGBAZS (PIPE_MASK_RGBA|PIPE_MASK_ZS)
117 * Inequality functions. Used for depth test, stencil compare, alpha
118 * test, shadow compare, etc.
120 enum pipe_compare_func
{
131 /** Polygon fill mode */
133 PIPE_POLYGON_MODE_FILL
,
134 PIPE_POLYGON_MODE_LINE
,
135 PIPE_POLYGON_MODE_POINT
,
136 PIPE_POLYGON_MODE_FILL_RECTANGLE
,
139 /** Polygon face specification, eg for culling */
140 #define PIPE_FACE_NONE 0
141 #define PIPE_FACE_FRONT 1
142 #define PIPE_FACE_BACK 2
143 #define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK)
146 enum pipe_stencil_op
{
147 PIPE_STENCIL_OP_KEEP
,
148 PIPE_STENCIL_OP_ZERO
,
149 PIPE_STENCIL_OP_REPLACE
,
150 PIPE_STENCIL_OP_INCR
,
151 PIPE_STENCIL_OP_DECR
,
152 PIPE_STENCIL_OP_INCR_WRAP
,
153 PIPE_STENCIL_OP_DECR_WRAP
,
154 PIPE_STENCIL_OP_INVERT
,
158 * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D
160 enum pipe_texture_target
168 PIPE_TEXTURE_1D_ARRAY
,
169 PIPE_TEXTURE_2D_ARRAY
,
170 PIPE_TEXTURE_CUBE_ARRAY
,
171 PIPE_MAX_TEXTURE_TYPES
,
185 PIPE_TEX_WRAP_REPEAT
,
187 PIPE_TEX_WRAP_CLAMP_TO_EDGE
,
188 PIPE_TEX_WRAP_CLAMP_TO_BORDER
,
189 PIPE_TEX_WRAP_MIRROR_REPEAT
,
190 PIPE_TEX_WRAP_MIRROR_CLAMP
,
191 PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
,
192 PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER
,
195 /** Between mipmaps, ie mipfilter */
196 enum pipe_tex_mipfilter
{
197 PIPE_TEX_MIPFILTER_NEAREST
,
198 PIPE_TEX_MIPFILTER_LINEAR
,
199 PIPE_TEX_MIPFILTER_NONE
,
202 /** Within a mipmap, ie min/mag filter */
203 enum pipe_tex_filter
{
204 PIPE_TEX_FILTER_NEAREST
,
205 PIPE_TEX_FILTER_LINEAR
,
208 enum pipe_tex_compare
{
209 PIPE_TEX_COMPARE_NONE
,
210 PIPE_TEX_COMPARE_R_TO_TEXTURE
,
216 #define PIPE_CLEAR_DEPTH (1 << 0)
217 #define PIPE_CLEAR_STENCIL (1 << 1)
218 #define PIPE_CLEAR_COLOR0 (1 << 2)
219 #define PIPE_CLEAR_COLOR1 (1 << 3)
220 #define PIPE_CLEAR_COLOR2 (1 << 4)
221 #define PIPE_CLEAR_COLOR3 (1 << 5)
222 #define PIPE_CLEAR_COLOR4 (1 << 6)
223 #define PIPE_CLEAR_COLOR5 (1 << 7)
224 #define PIPE_CLEAR_COLOR6 (1 << 8)
225 #define PIPE_CLEAR_COLOR7 (1 << 9)
226 /** Combined flags */
227 /** All color buffers currently bound */
228 #define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \
229 PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \
230 PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \
231 PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7)
232 #define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)
235 * Transfer object usage flags
237 enum pipe_transfer_usage
240 * Resource contents read back (or accessed directly) at transfer
243 PIPE_TRANSFER_READ
= (1 << 0),
246 * Resource contents will be written back at transfer_unmap
247 * time (or modified as a result of being accessed directly).
249 PIPE_TRANSFER_WRITE
= (1 << 1),
254 PIPE_TRANSFER_READ_WRITE
= PIPE_TRANSFER_READ
| PIPE_TRANSFER_WRITE
,
257 * The transfer should map the texture storage directly. The driver may
258 * return NULL if that isn't possible, and the state tracker needs to cope
259 * with that and use an alternative path without this flag.
261 * E.g. the state tracker could have a simpler path which maps textures and
262 * does read/modify/write cycles on them directly, and a more complicated
263 * path which uses minimal read and write transfers.
265 PIPE_TRANSFER_MAP_DIRECTLY
= (1 << 2),
268 * Discards the memory within the mapped region.
270 * It should not be used with PIPE_TRANSFER_READ.
273 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag.
275 PIPE_TRANSFER_DISCARD_RANGE
= (1 << 8),
278 * Fail if the resource cannot be mapped immediately.
281 * - Direct3D's D3DLOCK_DONOTWAIT flag.
282 * - Mesa's MESA_MAP_NOWAIT_BIT flag.
283 * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag.
285 PIPE_TRANSFER_DONTBLOCK
= (1 << 9),
288 * Do not attempt to synchronize pending operations on the resource when mapping.
290 * It should not be used with PIPE_TRANSFER_READ.
293 * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag.
294 * - Direct3D's D3DLOCK_NOOVERWRITE flag.
295 * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag.
297 PIPE_TRANSFER_UNSYNCHRONIZED
= (1 << 10),
300 * Written ranges will be notified later with
301 * pipe_context::transfer_flush_region.
303 * It should not be used with PIPE_TRANSFER_READ.
306 * - pipe_context::transfer_flush_region
307 * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag.
309 PIPE_TRANSFER_FLUSH_EXPLICIT
= (1 << 11),
312 * Discards all memory backing the resource.
314 * It should not be used with PIPE_TRANSFER_READ.
316 * This is equivalent to:
317 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT
318 * - BufferData(NULL) on a GL buffer
319 * - Direct3D's D3DLOCK_DISCARD flag.
320 * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag.
321 * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag
322 * - D3D10's D3D10_MAP_WRITE_DISCARD flag.
324 PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
= (1 << 12),
327 * Allows the resource to be used for rendering while mapped.
329 * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating
332 * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
333 * must be called to ensure the device can see what the CPU has written.
335 PIPE_TRANSFER_PERSISTENT
= (1 << 13),
338 * If PERSISTENT is set, this ensures any writes done by the device are
339 * immediately visible to the CPU and vice versa.
341 * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
344 PIPE_TRANSFER_COHERENT
= (1 << 14),
347 * This and higher bits are reserved for private use by drivers. Drivers
348 * should use this as (PIPE_TRANSFER_DRV_PRV << i).
350 PIPE_TRANSFER_DRV_PRV
= (1 << 24)
354 * Flags for the flush function.
356 enum pipe_flush_flags
358 PIPE_FLUSH_END_OF_FRAME
= (1 << 0),
359 PIPE_FLUSH_DEFERRED
= (1 << 1),
360 PIPE_FLUSH_FENCE_FD
= (1 << 2),
361 PIPE_FLUSH_ASYNC
= (1 << 3),
362 PIPE_FLUSH_HINT_FINISH
= (1 << 4),
363 PIPE_FLUSH_TOP_OF_PIPE
= (1 << 5),
364 PIPE_FLUSH_BOTTOM_OF_PIPE
= (1 << 6),
368 * Flags for pipe_context::dump_debug_state.
370 #define PIPE_DUMP_DEVICE_STATUS_REGISTERS (1 << 0)
373 * Create a compute-only context. Use in pipe_screen::context_create.
374 * This disables draw, blit, and clear*, render_condition, and other graphics
375 * functions. Interop with other graphics contexts is still allowed.
376 * This allows scheduling jobs on a compute-only hardware command queue that
377 * can run in parallel with graphics without stalling it.
379 #define PIPE_CONTEXT_COMPUTE_ONLY (1 << 0)
382 * Gather debug information and expect that pipe_context::dump_debug_state
383 * will be called. Use in pipe_screen::context_create.
385 #define PIPE_CONTEXT_DEBUG (1 << 1)
388 * Whether out-of-bounds shader loads must return zero and out-of-bounds
389 * shader stores must be dropped.
391 #define PIPE_CONTEXT_ROBUST_BUFFER_ACCESS (1 << 2)
394 * Prefer threaded pipe_context. It also implies that video codec functions
395 * will not be used. (they will be either no-ops or NULL when threading is
398 #define PIPE_CONTEXT_PREFER_THREADED (1 << 3)
401 * Create a high priority context.
403 #define PIPE_CONTEXT_HIGH_PRIORITY (1 << 4)
406 * Create a low priority context.
408 #define PIPE_CONTEXT_LOW_PRIORITY (1 << 5)
410 /** Stop execution if the device is reset. */
411 #define PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET (1 << 6)
414 * Flags for pipe_context::memory_barrier.
416 #define PIPE_BARRIER_MAPPED_BUFFER (1 << 0)
417 #define PIPE_BARRIER_SHADER_BUFFER (1 << 1)
418 #define PIPE_BARRIER_QUERY_BUFFER (1 << 2)
419 #define PIPE_BARRIER_VERTEX_BUFFER (1 << 3)
420 #define PIPE_BARRIER_INDEX_BUFFER (1 << 4)
421 #define PIPE_BARRIER_CONSTANT_BUFFER (1 << 5)
422 #define PIPE_BARRIER_INDIRECT_BUFFER (1 << 6)
423 #define PIPE_BARRIER_TEXTURE (1 << 7)
424 #define PIPE_BARRIER_IMAGE (1 << 8)
425 #define PIPE_BARRIER_FRAMEBUFFER (1 << 9)
426 #define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10)
427 #define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11)
428 #define PIPE_BARRIER_UPDATE_BUFFER (1 << 12)
429 #define PIPE_BARRIER_UPDATE_TEXTURE (1 << 13)
430 #define PIPE_BARRIER_ALL ((1 << 14) - 1)
432 #define PIPE_BARRIER_UPDATE \
433 (PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE)
436 * Flags for pipe_context::texture_barrier.
438 #define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0)
439 #define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1)
442 * Resource binding flags -- state tracker must specify in advance all
443 * the ways a resource might be used.
445 #define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */
446 #define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */
447 #define PIPE_BIND_BLENDABLE (1 << 2) /* create_surface */
448 #define PIPE_BIND_SAMPLER_VIEW (1 << 3) /* create_sampler_view */
449 #define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */
450 #define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */
451 #define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */
452 #define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */
454 #define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */
455 #define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */
456 #define PIPE_BIND_CUSTOM (1 << 12) /* state-tracker/winsys usages */
457 #define PIPE_BIND_GLOBAL (1 << 13) /* set_global_binding */
458 #define PIPE_BIND_SHADER_BUFFER (1 << 14) /* set_shader_buffers */
459 #define PIPE_BIND_SHADER_IMAGE (1 << 15) /* set_shader_images */
460 #define PIPE_BIND_COMPUTE_RESOURCE (1 << 16) /* set_compute_resources */
461 #define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 17) /* pipe_draw_info.indirect */
462 #define PIPE_BIND_QUERY_BUFFER (1 << 18) /* get_query_result_resource */
465 * The first two flags above were previously part of the amorphous
466 * TEXTURE_USAGE, most of which are now descriptions of the ways a
467 * particular texture can be bound to the gallium pipeline. The two flags
468 * below do not fit within that and probably need to be migrated to some
471 * It seems like scanout is used by the Xorg state tracker to ask for
472 * a texture suitable for actual scanout (hence the name), which
473 * implies extra layout constraints on some hardware. It may also
474 * have some special meaning regarding mouse cursor images.
476 * The shared flag is quite underspecified, but certainly isn't a
477 * binding flag - it seems more like a message to the winsys to create
478 * a shareable allocation.
480 * The third flag has been added to be able to force textures to be created
481 * in linear mode (no tiling).
483 #define PIPE_BIND_SCANOUT (1 << 19) /* */
484 #define PIPE_BIND_SHARED (1 << 20) /* get_texture_handle ??? */
485 #define PIPE_BIND_LINEAR (1 << 21)
489 * Flags for the driver about resource behaviour:
491 #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0)
492 #define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1)
493 #define PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY (1 << 2)
494 #define PIPE_RESOURCE_FLAG_SPARSE (1 << 3)
495 #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 8) /* driver/winsys private */
496 #define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */
499 * Hint about the expected lifecycle of a resource.
500 * Sorted according to GPU vs CPU access.
502 enum pipe_resource_usage
{
503 PIPE_USAGE_DEFAULT
, /* fast GPU access */
504 PIPE_USAGE_IMMUTABLE
, /* fast GPU access, immutable */
505 PIPE_USAGE_DYNAMIC
, /* uploaded data is used multiple times */
506 PIPE_USAGE_STREAM
, /* uploaded data is used once */
507 PIPE_USAGE_STAGING
, /* fast CPU access */
513 enum pipe_shader_type
{
515 PIPE_SHADER_FRAGMENT
,
516 PIPE_SHADER_GEOMETRY
,
517 PIPE_SHADER_TESS_CTRL
,
518 PIPE_SHADER_TESS_EVAL
,
526 enum pipe_prim_type
{
530 PIPE_PRIM_LINE_STRIP
,
532 PIPE_PRIM_TRIANGLE_STRIP
,
533 PIPE_PRIM_TRIANGLE_FAN
,
535 PIPE_PRIM_QUAD_STRIP
,
537 PIPE_PRIM_LINES_ADJACENCY
,
538 PIPE_PRIM_LINE_STRIP_ADJACENCY
,
539 PIPE_PRIM_TRIANGLES_ADJACENCY
,
540 PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY
,
546 * Tessellator spacing types
548 enum pipe_tess_spacing
{
549 PIPE_TESS_SPACING_FRACTIONAL_ODD
,
550 PIPE_TESS_SPACING_FRACTIONAL_EVEN
,
551 PIPE_TESS_SPACING_EQUAL
,
557 enum pipe_query_type
{
558 PIPE_QUERY_OCCLUSION_COUNTER
,
559 PIPE_QUERY_OCCLUSION_PREDICATE
,
560 PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
,
561 PIPE_QUERY_TIMESTAMP
,
562 PIPE_QUERY_TIMESTAMP_DISJOINT
,
563 PIPE_QUERY_TIME_ELAPSED
,
564 PIPE_QUERY_PRIMITIVES_GENERATED
,
565 PIPE_QUERY_PRIMITIVES_EMITTED
,
566 PIPE_QUERY_SO_STATISTICS
,
567 PIPE_QUERY_SO_OVERFLOW_PREDICATE
,
568 PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE
,
569 PIPE_QUERY_GPU_FINISHED
,
570 PIPE_QUERY_PIPELINE_STATISTICS
,
571 PIPE_QUERY_PIPELINE_STATISTICS_SINGLE
,
573 /* start of driver queries, see pipe_screen::get_driver_query_info */
574 PIPE_QUERY_DRIVER_SPECIFIC
= 256,
578 * Index for PIPE_QUERY_PIPELINE_STATISTICS subqueries.
580 enum pipe_statistics_query_index
{
581 PIPE_STAT_QUERY_IA_VERTICES
,
582 PIPE_STAT_QUERY_IA_PRIMITIVES
,
583 PIPE_STAT_QUERY_VS_INVOCATIONS
,
584 PIPE_STAT_QUERY_GS_INVOCATIONS
,
585 PIPE_STAT_QUERY_GS_PRIMITIVES
,
586 PIPE_STAT_QUERY_C_INVOCATIONS
,
587 PIPE_STAT_QUERY_C_PRIMITIVES
,
588 PIPE_STAT_QUERY_PS_INVOCATIONS
,
589 PIPE_STAT_QUERY_HS_INVOCATIONS
,
590 PIPE_STAT_QUERY_DS_INVOCATIONS
,
591 PIPE_STAT_QUERY_CS_INVOCATIONS
,
595 * Conditional rendering modes
597 enum pipe_render_cond_flag
{
598 PIPE_RENDER_COND_WAIT
,
599 PIPE_RENDER_COND_NO_WAIT
,
600 PIPE_RENDER_COND_BY_REGION_WAIT
,
601 PIPE_RENDER_COND_BY_REGION_NO_WAIT
,
605 * Point sprite coord modes
607 enum pipe_sprite_coord_mode
{
608 PIPE_SPRITE_COORD_UPPER_LEFT
,
609 PIPE_SPRITE_COORD_LOWER_LEFT
,
613 * Texture & format swizzles
623 PIPE_SWIZZLE_MAX
, /**< Number of enums counter (must be last) */
626 #define PIPE_TIMEOUT_INFINITE 0xffffffffffffffffull
630 * Device reset status.
632 enum pipe_reset_status
635 PIPE_GUILTY_CONTEXT_RESET
,
636 PIPE_INNOCENT_CONTEXT_RESET
,
637 PIPE_UNKNOWN_CONTEXT_RESET
,
642 * Conservative rasterization modes.
644 enum pipe_conservative_raster_mode
646 PIPE_CONSERVATIVE_RASTER_OFF
,
647 PIPE_CONSERVATIVE_RASTER_POST_SNAP
,
648 PIPE_CONSERVATIVE_RASTER_PRE_SNAP
,
653 * resource_get_handle flags.
655 /* Requires pipe_context::flush_resource before external use. */
656 #define PIPE_HANDLE_USAGE_EXPLICIT_FLUSH (1 << 0)
657 /* Expected external use of the resource: */
658 #define PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE (1 << 1)
659 #define PIPE_HANDLE_USAGE_SHADER_WRITE (1 << 2)
662 * pipe_image_view access flags.
664 #define PIPE_IMAGE_ACCESS_READ (1 << 0)
665 #define PIPE_IMAGE_ACCESS_WRITE (1 << 1)
666 #define PIPE_IMAGE_ACCESS_READ_WRITE (PIPE_IMAGE_ACCESS_READ | \
667 PIPE_IMAGE_ACCESS_WRITE)
670 * Implementation capabilities/limits which are queried through
671 * pipe_screen::get_param()
675 PIPE_CAP_NPOT_TEXTURES
,
676 PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
,
677 PIPE_CAP_ANISOTROPIC_FILTER
,
678 PIPE_CAP_POINT_SPRITE
,
679 PIPE_CAP_MAX_RENDER_TARGETS
,
680 PIPE_CAP_OCCLUSION_QUERY
,
681 PIPE_CAP_QUERY_TIME_ELAPSED
,
682 PIPE_CAP_TEXTURE_SWIZZLE
,
683 PIPE_CAP_MAX_TEXTURE_2D_LEVELS
,
684 PIPE_CAP_MAX_TEXTURE_3D_LEVELS
,
685 PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
,
686 PIPE_CAP_TEXTURE_MIRROR_CLAMP
,
687 PIPE_CAP_BLEND_EQUATION_SEPARATE
,
689 PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
,
690 PIPE_CAP_PRIMITIVE_RESTART
,
691 /** blend enables and write masks per rendertarget */
692 PIPE_CAP_INDEP_BLEND_ENABLE
,
693 /** different blend funcs per rendertarget */
694 PIPE_CAP_INDEP_BLEND_FUNC
,
695 PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
,
696 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
,
697 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
,
698 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
,
699 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
,
700 PIPE_CAP_DEPTH_CLIP_DISABLE
,
701 PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE
,
702 PIPE_CAP_SHADER_STENCIL_EXPORT
,
703 PIPE_CAP_TGSI_INSTANCEID
,
704 PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
,
705 PIPE_CAP_FRAGMENT_COLOR_CLAMPED
,
706 PIPE_CAP_MIXED_COLORBUFFER_FORMATS
,
707 PIPE_CAP_SEAMLESS_CUBE_MAP
,
708 PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
,
709 PIPE_CAP_MIN_TEXEL_OFFSET
,
710 PIPE_CAP_MAX_TEXEL_OFFSET
,
711 PIPE_CAP_CONDITIONAL_RENDER
,
712 PIPE_CAP_TEXTURE_BARRIER
,
713 PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
,
714 PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
,
715 PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
,
716 PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS
,
717 PIPE_CAP_VERTEX_COLOR_UNCLAMPED
,
718 PIPE_CAP_VERTEX_COLOR_CLAMPED
,
719 PIPE_CAP_GLSL_FEATURE_LEVEL
,
720 PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
,
721 PIPE_CAP_ESSL_FEATURE_LEVEL
,
722 PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
,
723 PIPE_CAP_USER_VERTEX_BUFFERS
,
724 PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY
,
725 PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
,
726 PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY
,
728 PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
,
729 PIPE_CAP_START_INSTANCE
,
730 PIPE_CAP_QUERY_TIMESTAMP
,
731 PIPE_CAP_TEXTURE_MULTISAMPLE
,
732 PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
,
733 PIPE_CAP_CUBE_MAP_ARRAY
,
734 PIPE_CAP_TEXTURE_BUFFER_OBJECTS
,
735 PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
,
736 PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY
,
737 PIPE_CAP_TGSI_TEXCOORD
,
738 PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
,
739 PIPE_CAP_QUERY_PIPELINE_STATISTICS
,
740 PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK
,
741 PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
,
742 PIPE_CAP_MAX_VIEWPORTS
,
744 PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
,
745 PIPE_CAP_TGSI_VS_LAYER_VIEWPORT
,
746 PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
,
747 PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
,
748 PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
,
749 PIPE_CAP_TEXTURE_GATHER_SM5
,
750 PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
,
751 PIPE_CAP_FAKE_SW_MSAA
,
752 PIPE_CAP_TEXTURE_QUERY_LOD
,
753 PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
,
754 PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
,
755 PIPE_CAP_SAMPLE_SHADING
,
756 PIPE_CAP_TEXTURE_GATHER_OFFSETS
,
757 PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION
,
758 PIPE_CAP_MAX_VERTEX_STREAMS
,
759 PIPE_CAP_DRAW_INDIRECT
,
760 PIPE_CAP_TGSI_FS_FINE_DERIVATIVE
,
763 PIPE_CAP_ACCELERATED
,
764 PIPE_CAP_VIDEO_MEMORY
,
766 PIPE_CAP_CONDITIONAL_RENDER_INVERTED
,
767 PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE
,
768 PIPE_CAP_SAMPLER_VIEW_TARGET
,
770 PIPE_CAP_VERTEXID_NOBASE
,
771 PIPE_CAP_POLYGON_OFFSET_CLAMP
,
772 PIPE_CAP_MULTISAMPLE_Z_RESOLVE
,
773 PIPE_CAP_RESOURCE_FROM_USER_MEMORY
,
774 PIPE_CAP_DEVICE_RESET_STATUS_QUERY
,
775 PIPE_CAP_MAX_SHADER_PATCH_VARYINGS
,
776 PIPE_CAP_TEXTURE_FLOAT_LINEAR
,
777 PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
,
778 PIPE_CAP_DEPTH_BOUNDS_TEST
,
780 PIPE_CAP_FORCE_PERSAMPLE_INTERP
,
781 PIPE_CAP_SHAREABLE_SHADERS
,
782 PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS
,
783 PIPE_CAP_CLEAR_TEXTURE
,
784 PIPE_CAP_DRAW_PARAMETERS
,
785 PIPE_CAP_TGSI_PACK_HALF_FLOAT
,
786 PIPE_CAP_MULTI_DRAW_INDIRECT
,
787 PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS
,
788 PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL
,
789 PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL
,
790 PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
,
791 PIPE_CAP_INVALIDATE_BUFFER
,
792 PIPE_CAP_GENERATE_MIPMAP
,
793 PIPE_CAP_STRING_MARKER
,
794 PIPE_CAP_SURFACE_REINTERPRET_BLOCKS
,
795 PIPE_CAP_QUERY_BUFFER_OBJECT
,
796 PIPE_CAP_QUERY_MEMORY_INFO
,
800 PIPE_CAP_PCI_FUNCTION
,
801 PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT
,
802 PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR
,
803 PIPE_CAP_CULL_DISTANCE
,
804 PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES
,
806 PIPE_CAP_MAX_WINDOW_RECTANGLES
,
807 PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED
,
808 PIPE_CAP_VIEWPORT_SUBPIXEL_BITS
,
809 PIPE_CAP_RASTERIZER_SUBPIXEL_BITS
,
810 PIPE_CAP_MIXED_COLOR_DEPTH_BITS
,
811 PIPE_CAP_TGSI_ARRAY_COMPONENTS
,
812 PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS
,
813 PIPE_CAP_TGSI_CAN_READ_OUTPUTS
,
814 PIPE_CAP_NATIVE_FENCE_FD
,
815 PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
,
816 PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS
,
817 PIPE_CAP_TGSI_FS_FBFETCH
,
818 PIPE_CAP_TGSI_MUL_ZERO_WINS
,
821 PIPE_CAP_INT64_DIVMOD
,
822 PIPE_CAP_TGSI_TEX_TXF_LZ
,
824 PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE
,
825 PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE
,
826 PIPE_CAP_TGSI_BALLOT
,
827 PIPE_CAP_TGSI_TES_LAYER_VIEWPORT
,
828 PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
,
829 PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION
,
830 PIPE_CAP_POST_DEPTH_COVERAGE
,
831 PIPE_CAP_BINDLESS_TEXTURE
,
832 PIPE_CAP_NIR_SAMPLERS_AS_DEREF
,
833 PIPE_CAP_QUERY_SO_OVERFLOW
,
835 PIPE_CAP_LOAD_CONSTBUF
,
836 PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
,
837 PIPE_CAP_TILE_RASTER_ORDER
,
838 PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES
,
839 PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS
,
840 PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET
,
841 PIPE_CAP_CONTEXT_PRIORITY_MASK
,
842 PIPE_CAP_FENCE_SIGNAL
,
843 PIPE_CAP_CONSTBUF0_FLAGS
,
844 PIPE_CAP_PACKED_UNIFORMS
,
845 PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES
,
846 PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES
,
847 PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES
,
848 PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES
,
849 PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS
,
850 PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE
,
851 PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS
,
852 PIPE_CAP_MAX_GS_INVOCATIONS
,
853 PIPE_CAP_MAX_SHADER_BUFFER_SIZE
,
854 PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE
,
855 PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS
,
856 PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS
,
857 PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS
,
858 PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET
,
859 PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET
,
860 PIPE_CAP_SURFACE_SAMPLE_COUNT
,
861 PIPE_CAP_TGSI_ATOMFADD
,
862 PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE
,
863 PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND
,
864 PIPE_CAP_DEST_SURFACE_SRGB_CONTROL
,
865 PIPE_CAP_NIR_COMPACT_ARRAYS
,
866 PIPE_CAP_MAX_VARYINGS
,
867 PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK
,
868 PIPE_CAP_COMPUTE_SHADER_DERIVATIVES
,
869 PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS
,
870 PIPE_CAP_IMAGE_LOAD_FORMATTED
,
874 * Possible bits for PIPE_CAP_CONTEXT_PRIORITY_MASK param, which should
875 * return a bitmask of the supported priorities. If the driver does not
876 * support prioritized contexts, it can return 0.
878 * Note that these match __DRI2_RENDER_HAS_CONTEXT_PRIORITY_*
880 #define PIPE_CONTEXT_PRIORITY_LOW (1 << 0)
881 #define PIPE_CONTEXT_PRIORITY_MEDIUM (1 << 1)
882 #define PIPE_CONTEXT_PRIORITY_HIGH (1 << 2)
884 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
885 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1)
889 PIPE_ENDIAN_LITTLE
= 0,
891 #if defined(PIPE_ARCH_LITTLE_ENDIAN)
892 PIPE_ENDIAN_NATIVE
= PIPE_ENDIAN_LITTLE
893 #elif defined(PIPE_ARCH_BIG_ENDIAN)
894 PIPE_ENDIAN_NATIVE
= PIPE_ENDIAN_BIG
899 * Implementation limits which are queried through
900 * pipe_screen::get_paramf()
904 PIPE_CAPF_MAX_LINE_WIDTH
,
905 PIPE_CAPF_MAX_LINE_WIDTH_AA
,
906 PIPE_CAPF_MAX_POINT_WIDTH
,
907 PIPE_CAPF_MAX_POINT_WIDTH_AA
,
908 PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
,
909 PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
,
910 PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
,
911 PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
,
912 PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
,
915 /** Shader caps not specific to any single stage */
918 PIPE_SHADER_CAP_MAX_INSTRUCTIONS
, /* if 0, it means the stage is unsupported */
919 PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
,
920 PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
,
921 PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
,
922 PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
,
923 PIPE_SHADER_CAP_MAX_INPUTS
,
924 PIPE_SHADER_CAP_MAX_OUTPUTS
,
925 PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
,
926 PIPE_SHADER_CAP_MAX_CONST_BUFFERS
,
927 PIPE_SHADER_CAP_MAX_TEMPS
,
929 PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
,
930 PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
,
931 PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
,
932 PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
,
933 PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
,
934 PIPE_SHADER_CAP_SUBROUTINES
, /* BGNSUB, ENDSUB, CAL, RET */
935 PIPE_SHADER_CAP_INTEGERS
,
936 PIPE_SHADER_CAP_INT64_ATOMICS
,
937 PIPE_SHADER_CAP_FP16
,
938 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
,
939 PIPE_SHADER_CAP_PREFERRED_IR
,
940 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
,
941 PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
,
942 PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
, /* all rounding modes */
943 PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
,
944 PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
,
945 PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
,
946 PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
,
947 PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
,
948 PIPE_SHADER_CAP_SUPPORTED_IRS
,
949 PIPE_SHADER_CAP_MAX_SHADER_IMAGES
,
950 PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
,
951 PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
,
952 PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
,
953 PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
,
954 PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
,
955 PIPE_SHADER_CAP_SCALAR_ISA
,
959 * Shader intermediate representation.
961 * Note that if the driver requests something other than TGSI, it must
962 * always be prepared to receive TGSI in addition to its preferred IR.
963 * If the driver requests TGSI as its preferred IR, it will *always*
966 * Note that PIPE_SHADER_IR_TGSI should be zero for backwards compat with
967 * state trackers that only understand TGSI.
971 PIPE_SHADER_IR_TGSI
= 0,
972 PIPE_SHADER_IR_NATIVE
,
977 * Compute-specific implementation capability. They can be queried
978 * using pipe_screen::get_compute_param.
980 enum pipe_compute_cap
982 PIPE_COMPUTE_CAP_ADDRESS_BITS
,
983 PIPE_COMPUTE_CAP_IR_TARGET
,
984 PIPE_COMPUTE_CAP_GRID_DIMENSION
,
985 PIPE_COMPUTE_CAP_MAX_GRID_SIZE
,
986 PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE
,
987 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK
,
988 PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE
,
989 PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE
,
990 PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE
,
991 PIPE_COMPUTE_CAP_MAX_INPUT_SIZE
,
992 PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
,
993 PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
,
994 PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS
,
995 PIPE_COMPUTE_CAP_IMAGES_SUPPORTED
,
996 PIPE_COMPUTE_CAP_SUBGROUP_SIZE
,
997 PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK
,
1001 * Types of parameters for pipe_context::set_context_param.
1003 enum pipe_context_param
1005 /* A hint for the driver that it should pin its execution threads to
1006 * a group of cores sharing a specific L3 cache if the CPU has multiple
1007 * L3 caches. This is needed for good multithreading performance on
1008 * AMD Zen CPUs. "value" is the L3 cache index. Drivers that don't have
1009 * any internal threads or don't run on affected CPUs can ignore this.
1011 PIPE_CONTEXT_PARAM_PIN_THREADS_TO_L3_CACHE
,
1015 * Composite query types
1019 * Query result for PIPE_QUERY_SO_STATISTICS.
1021 struct pipe_query_data_so_statistics
1023 uint64_t num_primitives_written
;
1024 uint64_t primitives_storage_needed
;
1028 * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT.
1030 struct pipe_query_data_timestamp_disjoint
1037 * Query result for PIPE_QUERY_PIPELINE_STATISTICS.
1039 struct pipe_query_data_pipeline_statistics
1041 uint64_t ia_vertices
; /**< Num vertices read by the vertex fetcher. */
1042 uint64_t ia_primitives
; /**< Num primitives read by the vertex fetcher. */
1043 uint64_t vs_invocations
; /**< Num vertex shader invocations. */
1044 uint64_t gs_invocations
; /**< Num geometry shader invocations. */
1045 uint64_t gs_primitives
; /**< Num primitives output by a geometry shader. */
1046 uint64_t c_invocations
; /**< Num primitives sent to the rasterizer. */
1047 uint64_t c_primitives
; /**< Num primitives that were rendered. */
1048 uint64_t ps_invocations
; /**< Num pixel shader invocations. */
1049 uint64_t hs_invocations
; /**< Num hull shader invocations. */
1050 uint64_t ds_invocations
; /**< Num domain shader invocations. */
1051 uint64_t cs_invocations
; /**< Num compute shader invocations. */
1055 * For batch queries.
1057 union pipe_numeric_type_union
1065 * Query result (returned by pipe_context::get_query_result).
1067 union pipe_query_result
1069 /* PIPE_QUERY_OCCLUSION_PREDICATE */
1070 /* PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE */
1071 /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */
1072 /* PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE */
1073 /* PIPE_QUERY_GPU_FINISHED */
1076 /* PIPE_QUERY_OCCLUSION_COUNTER */
1077 /* PIPE_QUERY_TIMESTAMP */
1078 /* PIPE_QUERY_TIME_ELAPSED */
1079 /* PIPE_QUERY_PRIMITIVES_GENERATED */
1080 /* PIPE_QUERY_PRIMITIVES_EMITTED */
1081 /* PIPE_DRIVER_QUERY_TYPE_UINT64 */
1082 /* PIPE_DRIVER_QUERY_TYPE_BYTES */
1083 /* PIPE_DRIVER_QUERY_TYPE_MICROSECONDS */
1084 /* PIPE_DRIVER_QUERY_TYPE_HZ */
1087 /* PIPE_DRIVER_QUERY_TYPE_UINT */
1090 /* PIPE_DRIVER_QUERY_TYPE_FLOAT */
1091 /* PIPE_DRIVER_QUERY_TYPE_PERCENTAGE */
1094 /* PIPE_QUERY_SO_STATISTICS */
1095 struct pipe_query_data_so_statistics so_statistics
;
1097 /* PIPE_QUERY_TIMESTAMP_DISJOINT */
1098 struct pipe_query_data_timestamp_disjoint timestamp_disjoint
;
1100 /* PIPE_QUERY_PIPELINE_STATISTICS */
1101 struct pipe_query_data_pipeline_statistics pipeline_statistics
;
1103 /* batch queries (variable length) */
1104 union pipe_numeric_type_union batch
[1];
1107 enum pipe_query_value_type
1109 PIPE_QUERY_TYPE_I32
,
1110 PIPE_QUERY_TYPE_U32
,
1111 PIPE_QUERY_TYPE_I64
,
1112 PIPE_QUERY_TYPE_U64
,
1115 union pipe_color_union
1122 enum pipe_driver_query_type
1124 PIPE_DRIVER_QUERY_TYPE_UINT64
,
1125 PIPE_DRIVER_QUERY_TYPE_UINT
,
1126 PIPE_DRIVER_QUERY_TYPE_FLOAT
,
1127 PIPE_DRIVER_QUERY_TYPE_PERCENTAGE
,
1128 PIPE_DRIVER_QUERY_TYPE_BYTES
,
1129 PIPE_DRIVER_QUERY_TYPE_MICROSECONDS
,
1130 PIPE_DRIVER_QUERY_TYPE_HZ
,
1131 PIPE_DRIVER_QUERY_TYPE_DBM
,
1132 PIPE_DRIVER_QUERY_TYPE_TEMPERATURE
,
1133 PIPE_DRIVER_QUERY_TYPE_VOLTS
,
1134 PIPE_DRIVER_QUERY_TYPE_AMPS
,
1135 PIPE_DRIVER_QUERY_TYPE_WATTS
,
1138 /* Whether an average value per frame or a cumulative value should be
1141 enum pipe_driver_query_result_type
1143 PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE
,
1144 PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE
,
1148 * Some hardware requires some hardware-specific queries to be submitted
1149 * as batched queries. The corresponding query objects are created using
1150 * create_batch_query, and at most one such query may be active at
1153 #define PIPE_DRIVER_QUERY_FLAG_BATCH (1 << 0)
1155 /* Do not list this query in the HUD. */
1156 #define PIPE_DRIVER_QUERY_FLAG_DONT_LIST (1 << 1)
1158 struct pipe_driver_query_info
1161 unsigned query_type
; /* PIPE_QUERY_DRIVER_SPECIFIC + i */
1162 union pipe_numeric_type_union max_value
; /* max value that can be returned */
1163 enum pipe_driver_query_type type
;
1164 enum pipe_driver_query_result_type result_type
;
1169 struct pipe_driver_query_group_info
1172 unsigned max_active_queries
;
1173 unsigned num_queries
;
1178 PIPE_FD_TYPE_NATIVE_SYNC
,
1179 PIPE_FD_TYPE_SYNCOBJ
,
1182 enum pipe_debug_type
1184 PIPE_DEBUG_TYPE_OUT_OF_MEMORY
= 1,
1185 PIPE_DEBUG_TYPE_ERROR
,
1186 PIPE_DEBUG_TYPE_SHADER_INFO
,
1187 PIPE_DEBUG_TYPE_PERF_INFO
,
1188 PIPE_DEBUG_TYPE_INFO
,
1189 PIPE_DEBUG_TYPE_FALLBACK
,
1190 PIPE_DEBUG_TYPE_CONFORMANCE
,
1193 #define PIPE_UUID_SIZE 16