src/gallium/include/pipe/p_shader_tokens.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * Copyright 2009-2010 VMware, Inc.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #ifndef P_SHADER_TOKENS_H
  30 #define P_SHADER_TOKENS_H
  31
  32 #ifdef __cplusplus
  33 extern "C" {
  34 #endif
  35
  36
  37 struct tgsi_header
  38 {
  39    unsigned HeaderSize : 8;
  40    unsigned BodySize   : 24;
  41 };
  42
  43 #define TGSI_PROCESSOR_FRAGMENT  0
  44 #define TGSI_PROCESSOR_VERTEX    1
  45 #define TGSI_PROCESSOR_GEOMETRY  2
  46 #define TGSI_PROCESSOR_TESS_CTRL 3
  47 #define TGSI_PROCESSOR_TESS_EVAL 4
  48 #define TGSI_PROCESSOR_COMPUTE   5
  49
  50 struct tgsi_processor
  51 {
  52    unsigned Processor  : 4;  /* TGSI_PROCESSOR_ */
  53    unsigned Padding    : 28;
  54 };
  55
  56 #define TGSI_TOKEN_TYPE_DECLARATION    0
  57 #define TGSI_TOKEN_TYPE_IMMEDIATE      1
  58 #define TGSI_TOKEN_TYPE_INSTRUCTION    2
  59 #define TGSI_TOKEN_TYPE_PROPERTY       3
  60
  61 struct tgsi_token
  62 {
  63    unsigned Type       : 4;  /**< TGSI_TOKEN_TYPE_x */
  64    unsigned NrTokens   : 8;  /**< UINT */
  65    unsigned Padding    : 20;
  66 };
  67
  68 enum tgsi_file_type {
  69    TGSI_FILE_NULL                =0,
  70    TGSI_FILE_CONSTANT            =1,
  71    TGSI_FILE_INPUT               =2,
  72    TGSI_FILE_OUTPUT              =3,
  73    TGSI_FILE_TEMPORARY           =4,
  74    TGSI_FILE_SAMPLER             =5,
  75    TGSI_FILE_ADDRESS             =6,
  76    TGSI_FILE_IMMEDIATE           =7,
  77    TGSI_FILE_PREDICATE           =8,
  78    TGSI_FILE_SYSTEM_VALUE        =9,
  79    TGSI_FILE_IMAGE               =10,
  80    TGSI_FILE_SAMPLER_VIEW        =11,
  81    TGSI_FILE_BUFFER              =12,
  82    TGSI_FILE_MEMORY              =13,
  83    TGSI_FILE_COUNT      /**< how many TGSI_FILE_ types */
  84 };
  85
  86
  87 #define TGSI_WRITEMASK_NONE     0x00
  88 #define TGSI_WRITEMASK_X        0x01
  89 #define TGSI_WRITEMASK_Y        0x02
  90 #define TGSI_WRITEMASK_XY       0x03
  91 #define TGSI_WRITEMASK_Z        0x04
  92 #define TGSI_WRITEMASK_XZ       0x05
  93 #define TGSI_WRITEMASK_YZ       0x06
  94 #define TGSI_WRITEMASK_XYZ      0x07
  95 #define TGSI_WRITEMASK_W        0x08
  96 #define TGSI_WRITEMASK_XW       0x09
  97 #define TGSI_WRITEMASK_YW       0x0A
  98 #define TGSI_WRITEMASK_XYW      0x0B
  99 #define TGSI_WRITEMASK_ZW       0x0C
 100 #define TGSI_WRITEMASK_XZW      0x0D
 101 #define TGSI_WRITEMASK_YZW      0x0E
 102 #define TGSI_WRITEMASK_XYZW     0x0F
 103
 104 #define TGSI_INTERPOLATE_CONSTANT      0
 105 #define TGSI_INTERPOLATE_LINEAR        1
 106 #define TGSI_INTERPOLATE_PERSPECTIVE   2
 107 #define TGSI_INTERPOLATE_COLOR         3 /* special color case for smooth/flat */
 108 #define TGSI_INTERPOLATE_COUNT         4
 109
 110 #define TGSI_INTERPOLATE_LOC_CENTER    0
 111 #define TGSI_INTERPOLATE_LOC_CENTROID  1
 112 #define TGSI_INTERPOLATE_LOC_SAMPLE    2
 113 #define TGSI_INTERPOLATE_LOC_COUNT     3
 114
 115 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
 116 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
 117 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
 118 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
 119
 120 #define TGSI_MEMORY_TYPE_GLOBAL        0 /* OpenCL global              */
 121 #define TGSI_MEMORY_TYPE_SHARED        1 /* OpenCL local / GLSL shared */
 122 #define TGSI_MEMORY_TYPE_PRIVATE       2 /* OpenCL private             */
 123 #define TGSI_MEMORY_TYPE_INPUT         3 /* OpenCL kernel input params */
 124 #define TGSI_MEMORY_TYPE_COUNT         4
 125
 126 struct tgsi_declaration
 127 {
 128    unsigned Type        : 4;  /**< TGSI_TOKEN_TYPE_DECLARATION */
 129    unsigned NrTokens    : 8;  /**< UINT */
 130    unsigned File        : 4;  /**< one of TGSI_FILE_x */
 131    unsigned UsageMask   : 4;  /**< bitmask of TGSI_WRITEMASK_x flags */
 132    unsigned Dimension   : 1;  /**< any extra dimension info? */
 133    unsigned Semantic    : 1;  /**< BOOL, any semantic info? */
 134    unsigned Interpolate : 1;  /**< any interpolation info? */
 135    unsigned Invariant   : 1;  /**< invariant optimization? */
 136    unsigned Local       : 1;  /**< optimize as subroutine local variable? */
 137    unsigned Array       : 1;  /**< extra array info? */
 138    unsigned Atomic      : 1;  /**< atomic only? for TGSI_FILE_BUFFER */
 139    unsigned MemType     : 2;  /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
 140    unsigned Padding     : 3;
 141 };
 142
 143 struct tgsi_declaration_range
 144 {
 145    unsigned First   : 16; /**< UINT */
 146    unsigned Last    : 16; /**< UINT */
 147 };
 148
 149 struct tgsi_declaration_dimension
 150 {
 151    unsigned Index2D:16; /**< UINT */
 152    unsigned Padding:16;
 153 };
 154
 155 struct tgsi_declaration_interp
 156 {
 157    unsigned Interpolate : 4;   /**< one of TGSI_INTERPOLATE_x */
 158    unsigned Location    : 2;   /**< one of TGSI_INTERPOLATE_LOC_x */
 159    unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
 160    unsigned Padding     : 22;
 161 };
 162
 163 #define TGSI_SEMANTIC_POSITION   0
 164 #define TGSI_SEMANTIC_COLOR      1
 165 #define TGSI_SEMANTIC_BCOLOR     2  /**< back-face color */
 166 #define TGSI_SEMANTIC_FOG        3
 167 #define TGSI_SEMANTIC_PSIZE      4
 168 #define TGSI_SEMANTIC_GENERIC    5
 169 #define TGSI_SEMANTIC_NORMAL     6
 170 #define TGSI_SEMANTIC_FACE       7
 171 #define TGSI_SEMANTIC_EDGEFLAG   8
 172 #define TGSI_SEMANTIC_PRIMID     9
 173 #define TGSI_SEMANTIC_INSTANCEID 10 /**< doesn't include start_instance */
 174 #define TGSI_SEMANTIC_VERTEXID   11
 175 #define TGSI_SEMANTIC_STENCIL    12
 176 #define TGSI_SEMANTIC_CLIPDIST   13
 177 #define TGSI_SEMANTIC_CLIPVERTEX 14
 178 #define TGSI_SEMANTIC_GRID_SIZE  15 /**< grid size in blocks */
 179 #define TGSI_SEMANTIC_BLOCK_ID   16 /**< id of the current block */
 180 #define TGSI_SEMANTIC_BLOCK_SIZE 17 /**< block size in threads */
 181 #define TGSI_SEMANTIC_THREAD_ID  18 /**< block-relative id of the current thread */
 182 #define TGSI_SEMANTIC_TEXCOORD   19 /**< texture or sprite coordinates */
 183 #define TGSI_SEMANTIC_PCOORD     20 /**< point sprite coordinate */
 184 #define TGSI_SEMANTIC_VIEWPORT_INDEX 21 /**< viewport index */
 185 #define TGSI_SEMANTIC_LAYER      22 /**< layer (rendertarget index) */
 186 #define TGSI_SEMANTIC_CULLDIST   23
 187 #define TGSI_SEMANTIC_SAMPLEID   24
 188 #define TGSI_SEMANTIC_SAMPLEPOS  25
 189 #define TGSI_SEMANTIC_SAMPLEMASK 26
 190 #define TGSI_SEMANTIC_INVOCATIONID 27
 191 #define TGSI_SEMANTIC_VERTEXID_NOBASE 28
 192 #define TGSI_SEMANTIC_BASEVERTEX 29
 193 #define TGSI_SEMANTIC_PATCH      30 /**< generic per-patch semantic */
 194 #define TGSI_SEMANTIC_TESSCOORD  31 /**< coordinate being processed by tess */
 195 #define TGSI_SEMANTIC_TESSOUTER  32 /**< outer tessellation levels */
 196 #define TGSI_SEMANTIC_TESSINNER  33 /**< inner tessellation levels */
 197 #define TGSI_SEMANTIC_VERTICESIN 34 /**< number of input vertices */
 198 #define TGSI_SEMANTIC_HELPER_INVOCATION 35 /**< current invocation is helper */
 199 #define TGSI_SEMANTIC_BASEINSTANCE 36
 200 #define TGSI_SEMANTIC_DRAWID     37
 201 #define TGSI_SEMANTIC_COUNT      38 /**< number of semantic values */
 202
 203 struct tgsi_declaration_semantic
 204 {
 205    unsigned Name           : 8;  /**< one of TGSI_SEMANTIC_x */
 206    unsigned Index          : 16; /**< UINT */
 207    unsigned Padding        : 8;
 208 };
 209
 210 struct tgsi_declaration_image {
 211    unsigned Resource    : 8; /**< one of TGSI_TEXTURE_ */
 212    unsigned Raw         : 1;
 213    unsigned Writable    : 1;
 214    unsigned Format      : 10; /**< one of PIPE_FORMAT_ */
 215    unsigned Padding     : 12;
 216 };
 217
 218 enum tgsi_return_type {
 219    TGSI_RETURN_TYPE_UNORM = 0,
 220    TGSI_RETURN_TYPE_SNORM,
 221    TGSI_RETURN_TYPE_SINT,
 222    TGSI_RETURN_TYPE_UINT,
 223    TGSI_RETURN_TYPE_FLOAT,
 224    TGSI_RETURN_TYPE_COUNT
 225 };
 226
 227 struct tgsi_declaration_sampler_view {
 228    unsigned Resource    : 8; /**< one of TGSI_TEXTURE_ */
 229    unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */
 230    unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */
 231    unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */
 232    unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */
 233 };
 234
 235 struct tgsi_declaration_array {
 236    unsigned ArrayID : 10;
 237    unsigned Padding : 22;
 238 };
 239
 240 #define TGSI_IMM_FLOAT32   0
 241 #define TGSI_IMM_UINT32    1
 242 #define TGSI_IMM_INT32     2
 243 #define TGSI_IMM_FLOAT64   3
 244
 245 struct tgsi_immediate
 246 {
 247    unsigned Type       : 4;  /**< TGSI_TOKEN_TYPE_IMMEDIATE */
 248    unsigned NrTokens   : 14; /**< UINT */
 249    unsigned DataType   : 4;  /**< one of TGSI_IMM_x */
 250    unsigned Padding    : 10;
 251 };
 252
 253 union tgsi_immediate_data
 254 {
 255    float Float;
 256    unsigned Uint;
 257    int Int;
 258 };
 259
 260 #define TGSI_PROPERTY_GS_INPUT_PRIM          0
 261 #define TGSI_PROPERTY_GS_OUTPUT_PRIM         1
 262 #define TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES 2
 263 #define TGSI_PROPERTY_FS_COORD_ORIGIN        3
 264 #define TGSI_PROPERTY_FS_COORD_PIXEL_CENTER  4
 265 #define TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS 5
 266 #define TGSI_PROPERTY_FS_DEPTH_LAYOUT        6
 267 #define TGSI_PROPERTY_VS_PROHIBIT_UCPS       7
 268 #define TGSI_PROPERTY_GS_INVOCATIONS         8
 269 #define TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION 9
 270 #define TGSI_PROPERTY_TCS_VERTICES_OUT       10
 271 #define TGSI_PROPERTY_TES_PRIM_MODE          11
 272 #define TGSI_PROPERTY_TES_SPACING            12
 273 #define TGSI_PROPERTY_TES_VERTEX_ORDER_CW    13
 274 #define TGSI_PROPERTY_TES_POINT_MODE         14
 275 #define TGSI_PROPERTY_NUM_CLIPDIST_ENABLED   15
 276 #define TGSI_PROPERTY_NUM_CULLDIST_ENABLED   16
 277 #define TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL 17
 278 #define TGSI_PROPERTY_NEXT_SHADER            18
 279 #define TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH   19
 280 #define TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT  20
 281 #define TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH   21
 282 #define TGSI_PROPERTY_COUNT                  22
 283
 284 struct tgsi_property {
 285    unsigned Type         : 4;  /**< TGSI_TOKEN_TYPE_PROPERTY */
 286    unsigned NrTokens     : 8;  /**< UINT */
 287    unsigned PropertyName : 8;  /**< one of TGSI_PROPERTY */
 288    unsigned Padding      : 12;
 289 };
 290
 291 #define TGSI_FS_COORD_ORIGIN_UPPER_LEFT 0
 292 #define TGSI_FS_COORD_ORIGIN_LOWER_LEFT 1
 293
 294 #define TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER 0
 295 #define TGSI_FS_COORD_PIXEL_CENTER_INTEGER 1
 296
 297 #define TGSI_FS_DEPTH_LAYOUT_NONE         0
 298 #define TGSI_FS_DEPTH_LAYOUT_ANY          1
 299 #define TGSI_FS_DEPTH_LAYOUT_GREATER      2
 300 #define TGSI_FS_DEPTH_LAYOUT_LESS         3
 301 #define TGSI_FS_DEPTH_LAYOUT_UNCHANGED    4
 302
 303
 304 struct tgsi_property_data {
 305    unsigned Data;
 306 };
 307
 308 /* TGSI opcodes.
 309  *
 310  * For more information on semantics of opcodes and
 311  * which APIs are known to use which opcodes, see
 312  * gallium/docs/source/tgsi.rst
 313  */
 314 #define TGSI_OPCODE_ARL                 0
 315 #define TGSI_OPCODE_MOV                 1
 316 #define TGSI_OPCODE_LIT                 2
 317 #define TGSI_OPCODE_RCP                 3
 318 #define TGSI_OPCODE_RSQ                 4
 319 #define TGSI_OPCODE_EXP                 5
 320 #define TGSI_OPCODE_LOG                 6
 321 #define TGSI_OPCODE_MUL                 7
 322 #define TGSI_OPCODE_ADD                 8
 323 #define TGSI_OPCODE_DP3                 9
 324 #define TGSI_OPCODE_DP4                 10
 325 #define TGSI_OPCODE_DST                 11
 326 #define TGSI_OPCODE_MIN                 12
 327 #define TGSI_OPCODE_MAX                 13
 328 #define TGSI_OPCODE_SLT                 14
 329 #define TGSI_OPCODE_SGE                 15
 330 #define TGSI_OPCODE_MAD                 16
 331 #define TGSI_OPCODE_SUB                 17
 332 #define TGSI_OPCODE_LRP                 18
 333 #define TGSI_OPCODE_FMA                 19
 334 #define TGSI_OPCODE_SQRT                20
 335 #define TGSI_OPCODE_DP2A                21
 336                                 /* gap */
 337 #define TGSI_OPCODE_FRC                 24
 338 #define TGSI_OPCODE_CLAMP               25
 339 #define TGSI_OPCODE_FLR                 26
 340 #define TGSI_OPCODE_ROUND               27
 341 #define TGSI_OPCODE_EX2                 28
 342 #define TGSI_OPCODE_LG2                 29
 343 #define TGSI_OPCODE_POW                 30
 344 #define TGSI_OPCODE_XPD                 31
 345                                 /* gap */
 346 #define TGSI_OPCODE_ABS                 33
 347                                 /* gap */
 348 #define TGSI_OPCODE_DPH                 35
 349 #define TGSI_OPCODE_COS                 36
 350 #define TGSI_OPCODE_DDX                 37
 351 #define TGSI_OPCODE_DDY                 38
 352 #define TGSI_OPCODE_KILL                39 /* unconditional */
 353 #define TGSI_OPCODE_PK2H                40
 354 #define TGSI_OPCODE_PK2US               41
 355 #define TGSI_OPCODE_PK4B                42
 356 #define TGSI_OPCODE_PK4UB               43
 357                                 /* gap */
 358 #define TGSI_OPCODE_SEQ                 45
 359                                 /* gap */
 360 #define TGSI_OPCODE_SGT                 47
 361 #define TGSI_OPCODE_SIN                 48
 362 #define TGSI_OPCODE_SLE                 49
 363 #define TGSI_OPCODE_SNE                 50
 364                                 /* gap */
 365 #define TGSI_OPCODE_TEX                 52
 366 #define TGSI_OPCODE_TXD                 53
 367 #define TGSI_OPCODE_TXP                 54
 368 #define TGSI_OPCODE_UP2H                55
 369 #define TGSI_OPCODE_UP2US               56
 370 #define TGSI_OPCODE_UP4B                57
 371 #define TGSI_OPCODE_UP4UB               58
 372                                 /* gap */
 373 #define TGSI_OPCODE_ARR                 61
 374                                 /* gap */
 375 #define TGSI_OPCODE_CAL                 63
 376 #define TGSI_OPCODE_RET                 64
 377 #define TGSI_OPCODE_SSG                 65 /* SGN */
 378 #define TGSI_OPCODE_CMP                 66
 379 #define TGSI_OPCODE_SCS                 67
 380 #define TGSI_OPCODE_TXB                 68
 381                                 /* gap */
 382 #define TGSI_OPCODE_DIV                 70
 383 #define TGSI_OPCODE_DP2                 71
 384 #define TGSI_OPCODE_TXL                 72
 385 #define TGSI_OPCODE_BRK                 73
 386 #define TGSI_OPCODE_IF                  74
 387 #define TGSI_OPCODE_UIF                 75
 388 #define TGSI_OPCODE_ELSE                77
 389 #define TGSI_OPCODE_ENDIF               78
 390
 391 #define TGSI_OPCODE_DDX_FINE            79
 392 #define TGSI_OPCODE_DDY_FINE            80
 393
 394 #define TGSI_OPCODE_PUSHA               81
 395 #define TGSI_OPCODE_POPA                82
 396 #define TGSI_OPCODE_CEIL                83
 397 #define TGSI_OPCODE_I2F                 84
 398 #define TGSI_OPCODE_NOT                 85
 399 #define TGSI_OPCODE_TRUNC               86
 400 #define TGSI_OPCODE_SHL                 87
 401                                 /* gap */
 402 #define TGSI_OPCODE_AND                 89
 403 #define TGSI_OPCODE_OR                  90
 404 #define TGSI_OPCODE_MOD                 91
 405 #define TGSI_OPCODE_XOR                 92
 406 #define TGSI_OPCODE_SAD                 93
 407 #define TGSI_OPCODE_TXF                 94
 408 #define TGSI_OPCODE_TXQ                 95
 409 #define TGSI_OPCODE_CONT                96
 410 #define TGSI_OPCODE_EMIT                97
 411 #define TGSI_OPCODE_ENDPRIM             98
 412 #define TGSI_OPCODE_BGNLOOP             99
 413 #define TGSI_OPCODE_BGNSUB              100
 414 #define TGSI_OPCODE_ENDLOOP             101
 415 #define TGSI_OPCODE_ENDSUB              102
 416 #define TGSI_OPCODE_TXQ_LZ              103 /* TXQ for mipmap level 0 */
 417 #define TGSI_OPCODE_TXQS                104
 418 #define TGSI_OPCODE_RESQ                105
 419                                 /* gap */
 420 #define TGSI_OPCODE_NOP                 107
 421
 422 #define TGSI_OPCODE_FSEQ                108
 423 #define TGSI_OPCODE_FSGE                109
 424 #define TGSI_OPCODE_FSLT                110
 425 #define TGSI_OPCODE_FSNE                111
 426
 427 #define TGSI_OPCODE_MEMBAR              112
 428 #define TGSI_OPCODE_CALLNZ              113
 429                                 /* gap */
 430 #define TGSI_OPCODE_BREAKC              115
 431 #define TGSI_OPCODE_KILL_IF             116  /* conditional kill */
 432 #define TGSI_OPCODE_END                 117  /* aka HALT */
 433 #define TGSI_OPCODE_DFMA                118
 434 #define TGSI_OPCODE_F2I                 119
 435 #define TGSI_OPCODE_IDIV                120
 436 #define TGSI_OPCODE_IMAX                121
 437 #define TGSI_OPCODE_IMIN                122
 438 #define TGSI_OPCODE_INEG                123
 439 #define TGSI_OPCODE_ISGE                124
 440 #define TGSI_OPCODE_ISHR                125
 441 #define TGSI_OPCODE_ISLT                126
 442 #define TGSI_OPCODE_F2U                 127
 443 #define TGSI_OPCODE_U2F                 128
 444 #define TGSI_OPCODE_UADD                129
 445 #define TGSI_OPCODE_UDIV                130
 446 #define TGSI_OPCODE_UMAD                131
 447 #define TGSI_OPCODE_UMAX                132
 448 #define TGSI_OPCODE_UMIN                133
 449 #define TGSI_OPCODE_UMOD                134
 450 #define TGSI_OPCODE_UMUL                135
 451 #define TGSI_OPCODE_USEQ                136
 452 #define TGSI_OPCODE_USGE                137
 453 #define TGSI_OPCODE_USHR                138
 454 #define TGSI_OPCODE_USLT                139
 455 #define TGSI_OPCODE_USNE                140
 456 #define TGSI_OPCODE_SWITCH              141
 457 #define TGSI_OPCODE_CASE                142
 458 #define TGSI_OPCODE_DEFAULT             143
 459 #define TGSI_OPCODE_ENDSWITCH           144
 460
 461 /* resource related opcodes */
 462 #define TGSI_OPCODE_SAMPLE              145
 463 #define TGSI_OPCODE_SAMPLE_I            146
 464 #define TGSI_OPCODE_SAMPLE_I_MS         147
 465 #define TGSI_OPCODE_SAMPLE_B            148
 466 #define TGSI_OPCODE_SAMPLE_C            149
 467 #define TGSI_OPCODE_SAMPLE_C_LZ         150
 468 #define TGSI_OPCODE_SAMPLE_D            151
 469 #define TGSI_OPCODE_SAMPLE_L            152
 470 #define TGSI_OPCODE_GATHER4             153
 471 #define TGSI_OPCODE_SVIEWINFO           154
 472 #define TGSI_OPCODE_SAMPLE_POS          155
 473 #define TGSI_OPCODE_SAMPLE_INFO         156
 474
 475 #define TGSI_OPCODE_UARL                157
 476 #define TGSI_OPCODE_UCMP                158
 477 #define TGSI_OPCODE_IABS                159
 478 #define TGSI_OPCODE_ISSG                160
 479
 480 #define TGSI_OPCODE_LOAD                161
 481 #define TGSI_OPCODE_STORE               162
 482
 483 #define TGSI_OPCODE_MFENCE              163
 484 #define TGSI_OPCODE_LFENCE              164
 485 #define TGSI_OPCODE_SFENCE              165
 486 #define TGSI_OPCODE_BARRIER             166
 487
 488 #define TGSI_OPCODE_ATOMUADD            167
 489 #define TGSI_OPCODE_ATOMXCHG            168
 490 #define TGSI_OPCODE_ATOMCAS             169
 491 #define TGSI_OPCODE_ATOMAND             170
 492 #define TGSI_OPCODE_ATOMOR              171
 493 #define TGSI_OPCODE_ATOMXOR             172
 494 #define TGSI_OPCODE_ATOMUMIN            173
 495 #define TGSI_OPCODE_ATOMUMAX            174
 496 #define TGSI_OPCODE_ATOMIMIN            175
 497 #define TGSI_OPCODE_ATOMIMAX            176
 498
 499 /* to be used for shadow cube map compares */
 500 #define TGSI_OPCODE_TEX2                177
 501 #define TGSI_OPCODE_TXB2                178
 502 #define TGSI_OPCODE_TXL2                179
 503
 504 #define TGSI_OPCODE_IMUL_HI             180
 505 #define TGSI_OPCODE_UMUL_HI             181
 506
 507 #define TGSI_OPCODE_TG4                 182
 508
 509 #define TGSI_OPCODE_LODQ                183
 510
 511 #define TGSI_OPCODE_IBFE                184
 512 #define TGSI_OPCODE_UBFE                185
 513 #define TGSI_OPCODE_BFI                 186
 514 #define TGSI_OPCODE_BREV                187
 515 #define TGSI_OPCODE_POPC                188
 516 #define TGSI_OPCODE_LSB                 189
 517 #define TGSI_OPCODE_IMSB                190
 518 #define TGSI_OPCODE_UMSB                191
 519
 520 #define TGSI_OPCODE_INTERP_CENTROID     192
 521 #define TGSI_OPCODE_INTERP_SAMPLE       193
 522 #define TGSI_OPCODE_INTERP_OFFSET       194
 523
 524 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
 525 #define TGSI_OPCODE_F2D                 195 /* SM5 */
 526 #define TGSI_OPCODE_D2F                 196
 527 #define TGSI_OPCODE_DABS                197
 528 #define TGSI_OPCODE_DNEG                198 /* SM5 */
 529 #define TGSI_OPCODE_DADD                199 /* SM5 */
 530 #define TGSI_OPCODE_DMUL                200 /* SM5 */
 531 #define TGSI_OPCODE_DMAX                201 /* SM5 */
 532 #define TGSI_OPCODE_DMIN                202 /* SM5 */
 533 #define TGSI_OPCODE_DSLT                203 /* SM5 */
 534 #define TGSI_OPCODE_DSGE                204 /* SM5 */
 535 #define TGSI_OPCODE_DSEQ                205 /* SM5 */
 536 #define TGSI_OPCODE_DSNE                206 /* SM5 */
 537 #define TGSI_OPCODE_DRCP                207 /* eg, cayman */
 538 #define TGSI_OPCODE_DSQRT               208 /* eg, cayman also has DRSQ */
 539 #define TGSI_OPCODE_DMAD                209
 540 #define TGSI_OPCODE_DFRAC               210 /* eg, cayman */
 541 #define TGSI_OPCODE_DLDEXP              211 /* eg, cayman */
 542 #define TGSI_OPCODE_DFRACEXP            212 /* eg, cayman */
 543 #define TGSI_OPCODE_D2I                 213
 544 #define TGSI_OPCODE_I2D                 214
 545 #define TGSI_OPCODE_D2U                 215
 546 #define TGSI_OPCODE_U2D                 216
 547 #define TGSI_OPCODE_DRSQ                217 /* eg, cayman also has DRSQ */
 548 #define TGSI_OPCODE_DTRUNC              218 /* nvc0 */
 549 #define TGSI_OPCODE_DCEIL               219 /* nvc0 */
 550 #define TGSI_OPCODE_DFLR                220 /* nvc0 */
 551 #define TGSI_OPCODE_DROUND              221 /* nvc0 */
 552 #define TGSI_OPCODE_DSSG                222
 553 #define TGSI_OPCODE_LAST                223
 554
 555 /**
 556  * Opcode is the operation code to execute. A given operation defines the
 557  * semantics how the source registers (if any) are interpreted and what is
 558  * written to the destination registers (if any) as a result of execution.
 559  *
 560  * NumDstRegs and NumSrcRegs is the number of destination and source registers,
 561  * respectively. For a given operation code, those numbers are fixed and are
 562  * present here only for convenience.
 563  *
 564  * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
 565  *
 566  * Saturate controls how are final results in destination registers modified.
 567  */
 568
 569 struct tgsi_instruction
 570 {
 571    unsigned Type       : 4;  /* TGSI_TOKEN_TYPE_INSTRUCTION */
 572    unsigned NrTokens   : 8;  /* UINT */
 573    unsigned Opcode     : 8;  /* TGSI_OPCODE_ */
 574    unsigned Saturate   : 1;  /* BOOL */
 575    unsigned NumDstRegs : 2;  /* UINT */
 576    unsigned NumSrcRegs : 4;  /* UINT */
 577    unsigned Predicate  : 1;  /* BOOL */
 578    unsigned Label      : 1;
 579    unsigned Texture    : 1;
 580    unsigned Memory     : 1;
 581    unsigned Padding    : 1;
 582 };
 583
 584 /*
 585  * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
 586  *
 587  * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
 588  *   if texture instruction has a number of offsets,
 589  *   then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
 590  *
 591  * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
 592  *
 593  * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
 594  *
 595  * tgsi_instruction::NrTokens contains the total number of words that make the
 596  * instruction, including the instruction word.
 597  */
 598
 599 #define TGSI_SWIZZLE_X      0
 600 #define TGSI_SWIZZLE_Y      1
 601 #define TGSI_SWIZZLE_Z      2
 602 #define TGSI_SWIZZLE_W      3
 603
 604 struct tgsi_instruction_label
 605 {
 606    unsigned Label    : 24;   /* UINT */
 607    unsigned Padding  : 8;
 608 };
 609
 610 #define TGSI_TEXTURE_BUFFER         0
 611 #define TGSI_TEXTURE_1D             1
 612 #define TGSI_TEXTURE_2D             2
 613 #define TGSI_TEXTURE_3D             3
 614 #define TGSI_TEXTURE_CUBE           4
 615 #define TGSI_TEXTURE_RECT           5
 616 #define TGSI_TEXTURE_SHADOW1D       6
 617 #define TGSI_TEXTURE_SHADOW2D       7
 618 #define TGSI_TEXTURE_SHADOWRECT     8
 619 #define TGSI_TEXTURE_1D_ARRAY       9
 620 #define TGSI_TEXTURE_2D_ARRAY       10
 621 #define TGSI_TEXTURE_SHADOW1D_ARRAY 11
 622 #define TGSI_TEXTURE_SHADOW2D_ARRAY 12
 623 #define TGSI_TEXTURE_SHADOWCUBE     13
 624 #define TGSI_TEXTURE_2D_MSAA        14
 625 #define TGSI_TEXTURE_2D_ARRAY_MSAA  15
 626 #define TGSI_TEXTURE_CUBE_ARRAY     16
 627 #define TGSI_TEXTURE_SHADOWCUBE_ARRAY 17
 628 #define TGSI_TEXTURE_UNKNOWN        18
 629 #define TGSI_TEXTURE_COUNT          19
 630
 631 struct tgsi_instruction_texture
 632 {
 633    unsigned Texture  : 8;    /* TGSI_TEXTURE_ */
 634    unsigned NumOffsets : 4;
 635    unsigned Padding : 20;
 636 };
 637
 638 /* for texture offsets in GLSL and DirectX.
 639  * Generally these always come from TGSI_FILE_IMMEDIATE,
 640  * however DX11 appears to have the capability to do
 641  * non-constant texture offsets.
 642  */
 643 struct tgsi_texture_offset
 644 {
 645    int      Index    : 16;
 646    unsigned File     : 4;  /**< one of TGSI_FILE_x */
 647    unsigned SwizzleX : 2;  /* TGSI_SWIZZLE_x */
 648    unsigned SwizzleY : 2;  /* TGSI_SWIZZLE_x */
 649    unsigned SwizzleZ : 2;  /* TGSI_SWIZZLE_x */
 650    unsigned Padding  : 6;
 651 };
 652
 653 /*
 654  * For SM3, the following constraint applies.
 655  *   - Swizzle is either set to identity or replicate.
 656  */
 657 struct tgsi_instruction_predicate
 658 {
 659    int      Index    : 16; /* SINT */
 660    unsigned SwizzleX : 2;  /* TGSI_SWIZZLE_x */
 661    unsigned SwizzleY : 2;  /* TGSI_SWIZZLE_x */
 662    unsigned SwizzleZ : 2;  /* TGSI_SWIZZLE_x */
 663    unsigned SwizzleW : 2;  /* TGSI_SWIZZLE_x */
 664    unsigned Negate   : 1;  /* BOOL */
 665    unsigned Padding  : 7;
 666 };
 667
 668 /**
 669  * File specifies the register array to access.
 670  *
 671  * Index specifies the element number of a register in the register file.
 672  *
 673  * If Indirect is TRUE, Index should be offset by the X component of the indirect
 674  * register that follows. The register can be now fetched into local storage
 675  * for further processing.
 676  *
 677  * If Negate is TRUE, all components of the fetched register are negated.
 678  *
 679  * The fetched register components are swizzled according to SwizzleX, SwizzleY,
 680  * SwizzleZ and SwizzleW.
 681  *
 682  */
 683
 684 struct tgsi_src_register
 685 {
 686    unsigned File        : 4;  /* TGSI_FILE_ */
 687    unsigned Indirect    : 1;  /* BOOL */
 688    unsigned Dimension   : 1;  /* BOOL */
 689    int      Index       : 16; /* SINT */
 690    unsigned SwizzleX    : 2;  /* TGSI_SWIZZLE_ */
 691    unsigned SwizzleY    : 2;  /* TGSI_SWIZZLE_ */
 692    unsigned SwizzleZ    : 2;  /* TGSI_SWIZZLE_ */
 693    unsigned SwizzleW    : 2;  /* TGSI_SWIZZLE_ */
 694    unsigned Absolute    : 1;    /* BOOL */
 695    unsigned Negate      : 1;    /* BOOL */
 696 };
 697
 698 /**
 699  * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
 700  *
 701  * File, Index and Swizzle are handled the same as in tgsi_src_register.
 702  *
 703  * If ArrayID is zero the whole register file might be indirectly addressed,
 704  * if not only the Declaration with this ArrayID is accessed by this operand.
 705  *
 706  */
 707
 708 struct tgsi_ind_register
 709 {
 710    unsigned File    : 4;  /* TGSI_FILE_ */
 711    int      Index   : 16; /* SINT */
 712    unsigned Swizzle : 2;  /* TGSI_SWIZZLE_ */
 713    unsigned ArrayID : 10; /* UINT */
 714 };
 715
 716 /**
 717  * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
 718  */
 719
 720 struct tgsi_dimension
 721 {
 722    unsigned Indirect    : 1;  /* BOOL */
 723    unsigned Dimension   : 1;  /* BOOL */
 724    unsigned Padding     : 14;
 725    int      Index       : 16; /* SINT */
 726 };
 727
 728 struct tgsi_dst_register
 729 {
 730    unsigned File        : 4;  /* TGSI_FILE_ */
 731    unsigned WriteMask   : 4;  /* TGSI_WRITEMASK_ */
 732    unsigned Indirect    : 1;  /* BOOL */
 733    unsigned Dimension   : 1;  /* BOOL */
 734    int      Index       : 16; /* SINT */
 735    unsigned Padding     : 6;
 736 };
 737
 738 #define TGSI_MEMORY_COHERENT (1 << 0)
 739 #define TGSI_MEMORY_RESTRICT (1 << 1)
 740 #define TGSI_MEMORY_VOLATILE (1 << 2)
 741
 742 /**
 743  * Specifies the type of memory access to do for the LOAD/STORE instruction.
 744  */
 745 struct tgsi_instruction_memory
 746 {
 747    unsigned Qualifier : 3;  /* TGSI_MEMORY_ */
 748    unsigned Texture   : 8;  /* only for images: TGSI_TEXTURE_ */
 749    unsigned Format    : 10; /* only for images: PIPE_FORMAT_ */
 750    unsigned Padding   : 11;
 751 };
 752
 753 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
 754 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
 755 #define TGSI_MEMBAR_SHADER_IMAGE  (1 << 2)
 756 #define TGSI_MEMBAR_SHARED        (1 << 3)
 757 #define TGSI_MEMBAR_THREAD_GROUP  (1 << 4)
 758
 759 #ifdef __cplusplus
 760 }
 761 #endif
 762
 763 #endif /* P_SHADER_TOKENS_H */