gallium: add new LOD opcode
[mesa.git] / src / gallium / include / pipe / p_shader_tokens.h
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
5 * All Rights Reserved.
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12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
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17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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28
29 #ifndef P_SHADER_TOKENS_H
30 #define P_SHADER_TOKENS_H
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36
37 struct tgsi_header
38 {
39 unsigned HeaderSize : 8;
40 unsigned BodySize : 24;
41 };
42
43 struct tgsi_processor
44 {
45 unsigned Processor : 4; /* PIPE_SHADER_ */
46 unsigned Padding : 28;
47 };
48
49 enum tgsi_token_type {
50 TGSI_TOKEN_TYPE_DECLARATION,
51 TGSI_TOKEN_TYPE_IMMEDIATE,
52 TGSI_TOKEN_TYPE_INSTRUCTION,
53 TGSI_TOKEN_TYPE_PROPERTY,
54 };
55
56 struct tgsi_token
57 {
58 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_x */
59 unsigned NrTokens : 8; /**< UINT */
60 unsigned Padding : 20;
61 };
62
63 enum tgsi_file_type {
64 TGSI_FILE_NULL,
65 TGSI_FILE_CONSTANT,
66 TGSI_FILE_INPUT,
67 TGSI_FILE_OUTPUT,
68 TGSI_FILE_TEMPORARY,
69 TGSI_FILE_SAMPLER,
70 TGSI_FILE_ADDRESS,
71 TGSI_FILE_IMMEDIATE,
72 TGSI_FILE_SYSTEM_VALUE,
73 TGSI_FILE_IMAGE,
74 TGSI_FILE_SAMPLER_VIEW,
75 TGSI_FILE_BUFFER,
76 TGSI_FILE_MEMORY,
77 TGSI_FILE_CONSTBUF,
78 TGSI_FILE_COUNT, /**< how many TGSI_FILE_ types */
79 };
80
81
82 #define TGSI_WRITEMASK_NONE 0x00
83 #define TGSI_WRITEMASK_X 0x01
84 #define TGSI_WRITEMASK_Y 0x02
85 #define TGSI_WRITEMASK_XY 0x03
86 #define TGSI_WRITEMASK_Z 0x04
87 #define TGSI_WRITEMASK_XZ 0x05
88 #define TGSI_WRITEMASK_YZ 0x06
89 #define TGSI_WRITEMASK_XYZ 0x07
90 #define TGSI_WRITEMASK_W 0x08
91 #define TGSI_WRITEMASK_XW 0x09
92 #define TGSI_WRITEMASK_YW 0x0A
93 #define TGSI_WRITEMASK_XYW 0x0B
94 #define TGSI_WRITEMASK_ZW 0x0C
95 #define TGSI_WRITEMASK_XZW 0x0D
96 #define TGSI_WRITEMASK_YZW 0x0E
97 #define TGSI_WRITEMASK_XYZW 0x0F
98
99 enum tgsi_interpolate_mode {
100 TGSI_INTERPOLATE_CONSTANT,
101 TGSI_INTERPOLATE_LINEAR,
102 TGSI_INTERPOLATE_PERSPECTIVE,
103 TGSI_INTERPOLATE_COLOR, /* special color case for smooth/flat */
104 TGSI_INTERPOLATE_COUNT,
105 };
106
107 enum tgsi_interpolate_loc {
108 TGSI_INTERPOLATE_LOC_CENTER,
109 TGSI_INTERPOLATE_LOC_CENTROID,
110 TGSI_INTERPOLATE_LOC_SAMPLE,
111 TGSI_INTERPOLATE_LOC_COUNT,
112 };
113
114 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
115 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
116 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
117 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
118
119 enum tgsi_memory_type {
120 TGSI_MEMORY_TYPE_GLOBAL, /* OpenCL global */
121 TGSI_MEMORY_TYPE_SHARED, /* OpenCL local / GLSL shared */
122 TGSI_MEMORY_TYPE_PRIVATE, /* OpenCL private */
123 TGSI_MEMORY_TYPE_INPUT, /* OpenCL kernel input params */
124 TGSI_MEMORY_TYPE_COUNT,
125 };
126
127 struct tgsi_declaration
128 {
129 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_DECLARATION */
130 unsigned NrTokens : 8; /**< UINT */
131 unsigned File : 4; /**< one of TGSI_FILE_x */
132 unsigned UsageMask : 4; /**< bitmask of TGSI_WRITEMASK_x flags */
133 unsigned Dimension : 1; /**< any extra dimension info? */
134 unsigned Semantic : 1; /**< BOOL, any semantic info? */
135 unsigned Interpolate : 1; /**< any interpolation info? */
136 unsigned Invariant : 1; /**< invariant optimization? */
137 unsigned Local : 1; /**< optimize as subroutine local variable? */
138 unsigned Array : 1; /**< extra array info? */
139 unsigned Atomic : 1; /**< atomic only? for TGSI_FILE_BUFFER */
140 unsigned MemType : 2; /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
141 unsigned Padding : 3;
142 };
143
144 struct tgsi_declaration_range
145 {
146 unsigned First : 16; /**< UINT */
147 unsigned Last : 16; /**< UINT */
148 };
149
150 struct tgsi_declaration_dimension
151 {
152 unsigned Index2D:16; /**< UINT */
153 unsigned Padding:16;
154 };
155
156 struct tgsi_declaration_interp
157 {
158 unsigned Interpolate : 4; /**< one of TGSI_INTERPOLATE_x */
159 unsigned Location : 2; /**< one of TGSI_INTERPOLATE_LOC_x */
160 unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
161 unsigned Padding : 22;
162 };
163
164 enum tgsi_semantic {
165 TGSI_SEMANTIC_POSITION,
166 TGSI_SEMANTIC_COLOR,
167 TGSI_SEMANTIC_BCOLOR, /**< back-face color */
168 TGSI_SEMANTIC_FOG,
169 TGSI_SEMANTIC_PSIZE,
170 TGSI_SEMANTIC_GENERIC,
171 TGSI_SEMANTIC_NORMAL,
172 TGSI_SEMANTIC_FACE,
173 TGSI_SEMANTIC_EDGEFLAG,
174 TGSI_SEMANTIC_PRIMID,
175 TGSI_SEMANTIC_INSTANCEID, /**< doesn't include start_instance */
176 TGSI_SEMANTIC_VERTEXID,
177 TGSI_SEMANTIC_STENCIL,
178 TGSI_SEMANTIC_CLIPDIST,
179 TGSI_SEMANTIC_CLIPVERTEX,
180 TGSI_SEMANTIC_GRID_SIZE, /**< grid size in blocks */
181 TGSI_SEMANTIC_BLOCK_ID, /**< id of the current block */
182 TGSI_SEMANTIC_BLOCK_SIZE, /**< block size in threads */
183 TGSI_SEMANTIC_THREAD_ID, /**< block-relative id of the current thread */
184 TGSI_SEMANTIC_TEXCOORD, /**< texture or sprite coordinates */
185 TGSI_SEMANTIC_PCOORD, /**< point sprite coordinate */
186 TGSI_SEMANTIC_VIEWPORT_INDEX, /**< viewport index */
187 TGSI_SEMANTIC_LAYER, /**< layer (rendertarget index) */
188 TGSI_SEMANTIC_SAMPLEID,
189 TGSI_SEMANTIC_SAMPLEPOS,
190 TGSI_SEMANTIC_SAMPLEMASK,
191 TGSI_SEMANTIC_INVOCATIONID,
192 TGSI_SEMANTIC_VERTEXID_NOBASE,
193 TGSI_SEMANTIC_BASEVERTEX,
194 TGSI_SEMANTIC_PATCH, /**< generic per-patch semantic */
195 TGSI_SEMANTIC_TESSCOORD, /**< coordinate being processed by tess */
196 TGSI_SEMANTIC_TESSOUTER, /**< outer tessellation levels */
197 TGSI_SEMANTIC_TESSINNER, /**< inner tessellation levels */
198 TGSI_SEMANTIC_VERTICESIN, /**< number of input vertices */
199 TGSI_SEMANTIC_HELPER_INVOCATION, /**< current invocation is helper */
200 TGSI_SEMANTIC_BASEINSTANCE,
201 TGSI_SEMANTIC_DRAWID,
202 TGSI_SEMANTIC_WORK_DIM, /**< opencl get_work_dim value */
203 TGSI_SEMANTIC_SUBGROUP_SIZE,
204 TGSI_SEMANTIC_SUBGROUP_INVOCATION,
205 TGSI_SEMANTIC_SUBGROUP_EQ_MASK,
206 TGSI_SEMANTIC_SUBGROUP_GE_MASK,
207 TGSI_SEMANTIC_SUBGROUP_GT_MASK,
208 TGSI_SEMANTIC_SUBGROUP_LE_MASK,
209 TGSI_SEMANTIC_SUBGROUP_LT_MASK,
210 TGSI_SEMANTIC_COUNT, /**< number of semantic values */
211 };
212
213 struct tgsi_declaration_semantic
214 {
215 unsigned Name : 8; /**< one of TGSI_SEMANTIC_x */
216 unsigned Index : 16; /**< UINT */
217 unsigned StreamX : 2; /**< vertex stream (for GS output) */
218 unsigned StreamY : 2;
219 unsigned StreamZ : 2;
220 unsigned StreamW : 2;
221 };
222
223 struct tgsi_declaration_image {
224 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
225 unsigned Raw : 1;
226 unsigned Writable : 1;
227 unsigned Format : 10; /**< one of PIPE_FORMAT_ */
228 unsigned Padding : 12;
229 };
230
231 enum tgsi_return_type {
232 TGSI_RETURN_TYPE_UNORM = 0,
233 TGSI_RETURN_TYPE_SNORM,
234 TGSI_RETURN_TYPE_SINT,
235 TGSI_RETURN_TYPE_UINT,
236 TGSI_RETURN_TYPE_FLOAT,
237 TGSI_RETURN_TYPE_UNKNOWN,
238 TGSI_RETURN_TYPE_COUNT
239 };
240
241 struct tgsi_declaration_sampler_view {
242 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
243 unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */
244 unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */
245 unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */
246 unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */
247 };
248
249 struct tgsi_declaration_array {
250 unsigned ArrayID : 10;
251 unsigned Padding : 22;
252 };
253
254 enum tgsi_imm_type {
255 TGSI_IMM_FLOAT32,
256 TGSI_IMM_UINT32,
257 TGSI_IMM_INT32,
258 TGSI_IMM_FLOAT64,
259 TGSI_IMM_UINT64,
260 TGSI_IMM_INT64,
261 };
262
263 struct tgsi_immediate
264 {
265 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
266 unsigned NrTokens : 14; /**< UINT */
267 unsigned DataType : 4; /**< one of TGSI_IMM_x */
268 unsigned Padding : 10;
269 };
270
271 union tgsi_immediate_data
272 {
273 float Float;
274 unsigned Uint;
275 int Int;
276 };
277
278 enum tgsi_property_name {
279 TGSI_PROPERTY_GS_INPUT_PRIM,
280 TGSI_PROPERTY_GS_OUTPUT_PRIM,
281 TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES,
282 TGSI_PROPERTY_FS_COORD_ORIGIN,
283 TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
284 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS,
285 TGSI_PROPERTY_FS_DEPTH_LAYOUT,
286 TGSI_PROPERTY_VS_PROHIBIT_UCPS,
287 TGSI_PROPERTY_GS_INVOCATIONS,
288 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION,
289 TGSI_PROPERTY_TCS_VERTICES_OUT,
290 TGSI_PROPERTY_TES_PRIM_MODE,
291 TGSI_PROPERTY_TES_SPACING,
292 TGSI_PROPERTY_TES_VERTEX_ORDER_CW,
293 TGSI_PROPERTY_TES_POINT_MODE,
294 TGSI_PROPERTY_NUM_CLIPDIST_ENABLED,
295 TGSI_PROPERTY_NUM_CULLDIST_ENABLED,
296 TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL,
297 TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE,
298 TGSI_PROPERTY_NEXT_SHADER,
299 TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
300 TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
301 TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
302 TGSI_PROPERTY_MUL_ZERO_WINS,
303 TGSI_PROPERTY_COUNT,
304 };
305
306 struct tgsi_property {
307 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
308 unsigned NrTokens : 8; /**< UINT */
309 unsigned PropertyName : 8; /**< one of TGSI_PROPERTY */
310 unsigned Padding : 12;
311 };
312
313 enum tgsi_fs_coord_origin {
314 TGSI_FS_COORD_ORIGIN_UPPER_LEFT,
315 TGSI_FS_COORD_ORIGIN_LOWER_LEFT,
316 };
317
318 enum tgsi_fs_coord_pixcenter {
319 TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER,
320 TGSI_FS_COORD_PIXEL_CENTER_INTEGER,
321 };
322
323 enum tgsi_fs_depth_layout {
324 TGSI_FS_DEPTH_LAYOUT_NONE,
325 TGSI_FS_DEPTH_LAYOUT_ANY,
326 TGSI_FS_DEPTH_LAYOUT_GREATER,
327 TGSI_FS_DEPTH_LAYOUT_LESS,
328 TGSI_FS_DEPTH_LAYOUT_UNCHANGED,
329 };
330
331 struct tgsi_property_data {
332 unsigned Data;
333 };
334
335 /* TGSI opcodes.
336 *
337 * For more information on semantics of opcodes and
338 * which APIs are known to use which opcodes, see
339 * gallium/docs/source/tgsi.rst
340 */
341 #define TGSI_OPCODE_ARL 0
342 #define TGSI_OPCODE_MOV 1
343 #define TGSI_OPCODE_LIT 2
344 #define TGSI_OPCODE_RCP 3
345 #define TGSI_OPCODE_RSQ 4
346 #define TGSI_OPCODE_EXP 5
347 #define TGSI_OPCODE_LOG 6
348 #define TGSI_OPCODE_MUL 7
349 #define TGSI_OPCODE_ADD 8
350 #define TGSI_OPCODE_DP3 9
351 #define TGSI_OPCODE_DP4 10
352 #define TGSI_OPCODE_DST 11
353 #define TGSI_OPCODE_MIN 12
354 #define TGSI_OPCODE_MAX 13
355 #define TGSI_OPCODE_SLT 14
356 #define TGSI_OPCODE_SGE 15
357 #define TGSI_OPCODE_MAD 16
358 #define TGSI_OPCODE_TEX_LZ 17
359 #define TGSI_OPCODE_LRP 18
360 #define TGSI_OPCODE_FMA 19
361 #define TGSI_OPCODE_SQRT 20
362 #define TGSI_OPCODE_LDEXP 21
363 #define TGSI_OPCODE_F2U64 22
364 #define TGSI_OPCODE_F2I64 23
365 #define TGSI_OPCODE_FRC 24
366 #define TGSI_OPCODE_TXF_LZ 25
367 #define TGSI_OPCODE_FLR 26
368 #define TGSI_OPCODE_ROUND 27
369 #define TGSI_OPCODE_EX2 28
370 #define TGSI_OPCODE_LG2 29
371 #define TGSI_OPCODE_POW 30
372 /* gap */
373 #define TGSI_OPCODE_U2I64 32
374 #define TGSI_OPCODE_CLOCK 33
375 #define TGSI_OPCODE_I2I64 34
376 /* gap */
377 #define TGSI_OPCODE_COS 36
378 #define TGSI_OPCODE_DDX 37
379 #define TGSI_OPCODE_DDY 38
380 #define TGSI_OPCODE_KILL 39 /* unconditional */
381 #define TGSI_OPCODE_PK2H 40
382 #define TGSI_OPCODE_PK2US 41
383 #define TGSI_OPCODE_PK4B 42
384 #define TGSI_OPCODE_PK4UB 43
385 #define TGSI_OPCODE_D2U64 44
386 #define TGSI_OPCODE_SEQ 45
387 #define TGSI_OPCODE_D2I64 46
388 #define TGSI_OPCODE_SGT 47
389 #define TGSI_OPCODE_SIN 48
390 #define TGSI_OPCODE_SLE 49
391 #define TGSI_OPCODE_SNE 50
392 #define TGSI_OPCODE_U642D 51
393 #define TGSI_OPCODE_TEX 52
394 #define TGSI_OPCODE_TXD 53
395 #define TGSI_OPCODE_TXP 54
396 #define TGSI_OPCODE_UP2H 55
397 #define TGSI_OPCODE_UP2US 56
398 #define TGSI_OPCODE_UP4B 57
399 #define TGSI_OPCODE_UP4UB 58
400 #define TGSI_OPCODE_U642F 59
401 #define TGSI_OPCODE_I642F 60
402 #define TGSI_OPCODE_ARR 61
403 #define TGSI_OPCODE_I642D 62
404 #define TGSI_OPCODE_CAL 63
405 #define TGSI_OPCODE_RET 64
406 #define TGSI_OPCODE_SSG 65 /* SGN */
407 #define TGSI_OPCODE_CMP 66
408 /* gap */
409 #define TGSI_OPCODE_TXB 68
410 #define TGSI_OPCODE_FBFETCH 69
411 #define TGSI_OPCODE_DIV 70
412 #define TGSI_OPCODE_DP2 71
413 #define TGSI_OPCODE_TXL 72
414 #define TGSI_OPCODE_BRK 73
415 #define TGSI_OPCODE_IF 74
416 #define TGSI_OPCODE_UIF 75
417 #define TGSI_OPCODE_READ_INVOC 76
418 #define TGSI_OPCODE_ELSE 77
419 #define TGSI_OPCODE_ENDIF 78
420
421 #define TGSI_OPCODE_DDX_FINE 79
422 #define TGSI_OPCODE_DDY_FINE 80
423 /* gap */
424 #define TGSI_OPCODE_CEIL 83
425 #define TGSI_OPCODE_I2F 84
426 #define TGSI_OPCODE_NOT 85
427 #define TGSI_OPCODE_TRUNC 86
428 #define TGSI_OPCODE_SHL 87
429 #define TGSI_OPCODE_BALLOT 88
430 #define TGSI_OPCODE_AND 89
431 #define TGSI_OPCODE_OR 90
432 #define TGSI_OPCODE_MOD 91
433 #define TGSI_OPCODE_XOR 92
434 /* gap */
435 #define TGSI_OPCODE_TXF 94
436 #define TGSI_OPCODE_TXQ 95
437 #define TGSI_OPCODE_CONT 96
438 #define TGSI_OPCODE_EMIT 97
439 #define TGSI_OPCODE_ENDPRIM 98
440 #define TGSI_OPCODE_BGNLOOP 99
441 #define TGSI_OPCODE_BGNSUB 100
442 #define TGSI_OPCODE_ENDLOOP 101
443 #define TGSI_OPCODE_ENDSUB 102
444 /* gap */
445 #define TGSI_OPCODE_TXQS 104
446 #define TGSI_OPCODE_RESQ 105
447 #define TGSI_OPCODE_READ_FIRST 106
448 #define TGSI_OPCODE_NOP 107
449
450 #define TGSI_OPCODE_FSEQ 108
451 #define TGSI_OPCODE_FSGE 109
452 #define TGSI_OPCODE_FSLT 110
453 #define TGSI_OPCODE_FSNE 111
454
455 #define TGSI_OPCODE_MEMBAR 112
456 /* gap */
457 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
458 #define TGSI_OPCODE_END 117 /* aka HALT */
459 #define TGSI_OPCODE_DFMA 118
460 #define TGSI_OPCODE_F2I 119
461 #define TGSI_OPCODE_IDIV 120
462 #define TGSI_OPCODE_IMAX 121
463 #define TGSI_OPCODE_IMIN 122
464 #define TGSI_OPCODE_INEG 123
465 #define TGSI_OPCODE_ISGE 124
466 #define TGSI_OPCODE_ISHR 125
467 #define TGSI_OPCODE_ISLT 126
468 #define TGSI_OPCODE_F2U 127
469 #define TGSI_OPCODE_U2F 128
470 #define TGSI_OPCODE_UADD 129
471 #define TGSI_OPCODE_UDIV 130
472 #define TGSI_OPCODE_UMAD 131
473 #define TGSI_OPCODE_UMAX 132
474 #define TGSI_OPCODE_UMIN 133
475 #define TGSI_OPCODE_UMOD 134
476 #define TGSI_OPCODE_UMUL 135
477 #define TGSI_OPCODE_USEQ 136
478 #define TGSI_OPCODE_USGE 137
479 #define TGSI_OPCODE_USHR 138
480 #define TGSI_OPCODE_USLT 139
481 #define TGSI_OPCODE_USNE 140
482 #define TGSI_OPCODE_SWITCH 141
483 #define TGSI_OPCODE_CASE 142
484 #define TGSI_OPCODE_DEFAULT 143
485 #define TGSI_OPCODE_ENDSWITCH 144
486
487 /* resource related opcodes */
488 #define TGSI_OPCODE_SAMPLE 145
489 #define TGSI_OPCODE_SAMPLE_I 146
490 #define TGSI_OPCODE_SAMPLE_I_MS 147
491 #define TGSI_OPCODE_SAMPLE_B 148
492 #define TGSI_OPCODE_SAMPLE_C 149
493 #define TGSI_OPCODE_SAMPLE_C_LZ 150
494 #define TGSI_OPCODE_SAMPLE_D 151
495 #define TGSI_OPCODE_SAMPLE_L 152
496 #define TGSI_OPCODE_GATHER4 153
497 #define TGSI_OPCODE_SVIEWINFO 154
498 #define TGSI_OPCODE_SAMPLE_POS 155
499 #define TGSI_OPCODE_SAMPLE_INFO 156
500
501 #define TGSI_OPCODE_UARL 157
502 #define TGSI_OPCODE_UCMP 158
503 #define TGSI_OPCODE_IABS 159
504 #define TGSI_OPCODE_ISSG 160
505
506 #define TGSI_OPCODE_LOAD 161
507 #define TGSI_OPCODE_STORE 162
508 /* gap */
509 #define TGSI_OPCODE_BARRIER 166
510
511 #define TGSI_OPCODE_ATOMUADD 167
512 #define TGSI_OPCODE_ATOMXCHG 168
513 #define TGSI_OPCODE_ATOMCAS 169
514 #define TGSI_OPCODE_ATOMAND 170
515 #define TGSI_OPCODE_ATOMOR 171
516 #define TGSI_OPCODE_ATOMXOR 172
517 #define TGSI_OPCODE_ATOMUMIN 173
518 #define TGSI_OPCODE_ATOMUMAX 174
519 #define TGSI_OPCODE_ATOMIMIN 175
520 #define TGSI_OPCODE_ATOMIMAX 176
521
522 /* to be used for shadow cube map compares */
523 #define TGSI_OPCODE_TEX2 177
524 #define TGSI_OPCODE_TXB2 178
525 #define TGSI_OPCODE_TXL2 179
526
527 #define TGSI_OPCODE_IMUL_HI 180
528 #define TGSI_OPCODE_UMUL_HI 181
529
530 #define TGSI_OPCODE_TG4 182
531
532 #define TGSI_OPCODE_LODQ 183
533
534 #define TGSI_OPCODE_IBFE 184
535 #define TGSI_OPCODE_UBFE 185
536 #define TGSI_OPCODE_BFI 186
537 #define TGSI_OPCODE_BREV 187
538 #define TGSI_OPCODE_POPC 188
539 #define TGSI_OPCODE_LSB 189
540 #define TGSI_OPCODE_IMSB 190
541 #define TGSI_OPCODE_UMSB 191
542
543 #define TGSI_OPCODE_INTERP_CENTROID 192
544 #define TGSI_OPCODE_INTERP_SAMPLE 193
545 #define TGSI_OPCODE_INTERP_OFFSET 194
546
547 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
548 #define TGSI_OPCODE_F2D 195 /* SM5 */
549 #define TGSI_OPCODE_D2F 196
550 #define TGSI_OPCODE_DABS 197
551 #define TGSI_OPCODE_DNEG 198 /* SM5 */
552 #define TGSI_OPCODE_DADD 199 /* SM5 */
553 #define TGSI_OPCODE_DMUL 200 /* SM5 */
554 #define TGSI_OPCODE_DMAX 201 /* SM5 */
555 #define TGSI_OPCODE_DMIN 202 /* SM5 */
556 #define TGSI_OPCODE_DSLT 203 /* SM5 */
557 #define TGSI_OPCODE_DSGE 204 /* SM5 */
558 #define TGSI_OPCODE_DSEQ 205 /* SM5 */
559 #define TGSI_OPCODE_DSNE 206 /* SM5 */
560 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */
561 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */
562 #define TGSI_OPCODE_DMAD 209
563 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */
564 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */
565 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */
566 #define TGSI_OPCODE_D2I 213
567 #define TGSI_OPCODE_I2D 214
568 #define TGSI_OPCODE_D2U 215
569 #define TGSI_OPCODE_U2D 216
570 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */
571 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */
572 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */
573 #define TGSI_OPCODE_DFLR 220 /* nvc0 */
574 #define TGSI_OPCODE_DROUND 221 /* nvc0 */
575 #define TGSI_OPCODE_DSSG 222
576
577 #define TGSI_OPCODE_VOTE_ANY 223
578 #define TGSI_OPCODE_VOTE_ALL 224
579 #define TGSI_OPCODE_VOTE_EQ 225
580
581 #define TGSI_OPCODE_U64SEQ 226
582 #define TGSI_OPCODE_U64SNE 227
583 #define TGSI_OPCODE_I64SLT 228
584 #define TGSI_OPCODE_U64SLT 229
585 #define TGSI_OPCODE_I64SGE 230
586 #define TGSI_OPCODE_U64SGE 231
587
588 #define TGSI_OPCODE_I64MIN 232
589 #define TGSI_OPCODE_U64MIN 233
590 #define TGSI_OPCODE_I64MAX 234
591 #define TGSI_OPCODE_U64MAX 235
592
593 #define TGSI_OPCODE_I64ABS 236
594 #define TGSI_OPCODE_I64SSG 237
595 #define TGSI_OPCODE_I64NEG 238
596
597 #define TGSI_OPCODE_U64ADD 239
598 #define TGSI_OPCODE_U64MUL 240
599 #define TGSI_OPCODE_U64SHL 241
600 #define TGSI_OPCODE_I64SHR 242
601 #define TGSI_OPCODE_U64SHR 243
602
603 #define TGSI_OPCODE_I64DIV 244
604 #define TGSI_OPCODE_U64DIV 245
605 #define TGSI_OPCODE_I64MOD 246
606 #define TGSI_OPCODE_U64MOD 247
607
608 #define TGSI_OPCODE_DDIV 248
609
610 #define TGSI_OPCODE_LOD 249
611
612 #define TGSI_OPCODE_LAST 250
613
614 /**
615 * Opcode is the operation code to execute. A given operation defines the
616 * semantics how the source registers (if any) are interpreted and what is
617 * written to the destination registers (if any) as a result of execution.
618 *
619 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
620 * respectively. For a given operation code, those numbers are fixed and are
621 * present here only for convenience.
622 *
623 * Saturate controls how are final results in destination registers modified.
624 */
625
626 struct tgsi_instruction
627 {
628 unsigned Type : 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
629 unsigned NrTokens : 8; /* UINT */
630 unsigned Opcode : 8; /* TGSI_OPCODE_ */
631 unsigned Saturate : 1; /* BOOL */
632 unsigned NumDstRegs : 2; /* UINT */
633 unsigned NumSrcRegs : 4; /* UINT */
634 unsigned Label : 1;
635 unsigned Texture : 1;
636 unsigned Memory : 1;
637 unsigned Precise : 1;
638 unsigned Padding : 1;
639 };
640
641 /*
642 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
643 *
644 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
645 * if texture instruction has a number of offsets,
646 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
647 *
648 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
649 *
650 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
651 *
652 * tgsi_instruction::NrTokens contains the total number of words that make the
653 * instruction, including the instruction word.
654 */
655
656 enum tgsi_swizzle {
657 TGSI_SWIZZLE_X,
658 TGSI_SWIZZLE_Y,
659 TGSI_SWIZZLE_Z,
660 TGSI_SWIZZLE_W,
661 };
662
663 struct tgsi_instruction_label
664 {
665 unsigned Label : 24; /* UINT */
666 unsigned Padding : 8;
667 };
668
669 enum tgsi_texture_type {
670 TGSI_TEXTURE_BUFFER,
671 TGSI_TEXTURE_1D,
672 TGSI_TEXTURE_2D,
673 TGSI_TEXTURE_3D,
674 TGSI_TEXTURE_CUBE,
675 TGSI_TEXTURE_RECT,
676 TGSI_TEXTURE_SHADOW1D,
677 TGSI_TEXTURE_SHADOW2D,
678 TGSI_TEXTURE_SHADOWRECT,
679 TGSI_TEXTURE_1D_ARRAY,
680 TGSI_TEXTURE_2D_ARRAY,
681 TGSI_TEXTURE_SHADOW1D_ARRAY,
682 TGSI_TEXTURE_SHADOW2D_ARRAY,
683 TGSI_TEXTURE_SHADOWCUBE,
684 TGSI_TEXTURE_2D_MSAA,
685 TGSI_TEXTURE_2D_ARRAY_MSAA,
686 TGSI_TEXTURE_CUBE_ARRAY,
687 TGSI_TEXTURE_SHADOWCUBE_ARRAY,
688 TGSI_TEXTURE_UNKNOWN,
689 TGSI_TEXTURE_COUNT,
690 };
691
692 struct tgsi_instruction_texture
693 {
694 unsigned Texture : 8; /* TGSI_TEXTURE_ */
695 unsigned NumOffsets : 4;
696 unsigned ReturnType : 3; /* TGSI_RETURN_TYPE_x */
697 unsigned Padding : 17;
698 };
699
700 /* for texture offsets in GLSL and DirectX.
701 * Generally these always come from TGSI_FILE_IMMEDIATE,
702 * however DX11 appears to have the capability to do
703 * non-constant texture offsets.
704 */
705 struct tgsi_texture_offset
706 {
707 int Index : 16;
708 unsigned File : 4; /**< one of TGSI_FILE_x */
709 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
710 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
711 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
712 unsigned Padding : 6;
713 };
714
715 /**
716 * File specifies the register array to access.
717 *
718 * Index specifies the element number of a register in the register file.
719 *
720 * If Indirect is TRUE, Index should be offset by the X component of the indirect
721 * register that follows. The register can be now fetched into local storage
722 * for further processing.
723 *
724 * If Negate is TRUE, all components of the fetched register are negated.
725 *
726 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
727 * SwizzleZ and SwizzleW.
728 *
729 */
730
731 struct tgsi_src_register
732 {
733 unsigned File : 4; /* TGSI_FILE_ */
734 unsigned Indirect : 1; /* BOOL */
735 unsigned Dimension : 1; /* BOOL */
736 int Index : 16; /* SINT */
737 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_ */
738 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_ */
739 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_ */
740 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_ */
741 unsigned Absolute : 1; /* BOOL */
742 unsigned Negate : 1; /* BOOL */
743 };
744
745 /**
746 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
747 *
748 * File, Index and Swizzle are handled the same as in tgsi_src_register.
749 *
750 * If ArrayID is zero the whole register file might be indirectly addressed,
751 * if not only the Declaration with this ArrayID is accessed by this operand.
752 *
753 */
754
755 struct tgsi_ind_register
756 {
757 unsigned File : 4; /* TGSI_FILE_ */
758 int Index : 16; /* SINT */
759 unsigned Swizzle : 2; /* TGSI_SWIZZLE_ */
760 unsigned ArrayID : 10; /* UINT */
761 };
762
763 /**
764 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
765 */
766
767 struct tgsi_dimension
768 {
769 unsigned Indirect : 1; /* BOOL */
770 unsigned Dimension : 1; /* BOOL */
771 unsigned Padding : 14;
772 int Index : 16; /* SINT */
773 };
774
775 struct tgsi_dst_register
776 {
777 unsigned File : 4; /* TGSI_FILE_ */
778 unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */
779 unsigned Indirect : 1; /* BOOL */
780 unsigned Dimension : 1; /* BOOL */
781 int Index : 16; /* SINT */
782 unsigned Padding : 6;
783 };
784
785 #define TGSI_MEMORY_COHERENT (1 << 0)
786 #define TGSI_MEMORY_RESTRICT (1 << 1)
787 #define TGSI_MEMORY_VOLATILE (1 << 2)
788
789 /**
790 * Specifies the type of memory access to do for the LOAD/STORE instruction.
791 */
792 struct tgsi_instruction_memory
793 {
794 unsigned Qualifier : 3; /* TGSI_MEMORY_ */
795 unsigned Texture : 8; /* only for images: TGSI_TEXTURE_ */
796 unsigned Format : 10; /* only for images: PIPE_FORMAT_ */
797 unsigned Padding : 11;
798 };
799
800 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
801 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
802 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2)
803 #define TGSI_MEMBAR_SHARED (1 << 3)
804 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4)
805
806 #ifdef __cplusplus
807 }
808 #endif
809
810 #endif /* P_SHADER_TOKENS_H */