tgsi/ureg: add shared variables support for compute shaders
[mesa.git] / src / gallium / include / pipe / p_shader_tokens.h
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #ifndef P_SHADER_TOKENS_H
30 #define P_SHADER_TOKENS_H
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36
37 struct tgsi_header
38 {
39 unsigned HeaderSize : 8;
40 unsigned BodySize : 24;
41 };
42
43 #define TGSI_PROCESSOR_FRAGMENT 0
44 #define TGSI_PROCESSOR_VERTEX 1
45 #define TGSI_PROCESSOR_GEOMETRY 2
46 #define TGSI_PROCESSOR_TESS_CTRL 3
47 #define TGSI_PROCESSOR_TESS_EVAL 4
48 #define TGSI_PROCESSOR_COMPUTE 5
49
50 struct tgsi_processor
51 {
52 unsigned Processor : 4; /* TGSI_PROCESSOR_ */
53 unsigned Padding : 28;
54 };
55
56 #define TGSI_TOKEN_TYPE_DECLARATION 0
57 #define TGSI_TOKEN_TYPE_IMMEDIATE 1
58 #define TGSI_TOKEN_TYPE_INSTRUCTION 2
59 #define TGSI_TOKEN_TYPE_PROPERTY 3
60
61 struct tgsi_token
62 {
63 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_x */
64 unsigned NrTokens : 8; /**< UINT */
65 unsigned Padding : 20;
66 };
67
68 enum tgsi_file_type {
69 TGSI_FILE_NULL =0,
70 TGSI_FILE_CONSTANT =1,
71 TGSI_FILE_INPUT =2,
72 TGSI_FILE_OUTPUT =3,
73 TGSI_FILE_TEMPORARY =4,
74 TGSI_FILE_SAMPLER =5,
75 TGSI_FILE_ADDRESS =6,
76 TGSI_FILE_IMMEDIATE =7,
77 TGSI_FILE_PREDICATE =8,
78 TGSI_FILE_SYSTEM_VALUE =9,
79 TGSI_FILE_IMAGE =10,
80 TGSI_FILE_SAMPLER_VIEW =11,
81 TGSI_FILE_BUFFER =12,
82 TGSI_FILE_MEMORY =13,
83 TGSI_FILE_COUNT /**< how many TGSI_FILE_ types */
84 };
85
86
87 #define TGSI_WRITEMASK_NONE 0x00
88 #define TGSI_WRITEMASK_X 0x01
89 #define TGSI_WRITEMASK_Y 0x02
90 #define TGSI_WRITEMASK_XY 0x03
91 #define TGSI_WRITEMASK_Z 0x04
92 #define TGSI_WRITEMASK_XZ 0x05
93 #define TGSI_WRITEMASK_YZ 0x06
94 #define TGSI_WRITEMASK_XYZ 0x07
95 #define TGSI_WRITEMASK_W 0x08
96 #define TGSI_WRITEMASK_XW 0x09
97 #define TGSI_WRITEMASK_YW 0x0A
98 #define TGSI_WRITEMASK_XYW 0x0B
99 #define TGSI_WRITEMASK_ZW 0x0C
100 #define TGSI_WRITEMASK_XZW 0x0D
101 #define TGSI_WRITEMASK_YZW 0x0E
102 #define TGSI_WRITEMASK_XYZW 0x0F
103
104 #define TGSI_INTERPOLATE_CONSTANT 0
105 #define TGSI_INTERPOLATE_LINEAR 1
106 #define TGSI_INTERPOLATE_PERSPECTIVE 2
107 #define TGSI_INTERPOLATE_COLOR 3 /* special color case for smooth/flat */
108 #define TGSI_INTERPOLATE_COUNT 4
109
110 #define TGSI_INTERPOLATE_LOC_CENTER 0
111 #define TGSI_INTERPOLATE_LOC_CENTROID 1
112 #define TGSI_INTERPOLATE_LOC_SAMPLE 2
113 #define TGSI_INTERPOLATE_LOC_COUNT 3
114
115 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
116 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
117 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
118 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
119
120 struct tgsi_declaration
121 {
122 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_DECLARATION */
123 unsigned NrTokens : 8; /**< UINT */
124 unsigned File : 4; /**< one of TGSI_FILE_x */
125 unsigned UsageMask : 4; /**< bitmask of TGSI_WRITEMASK_x flags */
126 unsigned Dimension : 1; /**< any extra dimension info? */
127 unsigned Semantic : 1; /**< BOOL, any semantic info? */
128 unsigned Interpolate : 1; /**< any interpolation info? */
129 unsigned Invariant : 1; /**< invariant optimization? */
130 unsigned Local : 1; /**< optimize as subroutine local variable? */
131 unsigned Array : 1; /**< extra array info? */
132 unsigned Atomic : 1; /**< atomic only? for TGSI_FILE_BUFFER */
133 unsigned Shared : 1; /**< shared storage for TGSI_FILE_MEMORY */
134 unsigned Padding : 4;
135 };
136
137 struct tgsi_declaration_range
138 {
139 unsigned First : 16; /**< UINT */
140 unsigned Last : 16; /**< UINT */
141 };
142
143 struct tgsi_declaration_dimension
144 {
145 unsigned Index2D:16; /**< UINT */
146 unsigned Padding:16;
147 };
148
149 struct tgsi_declaration_interp
150 {
151 unsigned Interpolate : 4; /**< one of TGSI_INTERPOLATE_x */
152 unsigned Location : 2; /**< one of TGSI_INTERPOLATE_LOC_x */
153 unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
154 unsigned Padding : 22;
155 };
156
157 #define TGSI_SEMANTIC_POSITION 0
158 #define TGSI_SEMANTIC_COLOR 1
159 #define TGSI_SEMANTIC_BCOLOR 2 /**< back-face color */
160 #define TGSI_SEMANTIC_FOG 3
161 #define TGSI_SEMANTIC_PSIZE 4
162 #define TGSI_SEMANTIC_GENERIC 5
163 #define TGSI_SEMANTIC_NORMAL 6
164 #define TGSI_SEMANTIC_FACE 7
165 #define TGSI_SEMANTIC_EDGEFLAG 8
166 #define TGSI_SEMANTIC_PRIMID 9
167 #define TGSI_SEMANTIC_INSTANCEID 10 /**< doesn't include start_instance */
168 #define TGSI_SEMANTIC_VERTEXID 11
169 #define TGSI_SEMANTIC_STENCIL 12
170 #define TGSI_SEMANTIC_CLIPDIST 13
171 #define TGSI_SEMANTIC_CLIPVERTEX 14
172 #define TGSI_SEMANTIC_GRID_SIZE 15 /**< grid size in blocks */
173 #define TGSI_SEMANTIC_BLOCK_ID 16 /**< id of the current block */
174 #define TGSI_SEMANTIC_BLOCK_SIZE 17 /**< block size in threads */
175 #define TGSI_SEMANTIC_THREAD_ID 18 /**< block-relative id of the current thread */
176 #define TGSI_SEMANTIC_TEXCOORD 19 /**< texture or sprite coordinates */
177 #define TGSI_SEMANTIC_PCOORD 20 /**< point sprite coordinate */
178 #define TGSI_SEMANTIC_VIEWPORT_INDEX 21 /**< viewport index */
179 #define TGSI_SEMANTIC_LAYER 22 /**< layer (rendertarget index) */
180 #define TGSI_SEMANTIC_CULLDIST 23
181 #define TGSI_SEMANTIC_SAMPLEID 24
182 #define TGSI_SEMANTIC_SAMPLEPOS 25
183 #define TGSI_SEMANTIC_SAMPLEMASK 26
184 #define TGSI_SEMANTIC_INVOCATIONID 27
185 #define TGSI_SEMANTIC_VERTEXID_NOBASE 28
186 #define TGSI_SEMANTIC_BASEVERTEX 29
187 #define TGSI_SEMANTIC_PATCH 30 /**< generic per-patch semantic */
188 #define TGSI_SEMANTIC_TESSCOORD 31 /**< coordinate being processed by tess */
189 #define TGSI_SEMANTIC_TESSOUTER 32 /**< outer tessellation levels */
190 #define TGSI_SEMANTIC_TESSINNER 33 /**< inner tessellation levels */
191 #define TGSI_SEMANTIC_VERTICESIN 34 /**< number of input vertices */
192 #define TGSI_SEMANTIC_HELPER_INVOCATION 35 /**< current invocation is helper */
193 #define TGSI_SEMANTIC_BASEINSTANCE 36
194 #define TGSI_SEMANTIC_DRAWID 37
195 #define TGSI_SEMANTIC_COUNT 38 /**< number of semantic values */
196
197 struct tgsi_declaration_semantic
198 {
199 unsigned Name : 8; /**< one of TGSI_SEMANTIC_x */
200 unsigned Index : 16; /**< UINT */
201 unsigned Padding : 8;
202 };
203
204 struct tgsi_declaration_image {
205 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
206 unsigned Raw : 1;
207 unsigned Writable : 1;
208 unsigned Format : 10; /**< one of PIPE_FORMAT_ */
209 unsigned Padding : 12;
210 };
211
212 enum tgsi_return_type {
213 TGSI_RETURN_TYPE_UNORM = 0,
214 TGSI_RETURN_TYPE_SNORM,
215 TGSI_RETURN_TYPE_SINT,
216 TGSI_RETURN_TYPE_UINT,
217 TGSI_RETURN_TYPE_FLOAT,
218 TGSI_RETURN_TYPE_COUNT
219 };
220
221 struct tgsi_declaration_sampler_view {
222 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
223 unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */
224 unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */
225 unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */
226 unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */
227 };
228
229 struct tgsi_declaration_array {
230 unsigned ArrayID : 10;
231 unsigned Padding : 22;
232 };
233
234 /*
235 * Special resources that don't need to be declared. They map to the
236 * GLOBAL/LOCAL/PRIVATE/INPUT compute memory spaces.
237 */
238 #define TGSI_RESOURCE_GLOBAL 0x7fff
239 #define TGSI_RESOURCE_LOCAL 0x7ffe
240 #define TGSI_RESOURCE_PRIVATE 0x7ffd
241 #define TGSI_RESOURCE_INPUT 0x7ffc
242
243 #define TGSI_IMM_FLOAT32 0
244 #define TGSI_IMM_UINT32 1
245 #define TGSI_IMM_INT32 2
246 #define TGSI_IMM_FLOAT64 3
247
248 struct tgsi_immediate
249 {
250 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
251 unsigned NrTokens : 14; /**< UINT */
252 unsigned DataType : 4; /**< one of TGSI_IMM_x */
253 unsigned Padding : 10;
254 };
255
256 union tgsi_immediate_data
257 {
258 float Float;
259 unsigned Uint;
260 int Int;
261 };
262
263 #define TGSI_PROPERTY_GS_INPUT_PRIM 0
264 #define TGSI_PROPERTY_GS_OUTPUT_PRIM 1
265 #define TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES 2
266 #define TGSI_PROPERTY_FS_COORD_ORIGIN 3
267 #define TGSI_PROPERTY_FS_COORD_PIXEL_CENTER 4
268 #define TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS 5
269 #define TGSI_PROPERTY_FS_DEPTH_LAYOUT 6
270 #define TGSI_PROPERTY_VS_PROHIBIT_UCPS 7
271 #define TGSI_PROPERTY_GS_INVOCATIONS 8
272 #define TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION 9
273 #define TGSI_PROPERTY_TCS_VERTICES_OUT 10
274 #define TGSI_PROPERTY_TES_PRIM_MODE 11
275 #define TGSI_PROPERTY_TES_SPACING 12
276 #define TGSI_PROPERTY_TES_VERTEX_ORDER_CW 13
277 #define TGSI_PROPERTY_TES_POINT_MODE 14
278 #define TGSI_PROPERTY_NUM_CLIPDIST_ENABLED 15
279 #define TGSI_PROPERTY_NUM_CULLDIST_ENABLED 16
280 #define TGSI_PROPERTY_COUNT 17
281
282 struct tgsi_property {
283 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
284 unsigned NrTokens : 8; /**< UINT */
285 unsigned PropertyName : 8; /**< one of TGSI_PROPERTY */
286 unsigned Padding : 12;
287 };
288
289 #define TGSI_FS_COORD_ORIGIN_UPPER_LEFT 0
290 #define TGSI_FS_COORD_ORIGIN_LOWER_LEFT 1
291
292 #define TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER 0
293 #define TGSI_FS_COORD_PIXEL_CENTER_INTEGER 1
294
295 #define TGSI_FS_DEPTH_LAYOUT_NONE 0
296 #define TGSI_FS_DEPTH_LAYOUT_ANY 1
297 #define TGSI_FS_DEPTH_LAYOUT_GREATER 2
298 #define TGSI_FS_DEPTH_LAYOUT_LESS 3
299 #define TGSI_FS_DEPTH_LAYOUT_UNCHANGED 4
300
301
302 struct tgsi_property_data {
303 unsigned Data;
304 };
305
306 /* TGSI opcodes.
307 *
308 * For more information on semantics of opcodes and
309 * which APIs are known to use which opcodes, see
310 * gallium/docs/source/tgsi.rst
311 */
312 #define TGSI_OPCODE_ARL 0
313 #define TGSI_OPCODE_MOV 1
314 #define TGSI_OPCODE_LIT 2
315 #define TGSI_OPCODE_RCP 3
316 #define TGSI_OPCODE_RSQ 4
317 #define TGSI_OPCODE_EXP 5
318 #define TGSI_OPCODE_LOG 6
319 #define TGSI_OPCODE_MUL 7
320 #define TGSI_OPCODE_ADD 8
321 #define TGSI_OPCODE_DP3 9
322 #define TGSI_OPCODE_DP4 10
323 #define TGSI_OPCODE_DST 11
324 #define TGSI_OPCODE_MIN 12
325 #define TGSI_OPCODE_MAX 13
326 #define TGSI_OPCODE_SLT 14
327 #define TGSI_OPCODE_SGE 15
328 #define TGSI_OPCODE_MAD 16
329 #define TGSI_OPCODE_SUB 17
330 #define TGSI_OPCODE_LRP 18
331 #define TGSI_OPCODE_FMA 19
332 #define TGSI_OPCODE_SQRT 20
333 #define TGSI_OPCODE_DP2A 21
334 /* gap */
335 #define TGSI_OPCODE_FRC 24
336 #define TGSI_OPCODE_CLAMP 25
337 #define TGSI_OPCODE_FLR 26
338 #define TGSI_OPCODE_ROUND 27
339 #define TGSI_OPCODE_EX2 28
340 #define TGSI_OPCODE_LG2 29
341 #define TGSI_OPCODE_POW 30
342 #define TGSI_OPCODE_XPD 31
343 /* gap */
344 #define TGSI_OPCODE_ABS 33
345 /* gap */
346 #define TGSI_OPCODE_DPH 35
347 #define TGSI_OPCODE_COS 36
348 #define TGSI_OPCODE_DDX 37
349 #define TGSI_OPCODE_DDY 38
350 #define TGSI_OPCODE_KILL 39 /* unconditional */
351 #define TGSI_OPCODE_PK2H 40
352 #define TGSI_OPCODE_PK2US 41
353 #define TGSI_OPCODE_PK4B 42
354 #define TGSI_OPCODE_PK4UB 43
355 /* gap */
356 #define TGSI_OPCODE_SEQ 45
357 /* gap */
358 #define TGSI_OPCODE_SGT 47
359 #define TGSI_OPCODE_SIN 48
360 #define TGSI_OPCODE_SLE 49
361 #define TGSI_OPCODE_SNE 50
362 /* gap */
363 #define TGSI_OPCODE_TEX 52
364 #define TGSI_OPCODE_TXD 53
365 #define TGSI_OPCODE_TXP 54
366 #define TGSI_OPCODE_UP2H 55
367 #define TGSI_OPCODE_UP2US 56
368 #define TGSI_OPCODE_UP4B 57
369 #define TGSI_OPCODE_UP4UB 58
370 /* gap */
371 #define TGSI_OPCODE_ARR 61
372 /* gap */
373 #define TGSI_OPCODE_CAL 63
374 #define TGSI_OPCODE_RET 64
375 #define TGSI_OPCODE_SSG 65 /* SGN */
376 #define TGSI_OPCODE_CMP 66
377 #define TGSI_OPCODE_SCS 67
378 #define TGSI_OPCODE_TXB 68
379 /* gap */
380 #define TGSI_OPCODE_DIV 70
381 #define TGSI_OPCODE_DP2 71
382 #define TGSI_OPCODE_TXL 72
383 #define TGSI_OPCODE_BRK 73
384 #define TGSI_OPCODE_IF 74
385 #define TGSI_OPCODE_UIF 75
386 #define TGSI_OPCODE_ELSE 77
387 #define TGSI_OPCODE_ENDIF 78
388
389 #define TGSI_OPCODE_DDX_FINE 79
390 #define TGSI_OPCODE_DDY_FINE 80
391
392 #define TGSI_OPCODE_PUSHA 81
393 #define TGSI_OPCODE_POPA 82
394 #define TGSI_OPCODE_CEIL 83
395 #define TGSI_OPCODE_I2F 84
396 #define TGSI_OPCODE_NOT 85
397 #define TGSI_OPCODE_TRUNC 86
398 #define TGSI_OPCODE_SHL 87
399 /* gap */
400 #define TGSI_OPCODE_AND 89
401 #define TGSI_OPCODE_OR 90
402 #define TGSI_OPCODE_MOD 91
403 #define TGSI_OPCODE_XOR 92
404 #define TGSI_OPCODE_SAD 93
405 #define TGSI_OPCODE_TXF 94
406 #define TGSI_OPCODE_TXQ 95
407 #define TGSI_OPCODE_CONT 96
408 #define TGSI_OPCODE_EMIT 97
409 #define TGSI_OPCODE_ENDPRIM 98
410 #define TGSI_OPCODE_BGNLOOP 99
411 #define TGSI_OPCODE_BGNSUB 100
412 #define TGSI_OPCODE_ENDLOOP 101
413 #define TGSI_OPCODE_ENDSUB 102
414 #define TGSI_OPCODE_TXQ_LZ 103 /* TXQ for mipmap level 0 */
415 #define TGSI_OPCODE_TXQS 104
416 #define TGSI_OPCODE_RESQ 105
417 /* gap */
418 #define TGSI_OPCODE_NOP 107
419
420 #define TGSI_OPCODE_FSEQ 108
421 #define TGSI_OPCODE_FSGE 109
422 #define TGSI_OPCODE_FSLT 110
423 #define TGSI_OPCODE_FSNE 111
424
425 #define TGSI_OPCODE_MEMBAR 112
426 #define TGSI_OPCODE_CALLNZ 113
427 /* gap */
428 #define TGSI_OPCODE_BREAKC 115
429 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
430 #define TGSI_OPCODE_END 117 /* aka HALT */
431 #define TGSI_OPCODE_DFMA 118
432 #define TGSI_OPCODE_F2I 119
433 #define TGSI_OPCODE_IDIV 120
434 #define TGSI_OPCODE_IMAX 121
435 #define TGSI_OPCODE_IMIN 122
436 #define TGSI_OPCODE_INEG 123
437 #define TGSI_OPCODE_ISGE 124
438 #define TGSI_OPCODE_ISHR 125
439 #define TGSI_OPCODE_ISLT 126
440 #define TGSI_OPCODE_F2U 127
441 #define TGSI_OPCODE_U2F 128
442 #define TGSI_OPCODE_UADD 129
443 #define TGSI_OPCODE_UDIV 130
444 #define TGSI_OPCODE_UMAD 131
445 #define TGSI_OPCODE_UMAX 132
446 #define TGSI_OPCODE_UMIN 133
447 #define TGSI_OPCODE_UMOD 134
448 #define TGSI_OPCODE_UMUL 135
449 #define TGSI_OPCODE_USEQ 136
450 #define TGSI_OPCODE_USGE 137
451 #define TGSI_OPCODE_USHR 138
452 #define TGSI_OPCODE_USLT 139
453 #define TGSI_OPCODE_USNE 140
454 #define TGSI_OPCODE_SWITCH 141
455 #define TGSI_OPCODE_CASE 142
456 #define TGSI_OPCODE_DEFAULT 143
457 #define TGSI_OPCODE_ENDSWITCH 144
458
459 /* resource related opcodes */
460 #define TGSI_OPCODE_SAMPLE 145
461 #define TGSI_OPCODE_SAMPLE_I 146
462 #define TGSI_OPCODE_SAMPLE_I_MS 147
463 #define TGSI_OPCODE_SAMPLE_B 148
464 #define TGSI_OPCODE_SAMPLE_C 149
465 #define TGSI_OPCODE_SAMPLE_C_LZ 150
466 #define TGSI_OPCODE_SAMPLE_D 151
467 #define TGSI_OPCODE_SAMPLE_L 152
468 #define TGSI_OPCODE_GATHER4 153
469 #define TGSI_OPCODE_SVIEWINFO 154
470 #define TGSI_OPCODE_SAMPLE_POS 155
471 #define TGSI_OPCODE_SAMPLE_INFO 156
472
473 #define TGSI_OPCODE_UARL 157
474 #define TGSI_OPCODE_UCMP 158
475 #define TGSI_OPCODE_IABS 159
476 #define TGSI_OPCODE_ISSG 160
477
478 #define TGSI_OPCODE_LOAD 161
479 #define TGSI_OPCODE_STORE 162
480
481 #define TGSI_OPCODE_MFENCE 163
482 #define TGSI_OPCODE_LFENCE 164
483 #define TGSI_OPCODE_SFENCE 165
484 #define TGSI_OPCODE_BARRIER 166
485
486 #define TGSI_OPCODE_ATOMUADD 167
487 #define TGSI_OPCODE_ATOMXCHG 168
488 #define TGSI_OPCODE_ATOMCAS 169
489 #define TGSI_OPCODE_ATOMAND 170
490 #define TGSI_OPCODE_ATOMOR 171
491 #define TGSI_OPCODE_ATOMXOR 172
492 #define TGSI_OPCODE_ATOMUMIN 173
493 #define TGSI_OPCODE_ATOMUMAX 174
494 #define TGSI_OPCODE_ATOMIMIN 175
495 #define TGSI_OPCODE_ATOMIMAX 176
496
497 /* to be used for shadow cube map compares */
498 #define TGSI_OPCODE_TEX2 177
499 #define TGSI_OPCODE_TXB2 178
500 #define TGSI_OPCODE_TXL2 179
501
502 #define TGSI_OPCODE_IMUL_HI 180
503 #define TGSI_OPCODE_UMUL_HI 181
504
505 #define TGSI_OPCODE_TG4 182
506
507 #define TGSI_OPCODE_LODQ 183
508
509 #define TGSI_OPCODE_IBFE 184
510 #define TGSI_OPCODE_UBFE 185
511 #define TGSI_OPCODE_BFI 186
512 #define TGSI_OPCODE_BREV 187
513 #define TGSI_OPCODE_POPC 188
514 #define TGSI_OPCODE_LSB 189
515 #define TGSI_OPCODE_IMSB 190
516 #define TGSI_OPCODE_UMSB 191
517
518 #define TGSI_OPCODE_INTERP_CENTROID 192
519 #define TGSI_OPCODE_INTERP_SAMPLE 193
520 #define TGSI_OPCODE_INTERP_OFFSET 194
521
522 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
523 #define TGSI_OPCODE_F2D 195 /* SM5 */
524 #define TGSI_OPCODE_D2F 196
525 #define TGSI_OPCODE_DABS 197
526 #define TGSI_OPCODE_DNEG 198 /* SM5 */
527 #define TGSI_OPCODE_DADD 199 /* SM5 */
528 #define TGSI_OPCODE_DMUL 200 /* SM5 */
529 #define TGSI_OPCODE_DMAX 201 /* SM5 */
530 #define TGSI_OPCODE_DMIN 202 /* SM5 */
531 #define TGSI_OPCODE_DSLT 203 /* SM5 */
532 #define TGSI_OPCODE_DSGE 204 /* SM5 */
533 #define TGSI_OPCODE_DSEQ 205 /* SM5 */
534 #define TGSI_OPCODE_DSNE 206 /* SM5 */
535 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */
536 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */
537 #define TGSI_OPCODE_DMAD 209
538 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */
539 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */
540 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */
541 #define TGSI_OPCODE_D2I 213
542 #define TGSI_OPCODE_I2D 214
543 #define TGSI_OPCODE_D2U 215
544 #define TGSI_OPCODE_U2D 216
545 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */
546 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */
547 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */
548 #define TGSI_OPCODE_DFLR 220 /* nvc0 */
549 #define TGSI_OPCODE_DROUND 221 /* nvc0 */
550 #define TGSI_OPCODE_DSSG 222
551 #define TGSI_OPCODE_LAST 223
552
553 /**
554 * Opcode is the operation code to execute. A given operation defines the
555 * semantics how the source registers (if any) are interpreted and what is
556 * written to the destination registers (if any) as a result of execution.
557 *
558 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
559 * respectively. For a given operation code, those numbers are fixed and are
560 * present here only for convenience.
561 *
562 * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
563 *
564 * Saturate controls how are final results in destination registers modified.
565 */
566
567 struct tgsi_instruction
568 {
569 unsigned Type : 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
570 unsigned NrTokens : 8; /* UINT */
571 unsigned Opcode : 8; /* TGSI_OPCODE_ */
572 unsigned Saturate : 1; /* BOOL */
573 unsigned NumDstRegs : 2; /* UINT */
574 unsigned NumSrcRegs : 4; /* UINT */
575 unsigned Predicate : 1; /* BOOL */
576 unsigned Label : 1;
577 unsigned Texture : 1;
578 unsigned Memory : 1;
579 unsigned Padding : 1;
580 };
581
582 /*
583 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
584 *
585 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
586 * if texture instruction has a number of offsets,
587 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
588 *
589 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
590 *
591 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
592 *
593 * tgsi_instruction::NrTokens contains the total number of words that make the
594 * instruction, including the instruction word.
595 */
596
597 #define TGSI_SWIZZLE_X 0
598 #define TGSI_SWIZZLE_Y 1
599 #define TGSI_SWIZZLE_Z 2
600 #define TGSI_SWIZZLE_W 3
601
602 struct tgsi_instruction_label
603 {
604 unsigned Label : 24; /* UINT */
605 unsigned Padding : 8;
606 };
607
608 #define TGSI_TEXTURE_BUFFER 0
609 #define TGSI_TEXTURE_1D 1
610 #define TGSI_TEXTURE_2D 2
611 #define TGSI_TEXTURE_3D 3
612 #define TGSI_TEXTURE_CUBE 4
613 #define TGSI_TEXTURE_RECT 5
614 #define TGSI_TEXTURE_SHADOW1D 6
615 #define TGSI_TEXTURE_SHADOW2D 7
616 #define TGSI_TEXTURE_SHADOWRECT 8
617 #define TGSI_TEXTURE_1D_ARRAY 9
618 #define TGSI_TEXTURE_2D_ARRAY 10
619 #define TGSI_TEXTURE_SHADOW1D_ARRAY 11
620 #define TGSI_TEXTURE_SHADOW2D_ARRAY 12
621 #define TGSI_TEXTURE_SHADOWCUBE 13
622 #define TGSI_TEXTURE_2D_MSAA 14
623 #define TGSI_TEXTURE_2D_ARRAY_MSAA 15
624 #define TGSI_TEXTURE_CUBE_ARRAY 16
625 #define TGSI_TEXTURE_SHADOWCUBE_ARRAY 17
626 #define TGSI_TEXTURE_UNKNOWN 18
627 #define TGSI_TEXTURE_COUNT 19
628
629 struct tgsi_instruction_texture
630 {
631 unsigned Texture : 8; /* TGSI_TEXTURE_ */
632 unsigned NumOffsets : 4;
633 unsigned Padding : 20;
634 };
635
636 /* for texture offsets in GLSL and DirectX.
637 * Generally these always come from TGSI_FILE_IMMEDIATE,
638 * however DX11 appears to have the capability to do
639 * non-constant texture offsets.
640 */
641 struct tgsi_texture_offset
642 {
643 int Index : 16;
644 unsigned File : 4; /**< one of TGSI_FILE_x */
645 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
646 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
647 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
648 unsigned Padding : 6;
649 };
650
651 /*
652 * For SM3, the following constraint applies.
653 * - Swizzle is either set to identity or replicate.
654 */
655 struct tgsi_instruction_predicate
656 {
657 int Index : 16; /* SINT */
658 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
659 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
660 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
661 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_x */
662 unsigned Negate : 1; /* BOOL */
663 unsigned Padding : 7;
664 };
665
666 /**
667 * File specifies the register array to access.
668 *
669 * Index specifies the element number of a register in the register file.
670 *
671 * If Indirect is TRUE, Index should be offset by the X component of the indirect
672 * register that follows. The register can be now fetched into local storage
673 * for further processing.
674 *
675 * If Negate is TRUE, all components of the fetched register are negated.
676 *
677 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
678 * SwizzleZ and SwizzleW.
679 *
680 */
681
682 struct tgsi_src_register
683 {
684 unsigned File : 4; /* TGSI_FILE_ */
685 unsigned Indirect : 1; /* BOOL */
686 unsigned Dimension : 1; /* BOOL */
687 int Index : 16; /* SINT */
688 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_ */
689 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_ */
690 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_ */
691 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_ */
692 unsigned Absolute : 1; /* BOOL */
693 unsigned Negate : 1; /* BOOL */
694 };
695
696 /**
697 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
698 *
699 * File, Index and Swizzle are handled the same as in tgsi_src_register.
700 *
701 * If ArrayID is zero the whole register file might be indirectly addressed,
702 * if not only the Declaration with this ArrayID is accessed by this operand.
703 *
704 */
705
706 struct tgsi_ind_register
707 {
708 unsigned File : 4; /* TGSI_FILE_ */
709 int Index : 16; /* SINT */
710 unsigned Swizzle : 2; /* TGSI_SWIZZLE_ */
711 unsigned ArrayID : 10; /* UINT */
712 };
713
714 /**
715 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
716 */
717
718 struct tgsi_dimension
719 {
720 unsigned Indirect : 1; /* BOOL */
721 unsigned Dimension : 1; /* BOOL */
722 unsigned Padding : 14;
723 int Index : 16; /* SINT */
724 };
725
726 struct tgsi_dst_register
727 {
728 unsigned File : 4; /* TGSI_FILE_ */
729 unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */
730 unsigned Indirect : 1; /* BOOL */
731 unsigned Dimension : 1; /* BOOL */
732 int Index : 16; /* SINT */
733 unsigned Padding : 6;
734 };
735
736 #define TGSI_MEMORY_COHERENT (1 << 0)
737 #define TGSI_MEMORY_RESTRICT (1 << 1)
738 #define TGSI_MEMORY_VOLATILE (1 << 2)
739
740 /**
741 * Specifies the type of memory access to do for the LOAD/STORE instruction.
742 */
743 struct tgsi_instruction_memory
744 {
745 unsigned Qualifier : 3; /* TGSI_MEMORY_ */
746 unsigned Padding : 29;
747 };
748
749 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
750 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
751 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2)
752 #define TGSI_MEMBAR_SHARED (1 << 3)
753 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4)
754
755 #ifdef __cplusplus
756 }
757 #endif
758
759 #endif /* P_SHADER_TOKENS_H */