1 /**************************************************************************
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
29 #ifndef P_SHADER_TOKENS_H
30 #define P_SHADER_TOKENS_H
39 unsigned HeaderSize
: 8;
40 unsigned BodySize
: 24;
45 unsigned Processor
: 4; /* PIPE_SHADER_ */
46 unsigned Padding
: 28;
49 enum tgsi_token_type
{
50 TGSI_TOKEN_TYPE_DECLARATION
,
51 TGSI_TOKEN_TYPE_IMMEDIATE
,
52 TGSI_TOKEN_TYPE_INSTRUCTION
,
53 TGSI_TOKEN_TYPE_PROPERTY
,
58 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_x */
59 unsigned NrTokens
: 8; /**< UINT */
60 unsigned Padding
: 20;
73 TGSI_FILE_SYSTEM_VALUE
,
75 TGSI_FILE_SAMPLER_VIEW
,
78 TGSI_FILE_COUNT
, /**< how many TGSI_FILE_ types */
82 #define TGSI_WRITEMASK_NONE 0x00
83 #define TGSI_WRITEMASK_X 0x01
84 #define TGSI_WRITEMASK_Y 0x02
85 #define TGSI_WRITEMASK_XY 0x03
86 #define TGSI_WRITEMASK_Z 0x04
87 #define TGSI_WRITEMASK_XZ 0x05
88 #define TGSI_WRITEMASK_YZ 0x06
89 #define TGSI_WRITEMASK_XYZ 0x07
90 #define TGSI_WRITEMASK_W 0x08
91 #define TGSI_WRITEMASK_XW 0x09
92 #define TGSI_WRITEMASK_YW 0x0A
93 #define TGSI_WRITEMASK_XYW 0x0B
94 #define TGSI_WRITEMASK_ZW 0x0C
95 #define TGSI_WRITEMASK_XZW 0x0D
96 #define TGSI_WRITEMASK_YZW 0x0E
97 #define TGSI_WRITEMASK_XYZW 0x0F
99 enum tgsi_interpolate_mode
{
100 TGSI_INTERPOLATE_CONSTANT
,
101 TGSI_INTERPOLATE_LINEAR
,
102 TGSI_INTERPOLATE_PERSPECTIVE
,
103 TGSI_INTERPOLATE_COLOR
, /* special color case for smooth/flat */
104 TGSI_INTERPOLATE_COUNT
,
107 enum tgsi_interpolate_loc
{
108 TGSI_INTERPOLATE_LOC_CENTER
,
109 TGSI_INTERPOLATE_LOC_CENTROID
,
110 TGSI_INTERPOLATE_LOC_SAMPLE
,
111 TGSI_INTERPOLATE_LOC_COUNT
,
114 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
115 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
116 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
117 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
119 enum tgsi_memory_type
{
120 TGSI_MEMORY_TYPE_GLOBAL
, /* OpenCL global */
121 TGSI_MEMORY_TYPE_SHARED
, /* OpenCL local / GLSL shared */
122 TGSI_MEMORY_TYPE_PRIVATE
, /* OpenCL private */
123 TGSI_MEMORY_TYPE_INPUT
, /* OpenCL kernel input params */
124 TGSI_MEMORY_TYPE_COUNT
,
127 struct tgsi_declaration
129 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_DECLARATION */
130 unsigned NrTokens
: 8; /**< UINT */
131 unsigned File
: 4; /**< one of TGSI_FILE_x */
132 unsigned UsageMask
: 4; /**< bitmask of TGSI_WRITEMASK_x flags */
133 unsigned Dimension
: 1; /**< any extra dimension info? */
134 unsigned Semantic
: 1; /**< BOOL, any semantic info? */
135 unsigned Interpolate
: 1; /**< any interpolation info? */
136 unsigned Invariant
: 1; /**< invariant optimization? */
137 unsigned Local
: 1; /**< optimize as subroutine local variable? */
138 unsigned Array
: 1; /**< extra array info? */
139 unsigned Atomic
: 1; /**< atomic only? for TGSI_FILE_BUFFER */
140 unsigned MemType
: 2; /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
141 unsigned Padding
: 3;
144 struct tgsi_declaration_range
146 unsigned First
: 16; /**< UINT */
147 unsigned Last
: 16; /**< UINT */
150 struct tgsi_declaration_dimension
152 unsigned Index2D
:16; /**< UINT */
156 struct tgsi_declaration_interp
158 unsigned Interpolate
: 4; /**< one of TGSI_INTERPOLATE_x */
159 unsigned Location
: 2; /**< one of TGSI_INTERPOLATE_LOC_x */
160 unsigned CylindricalWrap
:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
161 unsigned Padding
: 22;
165 TGSI_SEMANTIC_POSITION
,
167 TGSI_SEMANTIC_BCOLOR
, /**< back-face color */
170 TGSI_SEMANTIC_GENERIC
,
171 TGSI_SEMANTIC_NORMAL
,
173 TGSI_SEMANTIC_EDGEFLAG
,
174 TGSI_SEMANTIC_PRIMID
,
175 TGSI_SEMANTIC_INSTANCEID
, /**< doesn't include start_instance */
176 TGSI_SEMANTIC_VERTEXID
,
177 TGSI_SEMANTIC_STENCIL
,
178 TGSI_SEMANTIC_CLIPDIST
,
179 TGSI_SEMANTIC_CLIPVERTEX
,
180 TGSI_SEMANTIC_GRID_SIZE
, /**< grid size in blocks */
181 TGSI_SEMANTIC_BLOCK_ID
, /**< id of the current block */
182 TGSI_SEMANTIC_BLOCK_SIZE
, /**< block size in threads */
183 TGSI_SEMANTIC_THREAD_ID
, /**< block-relative id of the current thread */
184 TGSI_SEMANTIC_TEXCOORD
, /**< texture or sprite coordinates */
185 TGSI_SEMANTIC_PCOORD
, /**< point sprite coordinate */
186 TGSI_SEMANTIC_VIEWPORT_INDEX
, /**< viewport index */
187 TGSI_SEMANTIC_LAYER
, /**< layer (rendertarget index) */
188 TGSI_SEMANTIC_SAMPLEID
,
189 TGSI_SEMANTIC_SAMPLEPOS
,
190 TGSI_SEMANTIC_SAMPLEMASK
,
191 TGSI_SEMANTIC_INVOCATIONID
,
192 TGSI_SEMANTIC_VERTEXID_NOBASE
,
193 TGSI_SEMANTIC_BASEVERTEX
,
194 TGSI_SEMANTIC_PATCH
, /**< generic per-patch semantic */
195 TGSI_SEMANTIC_TESSCOORD
, /**< coordinate being processed by tess */
196 TGSI_SEMANTIC_TESSOUTER
, /**< outer tessellation levels */
197 TGSI_SEMANTIC_TESSINNER
, /**< inner tessellation levels */
198 TGSI_SEMANTIC_VERTICESIN
, /**< number of input vertices */
199 TGSI_SEMANTIC_HELPER_INVOCATION
, /**< current invocation is helper */
200 TGSI_SEMANTIC_BASEINSTANCE
,
201 TGSI_SEMANTIC_DRAWID
,
202 TGSI_SEMANTIC_WORK_DIM
, /**< opencl get_work_dim value */
203 TGSI_SEMANTIC_COUNT
, /**< number of semantic values */
206 struct tgsi_declaration_semantic
208 unsigned Name
: 8; /**< one of TGSI_SEMANTIC_x */
209 unsigned Index
: 16; /**< UINT */
210 unsigned StreamX
: 2; /**< vertex stream (for GS output) */
211 unsigned StreamY
: 2;
212 unsigned StreamZ
: 2;
213 unsigned StreamW
: 2;
216 struct tgsi_declaration_image
{
217 unsigned Resource
: 8; /**< one of TGSI_TEXTURE_ */
219 unsigned Writable
: 1;
220 unsigned Format
: 10; /**< one of PIPE_FORMAT_ */
221 unsigned Padding
: 12;
224 enum tgsi_return_type
{
225 TGSI_RETURN_TYPE_UNORM
= 0,
226 TGSI_RETURN_TYPE_SNORM
,
227 TGSI_RETURN_TYPE_SINT
,
228 TGSI_RETURN_TYPE_UINT
,
229 TGSI_RETURN_TYPE_FLOAT
,
230 TGSI_RETURN_TYPE_COUNT
233 struct tgsi_declaration_sampler_view
{
234 unsigned Resource
: 8; /**< one of TGSI_TEXTURE_ */
235 unsigned ReturnTypeX
: 6; /**< one of enum tgsi_return_type */
236 unsigned ReturnTypeY
: 6; /**< one of enum tgsi_return_type */
237 unsigned ReturnTypeZ
: 6; /**< one of enum tgsi_return_type */
238 unsigned ReturnTypeW
: 6; /**< one of enum tgsi_return_type */
241 struct tgsi_declaration_array
{
242 unsigned ArrayID
: 10;
243 unsigned Padding
: 22;
255 struct tgsi_immediate
257 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
258 unsigned NrTokens
: 14; /**< UINT */
259 unsigned DataType
: 4; /**< one of TGSI_IMM_x */
260 unsigned Padding
: 10;
263 union tgsi_immediate_data
270 enum tgsi_property_name
{
271 TGSI_PROPERTY_GS_INPUT_PRIM
,
272 TGSI_PROPERTY_GS_OUTPUT_PRIM
,
273 TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES
,
274 TGSI_PROPERTY_FS_COORD_ORIGIN
,
275 TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
,
276 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
,
277 TGSI_PROPERTY_FS_DEPTH_LAYOUT
,
278 TGSI_PROPERTY_VS_PROHIBIT_UCPS
,
279 TGSI_PROPERTY_GS_INVOCATIONS
,
280 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION
,
281 TGSI_PROPERTY_TCS_VERTICES_OUT
,
282 TGSI_PROPERTY_TES_PRIM_MODE
,
283 TGSI_PROPERTY_TES_SPACING
,
284 TGSI_PROPERTY_TES_VERTEX_ORDER_CW
,
285 TGSI_PROPERTY_TES_POINT_MODE
,
286 TGSI_PROPERTY_NUM_CLIPDIST_ENABLED
,
287 TGSI_PROPERTY_NUM_CULLDIST_ENABLED
,
288 TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL
,
289 TGSI_PROPERTY_NEXT_SHADER
,
290 TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
,
291 TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
,
292 TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
,
293 TGSI_PROPERTY_MUL_ZERO_WINS
,
297 struct tgsi_property
{
298 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
299 unsigned NrTokens
: 8; /**< UINT */
300 unsigned PropertyName
: 8; /**< one of TGSI_PROPERTY */
301 unsigned Padding
: 12;
304 enum tgsi_fs_coord_origin
{
305 TGSI_FS_COORD_ORIGIN_UPPER_LEFT
,
306 TGSI_FS_COORD_ORIGIN_LOWER_LEFT
,
309 enum tgsi_fs_coord_pixcenter
{
310 TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
,
311 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
,
314 enum tgsi_fs_depth_layout
{
315 TGSI_FS_DEPTH_LAYOUT_NONE
,
316 TGSI_FS_DEPTH_LAYOUT_ANY
,
317 TGSI_FS_DEPTH_LAYOUT_GREATER
,
318 TGSI_FS_DEPTH_LAYOUT_LESS
,
319 TGSI_FS_DEPTH_LAYOUT_UNCHANGED
,
322 struct tgsi_property_data
{
328 * For more information on semantics of opcodes and
329 * which APIs are known to use which opcodes, see
330 * gallium/docs/source/tgsi.rst
332 #define TGSI_OPCODE_ARL 0
333 #define TGSI_OPCODE_MOV 1
334 #define TGSI_OPCODE_LIT 2
335 #define TGSI_OPCODE_RCP 3
336 #define TGSI_OPCODE_RSQ 4
337 #define TGSI_OPCODE_EXP 5
338 #define TGSI_OPCODE_LOG 6
339 #define TGSI_OPCODE_MUL 7
340 #define TGSI_OPCODE_ADD 8
341 #define TGSI_OPCODE_DP3 9
342 #define TGSI_OPCODE_DP4 10
343 #define TGSI_OPCODE_DST 11
344 #define TGSI_OPCODE_MIN 12
345 #define TGSI_OPCODE_MAX 13
346 #define TGSI_OPCODE_SLT 14
347 #define TGSI_OPCODE_SGE 15
348 #define TGSI_OPCODE_MAD 16
350 #define TGSI_OPCODE_LRP 18
351 #define TGSI_OPCODE_FMA 19
352 #define TGSI_OPCODE_SQRT 20
353 #define TGSI_OPCODE_DP2A 21
354 #define TGSI_OPCODE_F2U64 22
355 #define TGSI_OPCODE_F2I64 23
356 #define TGSI_OPCODE_FRC 24
358 #define TGSI_OPCODE_FLR 26
359 #define TGSI_OPCODE_ROUND 27
360 #define TGSI_OPCODE_EX2 28
361 #define TGSI_OPCODE_LG2 29
362 #define TGSI_OPCODE_POW 30
363 #define TGSI_OPCODE_XPD 31
364 #define TGSI_OPCODE_U2I64 32
366 #define TGSI_OPCODE_I2I64 34
367 #define TGSI_OPCODE_DPH 35
368 #define TGSI_OPCODE_COS 36
369 #define TGSI_OPCODE_DDX 37
370 #define TGSI_OPCODE_DDY 38
371 #define TGSI_OPCODE_KILL 39 /* unconditional */
372 #define TGSI_OPCODE_PK2H 40
373 #define TGSI_OPCODE_PK2US 41
374 #define TGSI_OPCODE_PK4B 42
375 #define TGSI_OPCODE_PK4UB 43
376 #define TGSI_OPCODE_D2U64 44
377 #define TGSI_OPCODE_SEQ 45
378 #define TGSI_OPCODE_D2I64 46
379 #define TGSI_OPCODE_SGT 47
380 #define TGSI_OPCODE_SIN 48
381 #define TGSI_OPCODE_SLE 49
382 #define TGSI_OPCODE_SNE 50
383 #define TGSI_OPCODE_U642D 51
384 #define TGSI_OPCODE_TEX 52
385 #define TGSI_OPCODE_TXD 53
386 #define TGSI_OPCODE_TXP 54
387 #define TGSI_OPCODE_UP2H 55
388 #define TGSI_OPCODE_UP2US 56
389 #define TGSI_OPCODE_UP4B 57
390 #define TGSI_OPCODE_UP4UB 58
391 #define TGSI_OPCODE_U642F 59
392 #define TGSI_OPCODE_I642F 60
393 #define TGSI_OPCODE_ARR 61
394 #define TGSI_OPCODE_I642D 62
395 #define TGSI_OPCODE_CAL 63
396 #define TGSI_OPCODE_RET 64
397 #define TGSI_OPCODE_SSG 65 /* SGN */
398 #define TGSI_OPCODE_CMP 66
399 #define TGSI_OPCODE_SCS 67
400 #define TGSI_OPCODE_TXB 68
401 #define TGSI_OPCODE_FBFETCH 69
402 #define TGSI_OPCODE_DIV 70
403 #define TGSI_OPCODE_DP2 71
404 #define TGSI_OPCODE_TXL 72
405 #define TGSI_OPCODE_BRK 73
406 #define TGSI_OPCODE_IF 74
407 #define TGSI_OPCODE_UIF 75
409 #define TGSI_OPCODE_ELSE 77
410 #define TGSI_OPCODE_ENDIF 78
412 #define TGSI_OPCODE_DDX_FINE 79
413 #define TGSI_OPCODE_DDY_FINE 80
415 #define TGSI_OPCODE_PUSHA 81
416 #define TGSI_OPCODE_POPA 82
417 #define TGSI_OPCODE_CEIL 83
418 #define TGSI_OPCODE_I2F 84
419 #define TGSI_OPCODE_NOT 85
420 #define TGSI_OPCODE_TRUNC 86
421 #define TGSI_OPCODE_SHL 87
423 #define TGSI_OPCODE_AND 89
424 #define TGSI_OPCODE_OR 90
425 #define TGSI_OPCODE_MOD 91
426 #define TGSI_OPCODE_XOR 92
427 #define TGSI_OPCODE_SAD 93
428 #define TGSI_OPCODE_TXF 94
429 #define TGSI_OPCODE_TXQ 95
430 #define TGSI_OPCODE_CONT 96
431 #define TGSI_OPCODE_EMIT 97
432 #define TGSI_OPCODE_ENDPRIM 98
433 #define TGSI_OPCODE_BGNLOOP 99
434 #define TGSI_OPCODE_BGNSUB 100
435 #define TGSI_OPCODE_ENDLOOP 101
436 #define TGSI_OPCODE_ENDSUB 102
437 #define TGSI_OPCODE_TXQ_LZ 103 /* TXQ for mipmap level 0 */
438 #define TGSI_OPCODE_TXQS 104
439 #define TGSI_OPCODE_RESQ 105
441 #define TGSI_OPCODE_NOP 107
443 #define TGSI_OPCODE_FSEQ 108
444 #define TGSI_OPCODE_FSGE 109
445 #define TGSI_OPCODE_FSLT 110
446 #define TGSI_OPCODE_FSNE 111
448 #define TGSI_OPCODE_MEMBAR 112
449 #define TGSI_OPCODE_CALLNZ 113
451 #define TGSI_OPCODE_BREAKC 115
452 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
453 #define TGSI_OPCODE_END 117 /* aka HALT */
454 #define TGSI_OPCODE_DFMA 118
455 #define TGSI_OPCODE_F2I 119
456 #define TGSI_OPCODE_IDIV 120
457 #define TGSI_OPCODE_IMAX 121
458 #define TGSI_OPCODE_IMIN 122
459 #define TGSI_OPCODE_INEG 123
460 #define TGSI_OPCODE_ISGE 124
461 #define TGSI_OPCODE_ISHR 125
462 #define TGSI_OPCODE_ISLT 126
463 #define TGSI_OPCODE_F2U 127
464 #define TGSI_OPCODE_U2F 128
465 #define TGSI_OPCODE_UADD 129
466 #define TGSI_OPCODE_UDIV 130
467 #define TGSI_OPCODE_UMAD 131
468 #define TGSI_OPCODE_UMAX 132
469 #define TGSI_OPCODE_UMIN 133
470 #define TGSI_OPCODE_UMOD 134
471 #define TGSI_OPCODE_UMUL 135
472 #define TGSI_OPCODE_USEQ 136
473 #define TGSI_OPCODE_USGE 137
474 #define TGSI_OPCODE_USHR 138
475 #define TGSI_OPCODE_USLT 139
476 #define TGSI_OPCODE_USNE 140
477 #define TGSI_OPCODE_SWITCH 141
478 #define TGSI_OPCODE_CASE 142
479 #define TGSI_OPCODE_DEFAULT 143
480 #define TGSI_OPCODE_ENDSWITCH 144
482 /* resource related opcodes */
483 #define TGSI_OPCODE_SAMPLE 145
484 #define TGSI_OPCODE_SAMPLE_I 146
485 #define TGSI_OPCODE_SAMPLE_I_MS 147
486 #define TGSI_OPCODE_SAMPLE_B 148
487 #define TGSI_OPCODE_SAMPLE_C 149
488 #define TGSI_OPCODE_SAMPLE_C_LZ 150
489 #define TGSI_OPCODE_SAMPLE_D 151
490 #define TGSI_OPCODE_SAMPLE_L 152
491 #define TGSI_OPCODE_GATHER4 153
492 #define TGSI_OPCODE_SVIEWINFO 154
493 #define TGSI_OPCODE_SAMPLE_POS 155
494 #define TGSI_OPCODE_SAMPLE_INFO 156
496 #define TGSI_OPCODE_UARL 157
497 #define TGSI_OPCODE_UCMP 158
498 #define TGSI_OPCODE_IABS 159
499 #define TGSI_OPCODE_ISSG 160
501 #define TGSI_OPCODE_LOAD 161
502 #define TGSI_OPCODE_STORE 162
504 #define TGSI_OPCODE_MFENCE 163
505 #define TGSI_OPCODE_LFENCE 164
506 #define TGSI_OPCODE_SFENCE 165
507 #define TGSI_OPCODE_BARRIER 166
509 #define TGSI_OPCODE_ATOMUADD 167
510 #define TGSI_OPCODE_ATOMXCHG 168
511 #define TGSI_OPCODE_ATOMCAS 169
512 #define TGSI_OPCODE_ATOMAND 170
513 #define TGSI_OPCODE_ATOMOR 171
514 #define TGSI_OPCODE_ATOMXOR 172
515 #define TGSI_OPCODE_ATOMUMIN 173
516 #define TGSI_OPCODE_ATOMUMAX 174
517 #define TGSI_OPCODE_ATOMIMIN 175
518 #define TGSI_OPCODE_ATOMIMAX 176
520 /* to be used for shadow cube map compares */
521 #define TGSI_OPCODE_TEX2 177
522 #define TGSI_OPCODE_TXB2 178
523 #define TGSI_OPCODE_TXL2 179
525 #define TGSI_OPCODE_IMUL_HI 180
526 #define TGSI_OPCODE_UMUL_HI 181
528 #define TGSI_OPCODE_TG4 182
530 #define TGSI_OPCODE_LODQ 183
532 #define TGSI_OPCODE_IBFE 184
533 #define TGSI_OPCODE_UBFE 185
534 #define TGSI_OPCODE_BFI 186
535 #define TGSI_OPCODE_BREV 187
536 #define TGSI_OPCODE_POPC 188
537 #define TGSI_OPCODE_LSB 189
538 #define TGSI_OPCODE_IMSB 190
539 #define TGSI_OPCODE_UMSB 191
541 #define TGSI_OPCODE_INTERP_CENTROID 192
542 #define TGSI_OPCODE_INTERP_SAMPLE 193
543 #define TGSI_OPCODE_INTERP_OFFSET 194
545 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
546 #define TGSI_OPCODE_F2D 195 /* SM5 */
547 #define TGSI_OPCODE_D2F 196
548 #define TGSI_OPCODE_DABS 197
549 #define TGSI_OPCODE_DNEG 198 /* SM5 */
550 #define TGSI_OPCODE_DADD 199 /* SM5 */
551 #define TGSI_OPCODE_DMUL 200 /* SM5 */
552 #define TGSI_OPCODE_DMAX 201 /* SM5 */
553 #define TGSI_OPCODE_DMIN 202 /* SM5 */
554 #define TGSI_OPCODE_DSLT 203 /* SM5 */
555 #define TGSI_OPCODE_DSGE 204 /* SM5 */
556 #define TGSI_OPCODE_DSEQ 205 /* SM5 */
557 #define TGSI_OPCODE_DSNE 206 /* SM5 */
558 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */
559 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */
560 #define TGSI_OPCODE_DMAD 209
561 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */
562 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */
563 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */
564 #define TGSI_OPCODE_D2I 213
565 #define TGSI_OPCODE_I2D 214
566 #define TGSI_OPCODE_D2U 215
567 #define TGSI_OPCODE_U2D 216
568 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */
569 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */
570 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */
571 #define TGSI_OPCODE_DFLR 220 /* nvc0 */
572 #define TGSI_OPCODE_DROUND 221 /* nvc0 */
573 #define TGSI_OPCODE_DSSG 222
575 #define TGSI_OPCODE_VOTE_ANY 223
576 #define TGSI_OPCODE_VOTE_ALL 224
577 #define TGSI_OPCODE_VOTE_EQ 225
579 #define TGSI_OPCODE_U64SEQ 226
580 #define TGSI_OPCODE_U64SNE 227
581 #define TGSI_OPCODE_I64SLT 228
582 #define TGSI_OPCODE_U64SLT 229
583 #define TGSI_OPCODE_I64SGE 230
584 #define TGSI_OPCODE_U64SGE 231
586 #define TGSI_OPCODE_I64MIN 232
587 #define TGSI_OPCODE_U64MIN 233
588 #define TGSI_OPCODE_I64MAX 234
589 #define TGSI_OPCODE_U64MAX 235
591 #define TGSI_OPCODE_I64ABS 236
592 #define TGSI_OPCODE_I64SSG 237
593 #define TGSI_OPCODE_I64NEG 238
595 #define TGSI_OPCODE_U64ADD 239
596 #define TGSI_OPCODE_U64MUL 240
597 #define TGSI_OPCODE_U64SHL 241
598 #define TGSI_OPCODE_I64SHR 242
599 #define TGSI_OPCODE_U64SHR 243
601 #define TGSI_OPCODE_I64DIV 244
602 #define TGSI_OPCODE_U64DIV 245
603 #define TGSI_OPCODE_I64MOD 246
604 #define TGSI_OPCODE_U64MOD 247
606 #define TGSI_OPCODE_DDIV 248
608 #define TGSI_OPCODE_LAST 249
611 * Opcode is the operation code to execute. A given operation defines the
612 * semantics how the source registers (if any) are interpreted and what is
613 * written to the destination registers (if any) as a result of execution.
615 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
616 * respectively. For a given operation code, those numbers are fixed and are
617 * present here only for convenience.
619 * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
621 * Saturate controls how are final results in destination registers modified.
624 struct tgsi_instruction
626 unsigned Type
: 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
627 unsigned NrTokens
: 8; /* UINT */
628 unsigned Opcode
: 8; /* TGSI_OPCODE_ */
629 unsigned Saturate
: 1; /* BOOL */
630 unsigned NumDstRegs
: 2; /* UINT */
631 unsigned NumSrcRegs
: 4; /* UINT */
632 unsigned Predicate
: 1; /* BOOL */
634 unsigned Texture
: 1;
636 unsigned Padding
: 1;
640 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
642 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
643 * if texture instruction has a number of offsets,
644 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
646 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
648 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
650 * tgsi_instruction::NrTokens contains the total number of words that make the
651 * instruction, including the instruction word.
661 struct tgsi_instruction_label
663 unsigned Label
: 24; /* UINT */
664 unsigned Padding
: 8;
667 enum tgsi_texture_type
{
674 TGSI_TEXTURE_SHADOW1D
,
675 TGSI_TEXTURE_SHADOW2D
,
676 TGSI_TEXTURE_SHADOWRECT
,
677 TGSI_TEXTURE_1D_ARRAY
,
678 TGSI_TEXTURE_2D_ARRAY
,
679 TGSI_TEXTURE_SHADOW1D_ARRAY
,
680 TGSI_TEXTURE_SHADOW2D_ARRAY
,
681 TGSI_TEXTURE_SHADOWCUBE
,
682 TGSI_TEXTURE_2D_MSAA
,
683 TGSI_TEXTURE_2D_ARRAY_MSAA
,
684 TGSI_TEXTURE_CUBE_ARRAY
,
685 TGSI_TEXTURE_SHADOWCUBE_ARRAY
,
686 TGSI_TEXTURE_UNKNOWN
,
690 struct tgsi_instruction_texture
692 unsigned Texture
: 8; /* TGSI_TEXTURE_ */
693 unsigned NumOffsets
: 4;
694 unsigned Padding
: 20;
697 /* for texture offsets in GLSL and DirectX.
698 * Generally these always come from TGSI_FILE_IMMEDIATE,
699 * however DX11 appears to have the capability to do
700 * non-constant texture offsets.
702 struct tgsi_texture_offset
705 unsigned File
: 4; /**< one of TGSI_FILE_x */
706 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_x */
707 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_x */
708 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_x */
709 unsigned Padding
: 6;
713 * For SM3, the following constraint applies.
714 * - Swizzle is either set to identity or replicate.
716 struct tgsi_instruction_predicate
718 int Index
: 16; /* SINT */
719 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_x */
720 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_x */
721 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_x */
722 unsigned SwizzleW
: 2; /* TGSI_SWIZZLE_x */
723 unsigned Negate
: 1; /* BOOL */
724 unsigned Padding
: 7;
728 * File specifies the register array to access.
730 * Index specifies the element number of a register in the register file.
732 * If Indirect is TRUE, Index should be offset by the X component of the indirect
733 * register that follows. The register can be now fetched into local storage
734 * for further processing.
736 * If Negate is TRUE, all components of the fetched register are negated.
738 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
739 * SwizzleZ and SwizzleW.
743 struct tgsi_src_register
745 unsigned File
: 4; /* TGSI_FILE_ */
746 unsigned Indirect
: 1; /* BOOL */
747 unsigned Dimension
: 1; /* BOOL */
748 int Index
: 16; /* SINT */
749 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_ */
750 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_ */
751 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_ */
752 unsigned SwizzleW
: 2; /* TGSI_SWIZZLE_ */
753 unsigned Absolute
: 1; /* BOOL */
754 unsigned Negate
: 1; /* BOOL */
758 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
760 * File, Index and Swizzle are handled the same as in tgsi_src_register.
762 * If ArrayID is zero the whole register file might be indirectly addressed,
763 * if not only the Declaration with this ArrayID is accessed by this operand.
767 struct tgsi_ind_register
769 unsigned File
: 4; /* TGSI_FILE_ */
770 int Index
: 16; /* SINT */
771 unsigned Swizzle
: 2; /* TGSI_SWIZZLE_ */
772 unsigned ArrayID
: 10; /* UINT */
776 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
779 struct tgsi_dimension
781 unsigned Indirect
: 1; /* BOOL */
782 unsigned Dimension
: 1; /* BOOL */
783 unsigned Padding
: 14;
784 int Index
: 16; /* SINT */
787 struct tgsi_dst_register
789 unsigned File
: 4; /* TGSI_FILE_ */
790 unsigned WriteMask
: 4; /* TGSI_WRITEMASK_ */
791 unsigned Indirect
: 1; /* BOOL */
792 unsigned Dimension
: 1; /* BOOL */
793 int Index
: 16; /* SINT */
794 unsigned Padding
: 6;
797 #define TGSI_MEMORY_COHERENT (1 << 0)
798 #define TGSI_MEMORY_RESTRICT (1 << 1)
799 #define TGSI_MEMORY_VOLATILE (1 << 2)
802 * Specifies the type of memory access to do for the LOAD/STORE instruction.
804 struct tgsi_instruction_memory
806 unsigned Qualifier
: 3; /* TGSI_MEMORY_ */
807 unsigned Texture
: 8; /* only for images: TGSI_TEXTURE_ */
808 unsigned Format
: 10; /* only for images: PIPE_FORMAT_ */
809 unsigned Padding
: 11;
812 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
813 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
814 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2)
815 #define TGSI_MEMBAR_SHARED (1 << 3)
816 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4)
822 #endif /* P_SHADER_TOKENS_H */