tgsi: remove culldist semantic.
[mesa.git] / src / gallium / include / pipe / p_shader_tokens.h
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
5 * All Rights Reserved.
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12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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28
29 #ifndef P_SHADER_TOKENS_H
30 #define P_SHADER_TOKENS_H
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36
37 struct tgsi_header
38 {
39 unsigned HeaderSize : 8;
40 unsigned BodySize : 24;
41 };
42
43 struct tgsi_processor
44 {
45 unsigned Processor : 4; /* PIPE_SHADER_ */
46 unsigned Padding : 28;
47 };
48
49 enum tgsi_token_type {
50 TGSI_TOKEN_TYPE_DECLARATION,
51 TGSI_TOKEN_TYPE_IMMEDIATE,
52 TGSI_TOKEN_TYPE_INSTRUCTION,
53 TGSI_TOKEN_TYPE_PROPERTY,
54 };
55
56 struct tgsi_token
57 {
58 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_x */
59 unsigned NrTokens : 8; /**< UINT */
60 unsigned Padding : 20;
61 };
62
63 enum tgsi_file_type {
64 TGSI_FILE_NULL,
65 TGSI_FILE_CONSTANT,
66 TGSI_FILE_INPUT,
67 TGSI_FILE_OUTPUT,
68 TGSI_FILE_TEMPORARY,
69 TGSI_FILE_SAMPLER,
70 TGSI_FILE_ADDRESS,
71 TGSI_FILE_IMMEDIATE,
72 TGSI_FILE_PREDICATE,
73 TGSI_FILE_SYSTEM_VALUE,
74 TGSI_FILE_IMAGE,
75 TGSI_FILE_SAMPLER_VIEW,
76 TGSI_FILE_BUFFER,
77 TGSI_FILE_MEMORY,
78 TGSI_FILE_COUNT, /**< how many TGSI_FILE_ types */
79 };
80
81
82 #define TGSI_WRITEMASK_NONE 0x00
83 #define TGSI_WRITEMASK_X 0x01
84 #define TGSI_WRITEMASK_Y 0x02
85 #define TGSI_WRITEMASK_XY 0x03
86 #define TGSI_WRITEMASK_Z 0x04
87 #define TGSI_WRITEMASK_XZ 0x05
88 #define TGSI_WRITEMASK_YZ 0x06
89 #define TGSI_WRITEMASK_XYZ 0x07
90 #define TGSI_WRITEMASK_W 0x08
91 #define TGSI_WRITEMASK_XW 0x09
92 #define TGSI_WRITEMASK_YW 0x0A
93 #define TGSI_WRITEMASK_XYW 0x0B
94 #define TGSI_WRITEMASK_ZW 0x0C
95 #define TGSI_WRITEMASK_XZW 0x0D
96 #define TGSI_WRITEMASK_YZW 0x0E
97 #define TGSI_WRITEMASK_XYZW 0x0F
98
99 enum tgsi_interpolate_mode {
100 TGSI_INTERPOLATE_CONSTANT,
101 TGSI_INTERPOLATE_LINEAR,
102 TGSI_INTERPOLATE_PERSPECTIVE,
103 TGSI_INTERPOLATE_COLOR, /* special color case for smooth/flat */
104 TGSI_INTERPOLATE_COUNT,
105 };
106
107 enum tgsi_interpolate_loc {
108 TGSI_INTERPOLATE_LOC_CENTER,
109 TGSI_INTERPOLATE_LOC_CENTROID,
110 TGSI_INTERPOLATE_LOC_SAMPLE,
111 TGSI_INTERPOLATE_LOC_COUNT,
112 };
113
114 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
115 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
116 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
117 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
118
119 enum tgsi_memory_type {
120 TGSI_MEMORY_TYPE_GLOBAL, /* OpenCL global */
121 TGSI_MEMORY_TYPE_SHARED, /* OpenCL local / GLSL shared */
122 TGSI_MEMORY_TYPE_PRIVATE, /* OpenCL private */
123 TGSI_MEMORY_TYPE_INPUT, /* OpenCL kernel input params */
124 TGSI_MEMORY_TYPE_COUNT,
125 };
126
127 struct tgsi_declaration
128 {
129 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_DECLARATION */
130 unsigned NrTokens : 8; /**< UINT */
131 unsigned File : 4; /**< one of TGSI_FILE_x */
132 unsigned UsageMask : 4; /**< bitmask of TGSI_WRITEMASK_x flags */
133 unsigned Dimension : 1; /**< any extra dimension info? */
134 unsigned Semantic : 1; /**< BOOL, any semantic info? */
135 unsigned Interpolate : 1; /**< any interpolation info? */
136 unsigned Invariant : 1; /**< invariant optimization? */
137 unsigned Local : 1; /**< optimize as subroutine local variable? */
138 unsigned Array : 1; /**< extra array info? */
139 unsigned Atomic : 1; /**< atomic only? for TGSI_FILE_BUFFER */
140 unsigned MemType : 2; /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
141 unsigned Padding : 3;
142 };
143
144 struct tgsi_declaration_range
145 {
146 unsigned First : 16; /**< UINT */
147 unsigned Last : 16; /**< UINT */
148 };
149
150 struct tgsi_declaration_dimension
151 {
152 unsigned Index2D:16; /**< UINT */
153 unsigned Padding:16;
154 };
155
156 struct tgsi_declaration_interp
157 {
158 unsigned Interpolate : 4; /**< one of TGSI_INTERPOLATE_x */
159 unsigned Location : 2; /**< one of TGSI_INTERPOLATE_LOC_x */
160 unsigned CylindricalWrap:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
161 unsigned Padding : 22;
162 };
163
164 enum tgsi_semantic {
165 TGSI_SEMANTIC_POSITION,
166 TGSI_SEMANTIC_COLOR,
167 TGSI_SEMANTIC_BCOLOR, /**< back-face color */
168 TGSI_SEMANTIC_FOG,
169 TGSI_SEMANTIC_PSIZE,
170 TGSI_SEMANTIC_GENERIC,
171 TGSI_SEMANTIC_NORMAL,
172 TGSI_SEMANTIC_FACE,
173 TGSI_SEMANTIC_EDGEFLAG,
174 TGSI_SEMANTIC_PRIMID,
175 TGSI_SEMANTIC_INSTANCEID, /**< doesn't include start_instance */
176 TGSI_SEMANTIC_VERTEXID,
177 TGSI_SEMANTIC_STENCIL,
178 TGSI_SEMANTIC_CLIPDIST,
179 TGSI_SEMANTIC_CLIPVERTEX,
180 TGSI_SEMANTIC_GRID_SIZE, /**< grid size in blocks */
181 TGSI_SEMANTIC_BLOCK_ID, /**< id of the current block */
182 TGSI_SEMANTIC_BLOCK_SIZE, /**< block size in threads */
183 TGSI_SEMANTIC_THREAD_ID, /**< block-relative id of the current thread */
184 TGSI_SEMANTIC_TEXCOORD, /**< texture or sprite coordinates */
185 TGSI_SEMANTIC_PCOORD, /**< point sprite coordinate */
186 TGSI_SEMANTIC_VIEWPORT_INDEX, /**< viewport index */
187 TGSI_SEMANTIC_LAYER, /**< layer (rendertarget index) */
188 TGSI_SEMANTIC_SAMPLEID,
189 TGSI_SEMANTIC_SAMPLEPOS,
190 TGSI_SEMANTIC_SAMPLEMASK,
191 TGSI_SEMANTIC_INVOCATIONID,
192 TGSI_SEMANTIC_VERTEXID_NOBASE,
193 TGSI_SEMANTIC_BASEVERTEX,
194 TGSI_SEMANTIC_PATCH, /**< generic per-patch semantic */
195 TGSI_SEMANTIC_TESSCOORD, /**< coordinate being processed by tess */
196 TGSI_SEMANTIC_TESSOUTER, /**< outer tessellation levels */
197 TGSI_SEMANTIC_TESSINNER, /**< inner tessellation levels */
198 TGSI_SEMANTIC_VERTICESIN, /**< number of input vertices */
199 TGSI_SEMANTIC_HELPER_INVOCATION, /**< current invocation is helper */
200 TGSI_SEMANTIC_BASEINSTANCE,
201 TGSI_SEMANTIC_DRAWID,
202 TGSI_SEMANTIC_COUNT, /**< number of semantic values */
203 };
204
205 struct tgsi_declaration_semantic
206 {
207 unsigned Name : 8; /**< one of TGSI_SEMANTIC_x */
208 unsigned Index : 16; /**< UINT */
209 unsigned Padding : 8;
210 };
211
212 struct tgsi_declaration_image {
213 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
214 unsigned Raw : 1;
215 unsigned Writable : 1;
216 unsigned Format : 10; /**< one of PIPE_FORMAT_ */
217 unsigned Padding : 12;
218 };
219
220 enum tgsi_return_type {
221 TGSI_RETURN_TYPE_UNORM = 0,
222 TGSI_RETURN_TYPE_SNORM,
223 TGSI_RETURN_TYPE_SINT,
224 TGSI_RETURN_TYPE_UINT,
225 TGSI_RETURN_TYPE_FLOAT,
226 TGSI_RETURN_TYPE_COUNT
227 };
228
229 struct tgsi_declaration_sampler_view {
230 unsigned Resource : 8; /**< one of TGSI_TEXTURE_ */
231 unsigned ReturnTypeX : 6; /**< one of enum tgsi_return_type */
232 unsigned ReturnTypeY : 6; /**< one of enum tgsi_return_type */
233 unsigned ReturnTypeZ : 6; /**< one of enum tgsi_return_type */
234 unsigned ReturnTypeW : 6; /**< one of enum tgsi_return_type */
235 };
236
237 struct tgsi_declaration_array {
238 unsigned ArrayID : 10;
239 unsigned Padding : 22;
240 };
241
242 enum tgsi_imm_type {
243 TGSI_IMM_FLOAT32,
244 TGSI_IMM_UINT32,
245 TGSI_IMM_INT32,
246 TGSI_IMM_FLOAT64,
247 };
248
249 struct tgsi_immediate
250 {
251 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
252 unsigned NrTokens : 14; /**< UINT */
253 unsigned DataType : 4; /**< one of TGSI_IMM_x */
254 unsigned Padding : 10;
255 };
256
257 union tgsi_immediate_data
258 {
259 float Float;
260 unsigned Uint;
261 int Int;
262 };
263
264 enum tgsi_property_name {
265 TGSI_PROPERTY_GS_INPUT_PRIM,
266 TGSI_PROPERTY_GS_OUTPUT_PRIM,
267 TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES,
268 TGSI_PROPERTY_FS_COORD_ORIGIN,
269 TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
270 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS,
271 TGSI_PROPERTY_FS_DEPTH_LAYOUT,
272 TGSI_PROPERTY_VS_PROHIBIT_UCPS,
273 TGSI_PROPERTY_GS_INVOCATIONS,
274 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION,
275 TGSI_PROPERTY_TCS_VERTICES_OUT,
276 TGSI_PROPERTY_TES_PRIM_MODE,
277 TGSI_PROPERTY_TES_SPACING,
278 TGSI_PROPERTY_TES_VERTEX_ORDER_CW,
279 TGSI_PROPERTY_TES_POINT_MODE,
280 TGSI_PROPERTY_NUM_CLIPDIST_ENABLED,
281 TGSI_PROPERTY_NUM_CULLDIST_ENABLED,
282 TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL,
283 TGSI_PROPERTY_NEXT_SHADER,
284 TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
285 TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
286 TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
287 TGSI_PROPERTY_COUNT,
288 };
289
290 struct tgsi_property {
291 unsigned Type : 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
292 unsigned NrTokens : 8; /**< UINT */
293 unsigned PropertyName : 8; /**< one of TGSI_PROPERTY */
294 unsigned Padding : 12;
295 };
296
297 enum tgsi_fs_coord_origin {
298 TGSI_FS_COORD_ORIGIN_UPPER_LEFT,
299 TGSI_FS_COORD_ORIGIN_LOWER_LEFT,
300 };
301
302 enum tgsi_fs_coord_pixcenter {
303 TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER,
304 TGSI_FS_COORD_PIXEL_CENTER_INTEGER,
305 };
306
307 enum tgsi_fs_depth_layout {
308 TGSI_FS_DEPTH_LAYOUT_NONE,
309 TGSI_FS_DEPTH_LAYOUT_ANY,
310 TGSI_FS_DEPTH_LAYOUT_GREATER,
311 TGSI_FS_DEPTH_LAYOUT_LESS,
312 TGSI_FS_DEPTH_LAYOUT_UNCHANGED,
313 };
314
315 struct tgsi_property_data {
316 unsigned Data;
317 };
318
319 /* TGSI opcodes.
320 *
321 * For more information on semantics of opcodes and
322 * which APIs are known to use which opcodes, see
323 * gallium/docs/source/tgsi.rst
324 */
325 #define TGSI_OPCODE_ARL 0
326 #define TGSI_OPCODE_MOV 1
327 #define TGSI_OPCODE_LIT 2
328 #define TGSI_OPCODE_RCP 3
329 #define TGSI_OPCODE_RSQ 4
330 #define TGSI_OPCODE_EXP 5
331 #define TGSI_OPCODE_LOG 6
332 #define TGSI_OPCODE_MUL 7
333 #define TGSI_OPCODE_ADD 8
334 #define TGSI_OPCODE_DP3 9
335 #define TGSI_OPCODE_DP4 10
336 #define TGSI_OPCODE_DST 11
337 #define TGSI_OPCODE_MIN 12
338 #define TGSI_OPCODE_MAX 13
339 #define TGSI_OPCODE_SLT 14
340 #define TGSI_OPCODE_SGE 15
341 #define TGSI_OPCODE_MAD 16
342 #define TGSI_OPCODE_SUB 17
343 #define TGSI_OPCODE_LRP 18
344 #define TGSI_OPCODE_FMA 19
345 #define TGSI_OPCODE_SQRT 20
346 #define TGSI_OPCODE_DP2A 21
347 /* gap */
348 #define TGSI_OPCODE_FRC 24
349 #define TGSI_OPCODE_CLAMP 25
350 #define TGSI_OPCODE_FLR 26
351 #define TGSI_OPCODE_ROUND 27
352 #define TGSI_OPCODE_EX2 28
353 #define TGSI_OPCODE_LG2 29
354 #define TGSI_OPCODE_POW 30
355 #define TGSI_OPCODE_XPD 31
356 /* gap */
357 #define TGSI_OPCODE_ABS 33
358 /* gap */
359 #define TGSI_OPCODE_DPH 35
360 #define TGSI_OPCODE_COS 36
361 #define TGSI_OPCODE_DDX 37
362 #define TGSI_OPCODE_DDY 38
363 #define TGSI_OPCODE_KILL 39 /* unconditional */
364 #define TGSI_OPCODE_PK2H 40
365 #define TGSI_OPCODE_PK2US 41
366 #define TGSI_OPCODE_PK4B 42
367 #define TGSI_OPCODE_PK4UB 43
368 /* gap */
369 #define TGSI_OPCODE_SEQ 45
370 /* gap */
371 #define TGSI_OPCODE_SGT 47
372 #define TGSI_OPCODE_SIN 48
373 #define TGSI_OPCODE_SLE 49
374 #define TGSI_OPCODE_SNE 50
375 /* gap */
376 #define TGSI_OPCODE_TEX 52
377 #define TGSI_OPCODE_TXD 53
378 #define TGSI_OPCODE_TXP 54
379 #define TGSI_OPCODE_UP2H 55
380 #define TGSI_OPCODE_UP2US 56
381 #define TGSI_OPCODE_UP4B 57
382 #define TGSI_OPCODE_UP4UB 58
383 /* gap */
384 #define TGSI_OPCODE_ARR 61
385 /* gap */
386 #define TGSI_OPCODE_CAL 63
387 #define TGSI_OPCODE_RET 64
388 #define TGSI_OPCODE_SSG 65 /* SGN */
389 #define TGSI_OPCODE_CMP 66
390 #define TGSI_OPCODE_SCS 67
391 #define TGSI_OPCODE_TXB 68
392 /* gap */
393 #define TGSI_OPCODE_DIV 70
394 #define TGSI_OPCODE_DP2 71
395 #define TGSI_OPCODE_TXL 72
396 #define TGSI_OPCODE_BRK 73
397 #define TGSI_OPCODE_IF 74
398 #define TGSI_OPCODE_UIF 75
399 #define TGSI_OPCODE_ELSE 77
400 #define TGSI_OPCODE_ENDIF 78
401
402 #define TGSI_OPCODE_DDX_FINE 79
403 #define TGSI_OPCODE_DDY_FINE 80
404
405 #define TGSI_OPCODE_PUSHA 81
406 #define TGSI_OPCODE_POPA 82
407 #define TGSI_OPCODE_CEIL 83
408 #define TGSI_OPCODE_I2F 84
409 #define TGSI_OPCODE_NOT 85
410 #define TGSI_OPCODE_TRUNC 86
411 #define TGSI_OPCODE_SHL 87
412 /* gap */
413 #define TGSI_OPCODE_AND 89
414 #define TGSI_OPCODE_OR 90
415 #define TGSI_OPCODE_MOD 91
416 #define TGSI_OPCODE_XOR 92
417 #define TGSI_OPCODE_SAD 93
418 #define TGSI_OPCODE_TXF 94
419 #define TGSI_OPCODE_TXQ 95
420 #define TGSI_OPCODE_CONT 96
421 #define TGSI_OPCODE_EMIT 97
422 #define TGSI_OPCODE_ENDPRIM 98
423 #define TGSI_OPCODE_BGNLOOP 99
424 #define TGSI_OPCODE_BGNSUB 100
425 #define TGSI_OPCODE_ENDLOOP 101
426 #define TGSI_OPCODE_ENDSUB 102
427 #define TGSI_OPCODE_TXQ_LZ 103 /* TXQ for mipmap level 0 */
428 #define TGSI_OPCODE_TXQS 104
429 #define TGSI_OPCODE_RESQ 105
430 /* gap */
431 #define TGSI_OPCODE_NOP 107
432
433 #define TGSI_OPCODE_FSEQ 108
434 #define TGSI_OPCODE_FSGE 109
435 #define TGSI_OPCODE_FSLT 110
436 #define TGSI_OPCODE_FSNE 111
437
438 #define TGSI_OPCODE_MEMBAR 112
439 #define TGSI_OPCODE_CALLNZ 113
440 /* gap */
441 #define TGSI_OPCODE_BREAKC 115
442 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
443 #define TGSI_OPCODE_END 117 /* aka HALT */
444 #define TGSI_OPCODE_DFMA 118
445 #define TGSI_OPCODE_F2I 119
446 #define TGSI_OPCODE_IDIV 120
447 #define TGSI_OPCODE_IMAX 121
448 #define TGSI_OPCODE_IMIN 122
449 #define TGSI_OPCODE_INEG 123
450 #define TGSI_OPCODE_ISGE 124
451 #define TGSI_OPCODE_ISHR 125
452 #define TGSI_OPCODE_ISLT 126
453 #define TGSI_OPCODE_F2U 127
454 #define TGSI_OPCODE_U2F 128
455 #define TGSI_OPCODE_UADD 129
456 #define TGSI_OPCODE_UDIV 130
457 #define TGSI_OPCODE_UMAD 131
458 #define TGSI_OPCODE_UMAX 132
459 #define TGSI_OPCODE_UMIN 133
460 #define TGSI_OPCODE_UMOD 134
461 #define TGSI_OPCODE_UMUL 135
462 #define TGSI_OPCODE_USEQ 136
463 #define TGSI_OPCODE_USGE 137
464 #define TGSI_OPCODE_USHR 138
465 #define TGSI_OPCODE_USLT 139
466 #define TGSI_OPCODE_USNE 140
467 #define TGSI_OPCODE_SWITCH 141
468 #define TGSI_OPCODE_CASE 142
469 #define TGSI_OPCODE_DEFAULT 143
470 #define TGSI_OPCODE_ENDSWITCH 144
471
472 /* resource related opcodes */
473 #define TGSI_OPCODE_SAMPLE 145
474 #define TGSI_OPCODE_SAMPLE_I 146
475 #define TGSI_OPCODE_SAMPLE_I_MS 147
476 #define TGSI_OPCODE_SAMPLE_B 148
477 #define TGSI_OPCODE_SAMPLE_C 149
478 #define TGSI_OPCODE_SAMPLE_C_LZ 150
479 #define TGSI_OPCODE_SAMPLE_D 151
480 #define TGSI_OPCODE_SAMPLE_L 152
481 #define TGSI_OPCODE_GATHER4 153
482 #define TGSI_OPCODE_SVIEWINFO 154
483 #define TGSI_OPCODE_SAMPLE_POS 155
484 #define TGSI_OPCODE_SAMPLE_INFO 156
485
486 #define TGSI_OPCODE_UARL 157
487 #define TGSI_OPCODE_UCMP 158
488 #define TGSI_OPCODE_IABS 159
489 #define TGSI_OPCODE_ISSG 160
490
491 #define TGSI_OPCODE_LOAD 161
492 #define TGSI_OPCODE_STORE 162
493
494 #define TGSI_OPCODE_MFENCE 163
495 #define TGSI_OPCODE_LFENCE 164
496 #define TGSI_OPCODE_SFENCE 165
497 #define TGSI_OPCODE_BARRIER 166
498
499 #define TGSI_OPCODE_ATOMUADD 167
500 #define TGSI_OPCODE_ATOMXCHG 168
501 #define TGSI_OPCODE_ATOMCAS 169
502 #define TGSI_OPCODE_ATOMAND 170
503 #define TGSI_OPCODE_ATOMOR 171
504 #define TGSI_OPCODE_ATOMXOR 172
505 #define TGSI_OPCODE_ATOMUMIN 173
506 #define TGSI_OPCODE_ATOMUMAX 174
507 #define TGSI_OPCODE_ATOMIMIN 175
508 #define TGSI_OPCODE_ATOMIMAX 176
509
510 /* to be used for shadow cube map compares */
511 #define TGSI_OPCODE_TEX2 177
512 #define TGSI_OPCODE_TXB2 178
513 #define TGSI_OPCODE_TXL2 179
514
515 #define TGSI_OPCODE_IMUL_HI 180
516 #define TGSI_OPCODE_UMUL_HI 181
517
518 #define TGSI_OPCODE_TG4 182
519
520 #define TGSI_OPCODE_LODQ 183
521
522 #define TGSI_OPCODE_IBFE 184
523 #define TGSI_OPCODE_UBFE 185
524 #define TGSI_OPCODE_BFI 186
525 #define TGSI_OPCODE_BREV 187
526 #define TGSI_OPCODE_POPC 188
527 #define TGSI_OPCODE_LSB 189
528 #define TGSI_OPCODE_IMSB 190
529 #define TGSI_OPCODE_UMSB 191
530
531 #define TGSI_OPCODE_INTERP_CENTROID 192
532 #define TGSI_OPCODE_INTERP_SAMPLE 193
533 #define TGSI_OPCODE_INTERP_OFFSET 194
534
535 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
536 #define TGSI_OPCODE_F2D 195 /* SM5 */
537 #define TGSI_OPCODE_D2F 196
538 #define TGSI_OPCODE_DABS 197
539 #define TGSI_OPCODE_DNEG 198 /* SM5 */
540 #define TGSI_OPCODE_DADD 199 /* SM5 */
541 #define TGSI_OPCODE_DMUL 200 /* SM5 */
542 #define TGSI_OPCODE_DMAX 201 /* SM5 */
543 #define TGSI_OPCODE_DMIN 202 /* SM5 */
544 #define TGSI_OPCODE_DSLT 203 /* SM5 */
545 #define TGSI_OPCODE_DSGE 204 /* SM5 */
546 #define TGSI_OPCODE_DSEQ 205 /* SM5 */
547 #define TGSI_OPCODE_DSNE 206 /* SM5 */
548 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */
549 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */
550 #define TGSI_OPCODE_DMAD 209
551 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */
552 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */
553 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */
554 #define TGSI_OPCODE_D2I 213
555 #define TGSI_OPCODE_I2D 214
556 #define TGSI_OPCODE_D2U 215
557 #define TGSI_OPCODE_U2D 216
558 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */
559 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */
560 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */
561 #define TGSI_OPCODE_DFLR 220 /* nvc0 */
562 #define TGSI_OPCODE_DROUND 221 /* nvc0 */
563 #define TGSI_OPCODE_DSSG 222
564 #define TGSI_OPCODE_LAST 223
565
566 /**
567 * Opcode is the operation code to execute. A given operation defines the
568 * semantics how the source registers (if any) are interpreted and what is
569 * written to the destination registers (if any) as a result of execution.
570 *
571 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
572 * respectively. For a given operation code, those numbers are fixed and are
573 * present here only for convenience.
574 *
575 * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
576 *
577 * Saturate controls how are final results in destination registers modified.
578 */
579
580 struct tgsi_instruction
581 {
582 unsigned Type : 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
583 unsigned NrTokens : 8; /* UINT */
584 unsigned Opcode : 8; /* TGSI_OPCODE_ */
585 unsigned Saturate : 1; /* BOOL */
586 unsigned NumDstRegs : 2; /* UINT */
587 unsigned NumSrcRegs : 4; /* UINT */
588 unsigned Predicate : 1; /* BOOL */
589 unsigned Label : 1;
590 unsigned Texture : 1;
591 unsigned Memory : 1;
592 unsigned Padding : 1;
593 };
594
595 /*
596 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
597 *
598 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
599 * if texture instruction has a number of offsets,
600 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
601 *
602 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
603 *
604 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
605 *
606 * tgsi_instruction::NrTokens contains the total number of words that make the
607 * instruction, including the instruction word.
608 */
609
610 enum tgsi_swizzle {
611 TGSI_SWIZZLE_X,
612 TGSI_SWIZZLE_Y,
613 TGSI_SWIZZLE_Z,
614 TGSI_SWIZZLE_W,
615 };
616
617 struct tgsi_instruction_label
618 {
619 unsigned Label : 24; /* UINT */
620 unsigned Padding : 8;
621 };
622
623 enum tgsi_texture_type {
624 TGSI_TEXTURE_BUFFER,
625 TGSI_TEXTURE_1D,
626 TGSI_TEXTURE_2D,
627 TGSI_TEXTURE_3D,
628 TGSI_TEXTURE_CUBE,
629 TGSI_TEXTURE_RECT,
630 TGSI_TEXTURE_SHADOW1D,
631 TGSI_TEXTURE_SHADOW2D,
632 TGSI_TEXTURE_SHADOWRECT,
633 TGSI_TEXTURE_1D_ARRAY,
634 TGSI_TEXTURE_2D_ARRAY,
635 TGSI_TEXTURE_SHADOW1D_ARRAY,
636 TGSI_TEXTURE_SHADOW2D_ARRAY,
637 TGSI_TEXTURE_SHADOWCUBE,
638 TGSI_TEXTURE_2D_MSAA,
639 TGSI_TEXTURE_2D_ARRAY_MSAA,
640 TGSI_TEXTURE_CUBE_ARRAY,
641 TGSI_TEXTURE_SHADOWCUBE_ARRAY,
642 TGSI_TEXTURE_UNKNOWN,
643 TGSI_TEXTURE_COUNT,
644 };
645
646 struct tgsi_instruction_texture
647 {
648 unsigned Texture : 8; /* TGSI_TEXTURE_ */
649 unsigned NumOffsets : 4;
650 unsigned Padding : 20;
651 };
652
653 /* for texture offsets in GLSL and DirectX.
654 * Generally these always come from TGSI_FILE_IMMEDIATE,
655 * however DX11 appears to have the capability to do
656 * non-constant texture offsets.
657 */
658 struct tgsi_texture_offset
659 {
660 int Index : 16;
661 unsigned File : 4; /**< one of TGSI_FILE_x */
662 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
663 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
664 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
665 unsigned Padding : 6;
666 };
667
668 /*
669 * For SM3, the following constraint applies.
670 * - Swizzle is either set to identity or replicate.
671 */
672 struct tgsi_instruction_predicate
673 {
674 int Index : 16; /* SINT */
675 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_x */
676 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_x */
677 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_x */
678 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_x */
679 unsigned Negate : 1; /* BOOL */
680 unsigned Padding : 7;
681 };
682
683 /**
684 * File specifies the register array to access.
685 *
686 * Index specifies the element number of a register in the register file.
687 *
688 * If Indirect is TRUE, Index should be offset by the X component of the indirect
689 * register that follows. The register can be now fetched into local storage
690 * for further processing.
691 *
692 * If Negate is TRUE, all components of the fetched register are negated.
693 *
694 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
695 * SwizzleZ and SwizzleW.
696 *
697 */
698
699 struct tgsi_src_register
700 {
701 unsigned File : 4; /* TGSI_FILE_ */
702 unsigned Indirect : 1; /* BOOL */
703 unsigned Dimension : 1; /* BOOL */
704 int Index : 16; /* SINT */
705 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_ */
706 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_ */
707 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_ */
708 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_ */
709 unsigned Absolute : 1; /* BOOL */
710 unsigned Negate : 1; /* BOOL */
711 };
712
713 /**
714 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
715 *
716 * File, Index and Swizzle are handled the same as in tgsi_src_register.
717 *
718 * If ArrayID is zero the whole register file might be indirectly addressed,
719 * if not only the Declaration with this ArrayID is accessed by this operand.
720 *
721 */
722
723 struct tgsi_ind_register
724 {
725 unsigned File : 4; /* TGSI_FILE_ */
726 int Index : 16; /* SINT */
727 unsigned Swizzle : 2; /* TGSI_SWIZZLE_ */
728 unsigned ArrayID : 10; /* UINT */
729 };
730
731 /**
732 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
733 */
734
735 struct tgsi_dimension
736 {
737 unsigned Indirect : 1; /* BOOL */
738 unsigned Dimension : 1; /* BOOL */
739 unsigned Padding : 14;
740 int Index : 16; /* SINT */
741 };
742
743 struct tgsi_dst_register
744 {
745 unsigned File : 4; /* TGSI_FILE_ */
746 unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */
747 unsigned Indirect : 1; /* BOOL */
748 unsigned Dimension : 1; /* BOOL */
749 int Index : 16; /* SINT */
750 unsigned Padding : 6;
751 };
752
753 #define TGSI_MEMORY_COHERENT (1 << 0)
754 #define TGSI_MEMORY_RESTRICT (1 << 1)
755 #define TGSI_MEMORY_VOLATILE (1 << 2)
756
757 /**
758 * Specifies the type of memory access to do for the LOAD/STORE instruction.
759 */
760 struct tgsi_instruction_memory
761 {
762 unsigned Qualifier : 3; /* TGSI_MEMORY_ */
763 unsigned Texture : 8; /* only for images: TGSI_TEXTURE_ */
764 unsigned Format : 10; /* only for images: PIPE_FORMAT_ */
765 unsigned Padding : 11;
766 };
767
768 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
769 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
770 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2)
771 #define TGSI_MEMBAR_SHARED (1 << 3)
772 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4)
773
774 #ifdef __cplusplus
775 }
776 #endif
777
778 #endif /* P_SHADER_TOKENS_H */