2 * Copyright © 2008 Jérôme Glisse
3 * Copyright © 2011 Marek Olšák <maraeo@gmail.com>
4 * Copyright © 2015 Advanced Micro Devices, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
17 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
19 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * The above copyright notice and this permission notice (including the
25 * next paragraph) shall be included in all copies or substantial portions
32 #include "amdgpu_winsys.h"
34 #include "pipebuffer/pb_slab.h"
36 struct amdgpu_sparse_backing_chunk
;
39 * Sub-allocation information for a real buffer used as backing memory of a
42 struct amdgpu_sparse_backing
{
43 struct list_head list
;
45 struct amdgpu_winsys_bo
*bo
;
47 /* Sorted list of free chunks. */
48 struct amdgpu_sparse_backing_chunk
*chunks
;
53 struct amdgpu_sparse_commitment
{
54 struct amdgpu_sparse_backing
*backing
;
58 struct amdgpu_winsys_bo
{
59 struct pb_buffer base
;
62 struct pb_cache_entry cache_entry
;
64 amdgpu_va_handle va_handle
;
66 bool use_reusable_pool
;
68 struct list_head global_list_item
;
73 struct pb_slab_entry entry
;
74 struct amdgpu_winsys_bo
*real
;
77 amdgpu_va_handle va_handle
;
78 enum radeon_bo_flag flags
;
80 uint32_t num_va_pages
;
81 uint32_t num_backing_pages
;
83 struct list_head backing
;
85 /* Commitment information for each page of the virtual memory area. */
86 struct amdgpu_sparse_commitment
*commitments
;
90 struct amdgpu_winsys
*ws
;
91 void *cpu_ptr
; /* for user_ptr and permanent maps */
93 amdgpu_bo_handle bo
; /* NULL for slab entries and sparse buffers */
98 enum radeon_bo_domain initial_domain
;
100 /* how many command streams is this bo referenced in? */
101 int num_cs_references
;
103 /* how many command streams, which are being emitted in a separate
104 * thread, is this bo referenced in? */
105 volatile int num_active_ioctls
;
107 /* whether buffer_get_handle or buffer_from_handle was called,
108 * it can only transition from false to true
110 volatile int is_shared
; /* bool (int for atomicity) */
112 /* Fences for buffer synchronization. */
115 struct pipe_fence_handle
**fences
;
122 struct amdgpu_winsys_bo
*buffer
;
123 struct amdgpu_winsys_bo
*entries
;
126 bool amdgpu_bo_can_reclaim(struct pb_buffer
*_buf
);
127 struct pb_buffer
*amdgpu_bo_create(struct amdgpu_winsys
*ws
,
130 enum radeon_bo_domain domain
,
131 enum radeon_bo_flag flags
);
132 void amdgpu_bo_destroy(struct pb_buffer
*_buf
);
133 void *amdgpu_bo_map(struct pb_buffer
*buf
,
134 struct radeon_cmdbuf
*rcs
,
135 enum pipe_transfer_usage usage
);
136 void amdgpu_bo_init_functions(struct amdgpu_screen_winsys
*ws
);
138 bool amdgpu_bo_can_reclaim_slab(void *priv
, struct pb_slab_entry
*entry
);
139 struct pb_slab
*amdgpu_bo_slab_alloc(void *priv
, unsigned heap
,
141 unsigned group_index
);
142 void amdgpu_bo_slab_free(void *priv
, struct pb_slab
*slab
);
145 struct amdgpu_winsys_bo
*amdgpu_winsys_bo(struct pb_buffer
*bo
)
147 return (struct amdgpu_winsys_bo
*)bo
;
151 struct amdgpu_slab
*amdgpu_slab(struct pb_slab
*slab
)
153 return (struct amdgpu_slab
*)slab
;
157 void amdgpu_winsys_bo_reference(struct amdgpu_winsys_bo
**dst
,
158 struct amdgpu_winsys_bo
*src
)
160 pb_reference((struct pb_buffer
**)dst
, (struct pb_buffer
*)src
);